提交 a76b044a 编写于 作者: K Krzysztof Halasa 提交者: Jeff Garzik

[PATCH] WAN: fix C101 card carrier handling

Hi,

One of my recent changes broke C101 carrier handling, this patch
fixes it. Also fixes an old TX underrun checking bug.

2.6.18 material. Please apply.
Thanks.
Signed-off-by: NKrzysztof Halasa <khc@pm.waw.pl>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
上级 2ca2d5e8
...@@ -118,7 +118,7 @@ static inline void openwin(card_t *card, u8 page) ...@@ -118,7 +118,7 @@ static inline void openwin(card_t *card, u8 page)
static inline void set_carrier(port_t *port) static inline void set_carrier(port_t *port)
{ {
if (!sca_in(MSCI1_OFFSET + ST3, port) & ST3_DCD) if (!(sca_in(MSCI1_OFFSET + ST3, port) & ST3_DCD))
netif_carrier_on(port_to_dev(port)); netif_carrier_on(port_to_dev(port));
else else
netif_carrier_off(port_to_dev(port)); netif_carrier_off(port_to_dev(port));
...@@ -127,10 +127,10 @@ static inline void set_carrier(port_t *port) ...@@ -127,10 +127,10 @@ static inline void set_carrier(port_t *port)
static void sca_msci_intr(port_t *port) static void sca_msci_intr(port_t *port)
{ {
u8 stat = sca_in(MSCI1_OFFSET + ST1, port); /* read MSCI ST1 status */ u8 stat = sca_in(MSCI0_OFFSET + ST1, port); /* read MSCI ST1 status */
/* Reset MSCI TX underrun status bit */ /* Reset MSCI TX underrun and CDCD (ignored) status bit */
sca_out(stat & ST1_UDRN, MSCI0_OFFSET + ST1, port); sca_out(stat & (ST1_UDRN | ST1_CDCD), MSCI0_OFFSET + ST1, port);
if (stat & ST1_UDRN) { if (stat & ST1_UDRN) {
struct net_device_stats *stats = hdlc_stats(port_to_dev(port)); struct net_device_stats *stats = hdlc_stats(port_to_dev(port));
...@@ -138,6 +138,7 @@ static void sca_msci_intr(port_t *port) ...@@ -138,6 +138,7 @@ static void sca_msci_intr(port_t *port)
stats->tx_fifo_errors++; stats->tx_fifo_errors++;
} }
stat = sca_in(MSCI1_OFFSET + ST1, port); /* read MSCI1 ST1 status */
/* Reset MSCI CDCD status bit - uses ch#2 DCD input */ /* Reset MSCI CDCD status bit - uses ch#2 DCD input */
sca_out(stat & ST1_CDCD, MSCI1_OFFSET + ST1, port); sca_out(stat & ST1_CDCD, MSCI1_OFFSET + ST1, port);
......
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