提交 a2449091 编写于 作者: S Sascha Hauer

[ARM] MXC: do not include mach/hardware.h from mach/memory.h

Instead of including other header files, define PHYS_OFFSET directly
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
上级 44421e42
......@@ -24,6 +24,7 @@
#include <linux/err.h>
#include <linux/io.h>
#include <mach/clock.h>
#include <mach/hardware.h>
#include <asm/div64.h>
#include "crm_regs.h"
......
......@@ -9,6 +9,8 @@
* published by the Free Software Foundation.
*/
#include <mach/hardware.h>
#define AVIC_NIMASK 0x04
@ this macro disables fast irq (not implemented)
......
......@@ -25,8 +25,8 @@ __mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
/* Access all peripherals below 0x80000000 as nonshared device
* but leave l2cc alone.
*/
if ((phys_addr < 0x80000000) && ((phys_addr < L2CC_BASE_ADDR) ||
(phys_addr >= L2CC_BASE_ADDR + L2CC_SIZE)))
if ((phys_addr < 0x80000000) && ((phys_addr < 0x30000000) ||
(phys_addr >= 0x30000000 + SZ_1M)))
mtype = MT_DEVICE_NONSHARED;
}
......
......@@ -11,6 +11,12 @@
#ifndef __ASM_ARCH_MXC_MEMORY_H__
#define __ASM_ARCH_MXC_MEMORY_H__
#include <mach/hardware.h>
#if defined CONFIG_ARCH_MX1
#define PHYS_OFFSET UL(0x08000000)
#elif defined CONFIG_ARCH_MX2
#define PHYS_OFFSET UL(0xA0000000)
#elif defined CONFIG_ARCH_MX3
#define PHYS_OFFSET UL(0x80000000)
#endif
#endif /* __ASM_ARCH_MXC_MEMORY_H__ */
......@@ -18,8 +18,6 @@
#include <mach/vmalloc.h>
#define PHYS_OFFSET UL(0x08000000)
/*
* Memory map
*/
......
......@@ -289,7 +289,4 @@ extern int mx27_revision(void);
/* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */
#define ARCH_NR_GPIOS (192 + 16)
/* Start of RAM */
#define PHYS_OFFSET SDRAM_BASE_ADDR
#endif /* __ASM_ARCH_MXC_MX27_H__ */
......@@ -239,9 +239,6 @@
#define PCMCIA_IO_ADDRESS(x) \
(((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT)
/* Start of physical RAM - On many MX31 platforms, this is the first SDRAM bank (CSD0) */
#define PHYS_OFFSET CSD0_BASE_ADDR
/*
* Interrupt numbers
*/
......
......@@ -22,6 +22,7 @@
#include <linux/io.h>
#include <mach/common.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
#define AVIC_BASE IO_ADDRESS(AVIC_BASE_ADDR)
#define AVIC_INTCNTL (AVIC_BASE + 0x00) /* int control reg */
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册