提交 964c847a 编写于 作者: P Philipp Zabel 提交者: Shawn Guo

ARM i.MX6DL: dts: add clock and mux configuration for LDB

i.MX6DL does not have the second IPU, but the LVDS multiplexers can connect
either LVDS channel of the LDB to IPU1 DI0 or IPU1 DI1.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
[shawn.guo: remove "crtcs" property from imx6qdl.dtsi]
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
上级 fbf970f6
......@@ -419,3 +419,20 @@ i2c4: i2c@021f8000 {
};
};
};
&ldb {
clocks = <&clks 33>, <&clks 34>,
<&clks 39>, <&clks 40>,
<&clks 135>, <&clks 136>;
clock-names = "di0_pll", "di1_pll",
"di0_sel", "di1_sel",
"di0", "di1";
lvds-channel@0 {
crtcs = <&ipu1 0>, <&ipu1 1>;
};
lvds-channel@1 {
crtcs = <&ipu1 0>, <&ipu1 1>;
};
};
......@@ -574,13 +574,11 @@ ldb: ldb@020e0008 {
lvds-channel@0 {
reg = <0>;
crtcs = <&ipu1 0>;
status = "disabled";
};
lvds-channel@1 {
reg = <1>;
crtcs = <&ipu1 1>;
status = "disabled";
};
};
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册