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73a6b053
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体验新版 GitCode,发现更多精彩内容 >>
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73a6b053
编写于
8月 16, 2012
作者:
D
David S. Miller
浏览文件
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电子邮件补丁
差异文件
sparc64: Abstract away the NMI PIC counter computation.
Signed-off-by:
N
David S. Miller
<
davem@davemloft.net
>
上级
09d053c7
变更
3
隐藏空白更改
内联
并排
Showing
3 changed file
with
20 addition
and
19 deletion
+20
-19
arch/sparc/include/asm/pcr.h
arch/sparc/include/asm/pcr.h
+1
-14
arch/sparc/kernel/nmi.c
arch/sparc/kernel/nmi.c
+3
-3
arch/sparc/kernel/pcr.c
arch/sparc/kernel/pcr.c
+16
-2
未找到文件。
arch/sparc/include/asm/pcr.h
浏览文件 @
73a6b053
...
...
@@ -6,6 +6,7 @@ struct pcr_ops {
void
(
*
write_pcr
)(
unsigned
long
,
u64
);
u64
(
*
read_pic
)(
unsigned
long
);
void
(
*
write_pic
)(
unsigned
long
,
u64
);
u64
(
*
nmi_picl_value
)(
unsigned
int
nmi_hz
);
};
extern
const
struct
pcr_ops
*
pcr_ops
;
...
...
@@ -29,20 +30,6 @@ extern void schedule_deferred_pcr_work(void);
#define PCR_N2_SL1_SHIFT 27
#define PCR_N2_OV1 0x80000000
extern
unsigned
int
picl_shift
;
/* In order to commonize as much of the implementation as
* possible, we use PICH as our counter. Mostly this is
* to accommodate Niagara-1 which can only count insn cycles
* in PICH.
*/
static
inline
u64
picl_value
(
unsigned
int
nmi_hz
)
{
u32
delta
=
local_cpu_data
().
clock_tick
/
(
nmi_hz
<<
picl_shift
);
return
((
u64
)((
0
-
delta
)
&
0xffffffff
))
<<
32
;
}
extern
u64
pcr_enable
;
extern
int
pcr_arch_init
(
void
);
...
...
arch/sparc/kernel/nmi.c
浏览文件 @
73a6b053
...
...
@@ -125,7 +125,7 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
__this_cpu_write
(
alert_counter
,
0
);
}
if
(
__get_cpu_var
(
wd_enabled
))
{
pcr_ops
->
write_pic
(
0
,
picl_value
(
nmi_hz
));
pcr_ops
->
write_pic
(
0
,
p
cr_ops
->
nmi_p
icl_value
(
nmi_hz
));
pcr_ops
->
write_pcr
(
0
,
pcr_enable
);
}
...
...
@@ -223,7 +223,7 @@ void start_nmi_watchdog(void *unused)
atomic_inc
(
&
nmi_active
);
pcr_ops
->
write_pcr
(
0
,
PCR_PIC_PRIV
);
pcr_ops
->
write_pic
(
0
,
picl_value
(
nmi_hz
));
pcr_ops
->
write_pic
(
0
,
p
cr_ops
->
nmi_p
icl_value
(
nmi_hz
));
pcr_ops
->
write_pcr
(
0
,
pcr_enable
);
}
...
...
@@ -234,7 +234,7 @@ static void nmi_adjust_hz_one(void *unused)
return
;
pcr_ops
->
write_pcr
(
0
,
PCR_PIC_PRIV
);
pcr_ops
->
write_pic
(
0
,
picl_value
(
nmi_hz
));
pcr_ops
->
write_pic
(
0
,
p
cr_ops
->
nmi_p
icl_value
(
nmi_hz
));
pcr_ops
->
write_pcr
(
0
,
pcr_enable
);
}
...
...
arch/sparc/kernel/pcr.c
浏览文件 @
73a6b053
...
...
@@ -27,7 +27,6 @@
(0xff << PCR_N2_MASK1_SHIFT))
u64
pcr_enable
;
unsigned
int
picl_shift
;
/* Performance counter interrupts run unmasked at PIL level 15.
* Therefore we can't do things like wakeups and other work
...
...
@@ -98,11 +97,19 @@ static void direct_pic_write(unsigned long reg_num, u64 val)
"rd %%pic, %%g0"
:
:
"r"
(
val
));
}
static
u64
direct_picl_value
(
unsigned
int
nmi_hz
)
{
u32
delta
=
local_cpu_data
().
clock_tick
/
nmi_hz
;
return
((
u64
)((
0
-
delta
)
&
0xffffffff
))
<<
32
;
}
static
const
struct
pcr_ops
direct_pcr_ops
=
{
.
read_pcr
=
direct_pcr_read
,
.
write_pcr
=
direct_pcr_write
,
.
read_pic
=
direct_pic_read
,
.
write_pic
=
direct_pic_write
,
.
nmi_picl_value
=
direct_picl_value
,
};
static
void
n2_pcr_write
(
unsigned
long
reg_num
,
u64
val
)
...
...
@@ -118,11 +125,19 @@ static void n2_pcr_write(unsigned long reg_num, u64 val)
direct_pcr_write
(
reg_num
,
val
);
}
static
u64
n2_picl_value
(
unsigned
int
nmi_hz
)
{
u32
delta
=
local_cpu_data
().
clock_tick
/
(
nmi_hz
<<
2
);
return
((
u64
)((
0
-
delta
)
&
0xffffffff
))
<<
32
;
}
static
const
struct
pcr_ops
n2_pcr_ops
=
{
.
read_pcr
=
direct_pcr_read
,
.
write_pcr
=
n2_pcr_write
,
.
read_pic
=
direct_pic_read
,
.
write_pic
=
direct_pic_write
,
.
nmi_picl_value
=
n2_picl_value
,
};
static
unsigned
long
perf_hsvc_group
;
...
...
@@ -180,7 +195,6 @@ int __init pcr_arch_init(void)
case
hypervisor
:
pcr_ops
=
&
n2_pcr_ops
;
pcr_enable
=
PCR_N2_ENABLE
;
picl_shift
=
2
;
break
;
case
cheetah
:
...
...
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