提交 45c39fb0 编写于 作者: H H. Peter Anvin

x86, cleanups: Simplify sync_core() in the case of no CPUID

Simplify the implementation of sync_core() for the case where we may
not have the CPUID instruction available.

[ v2: stylistic cleanup of the #else clause per suggestion by Borislav
  Petkov. ]
Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1354132230-21854-9-git-send-email-hpa@linux.intel.com
Cc: Borislav Petkov <bp@alien8.de>
上级 e3228cf4
...@@ -673,17 +673,28 @@ static inline void sync_core(void) ...@@ -673,17 +673,28 @@ static inline void sync_core(void)
int tmp; int tmp;
#ifdef CONFIG_M486 #ifdef CONFIG_M486
if (boot_cpu_data.x86 < 5) /*
/* There is no speculative execution. * Do a CPUID if available, otherwise do a jump. The jump
* jmp is a barrier to prefetching. */ * can conveniently enough be the jump around CPUID.
asm volatile("jmp 1f\n1:\n" ::: "memory"); */
else asm volatile("cmpl %2,%1\n\t"
"jl 1f\n\t"
"cpuid\n"
"1:"
: "=a" (tmp)
: "rm" (boot_cpu_data.cpuid_level), "ri" (0), "0" (1)
: "ebx", "ecx", "edx", "memory");
#else
/*
* CPUID is a barrier to speculative execution.
* Prefetched instructions are automatically
* invalidated when modified.
*/
asm volatile("cpuid"
: "=a" (tmp)
: "0" (1)
: "ebx", "ecx", "edx", "memory");
#endif #endif
/* cpuid is a barrier to speculative execution.
* Prefetched instructions are automatically
* invalidated when modified. */
asm volatile("cpuid" : "=a" (tmp) : "0" (1)
: "ebx", "ecx", "edx", "memory");
} }
static inline void __monitor(const void *eax, unsigned long ecx, static inline void __monitor(const void *eax, unsigned long ecx,
......
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