[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 5
The attached patches provides part 5 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: NChris Zankel <chris@zankel.net> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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arch/xtensa/mm/Makefile
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arch/xtensa/mm/fault.c
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arch/xtensa/mm/init.c
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arch/xtensa/mm/misc.S
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arch/xtensa/mm/pgtable.c
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arch/xtensa/mm/tlb.c
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