提交 38737d82 编写于 作者: Y Yijing Wang 提交者: Bjorn Helgaas

PCI/MSI: Add pci_msi_ignore_mask to prevent writes to MSI/MSI-X Mask Bits

MSI-X vector Mask Bits are in MSI-X Tables in PCI memory space.  Xen PV
guests can't write to those tables.  MSI vector Mask Bits are in PCI
configuration space.  Xen PV guests can write to config space, but those
writes are ignored.

Commit 0e4ccb15 ("PCI: Add x86_msi.msi_mask_irq() and
msix_mask_irq()") added a way to override default_mask_msi_irqs() and
default_mask_msix_irqs() so they can be no-ops in Xen guests, but this is
more complicated than necessary.

Add "pci_msi_ignore_mask" in the core PCI MSI code.  If set,
default_mask_msi_irqs() and default_mask_msix_irqs() return without doing
anything.  This is less flexible, but much simpler.

[bhelgaas: changelog]
Signed-off-by: NYijing Wang <wangyijing@huawei.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NDavid Vrabel <david.vrabel@citrix.com>
CC: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
CC: xen-devel@lists.xenproject.org
上级 f114040e
...@@ -427,6 +427,7 @@ int __init pci_xen_init(void) ...@@ -427,6 +427,7 @@ int __init pci_xen_init(void)
x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs; x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
x86_msi.msi_mask_irq = xen_nop_msi_mask_irq; x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
x86_msi.msix_mask_irq = xen_nop_msix_mask_irq; x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
pci_msi_ignore_mask = 1;
#endif #endif
return 0; return 0;
} }
...@@ -508,6 +509,7 @@ int __init pci_xen_initial_domain(void) ...@@ -508,6 +509,7 @@ int __init pci_xen_initial_domain(void)
x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs; x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
x86_msi.msi_mask_irq = xen_nop_msi_mask_irq; x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
x86_msi.msix_mask_irq = xen_nop_msix_mask_irq; x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
pci_msi_ignore_mask = 1;
#endif #endif
xen_setup_acpi_sci(); xen_setup_acpi_sci();
__acpi_register_gsi = acpi_register_gsi_xen; __acpi_register_gsi = acpi_register_gsi_xen;
......
...@@ -23,6 +23,7 @@ ...@@ -23,6 +23,7 @@
#include "pci.h" #include "pci.h"
static int pci_msi_enable = 1; static int pci_msi_enable = 1;
int pci_msi_ignore_mask;
#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) #define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
...@@ -167,7 +168,7 @@ u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) ...@@ -167,7 +168,7 @@ u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
{ {
u32 mask_bits = desc->masked; u32 mask_bits = desc->masked;
if (!desc->msi_attrib.maskbit) if (pci_msi_ignore_mask || !desc->msi_attrib.maskbit)
return 0; return 0;
mask_bits &= ~mask; mask_bits &= ~mask;
...@@ -199,6 +200,10 @@ u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag) ...@@ -199,6 +200,10 @@ u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag)
u32 mask_bits = desc->masked; u32 mask_bits = desc->masked;
unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
PCI_MSIX_ENTRY_VECTOR_CTRL; PCI_MSIX_ENTRY_VECTOR_CTRL;
if (pci_msi_ignore_mask)
return 0;
mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
if (flag) if (flag)
mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT; mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
......
...@@ -10,6 +10,7 @@ struct msi_msg { ...@@ -10,6 +10,7 @@ struct msi_msg {
u32 data; /* 16 bits of msi message data */ u32 data; /* 16 bits of msi message data */
}; };
extern int pci_msi_ignore_mask;
/* Helper functions */ /* Helper functions */
struct irq_data; struct irq_data;
struct msi_desc; struct msi_desc;
......
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