提交 356c3e9a 编写于 作者: E Egil Hjelmeland 提交者: David S. Miller

net: dsa: lan9303: Move struct lan9303 to include/linux/dsa/lan9303.h

The next patch require net/dsa/tag_lan9303.c to access struct lan9303.
Therefore move struct lan9303 definitions from drivers/net/dsa/lan9303.h
to new file include/linux/dsa/lan9303.h.
Signed-off-by: NEgil Hjelmeland <privat@egil-hjelmeland.no>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 eed05c85
......@@ -9415,6 +9415,7 @@ M: Florian Fainelli <f.fainelli@gmail.com>
S: Maintained
F: net/dsa/
F: include/net/dsa.h
F: include/linux/dsa/
F: drivers/net/dsa/
NETWORKING [GENERAL]
......
......@@ -2,39 +2,7 @@
#include <linux/device.h>
#include <net/dsa.h>
struct lan9303;
struct lan9303_phy_ops {
/* PHY 1 and 2 access*/
int (*phy_read)(struct lan9303 *chip, int port, int regnum);
int (*phy_write)(struct lan9303 *chip, int port,
int regnum, u16 val);
};
#define LAN9303_NUM_ALR_RECORDS 512
struct lan9303_alr_cache_entry {
u8 mac_addr[ETH_ALEN];
u8 port_map; /* Bitmap of ports. Zero if unused entry */
u8 stp_override; /* non zero if set ALR_DAT1_AGE_OVERRID */
};
struct lan9303 {
struct device *dev;
struct regmap *regmap;
struct regmap_irq_chip_data *irq_data;
struct gpio_desc *reset_gpio;
u32 reset_duration; /* in [ms] */
bool phy_addr_sel_strap;
struct dsa_switch *ds;
struct mutex indirect_mutex; /* protect indexed register access */
const struct lan9303_phy_ops *ops;
bool is_bridged; /* true if port 1 and 2 are bridged */
u32 swe_port_state; /* remember SWE_PORT_STATE while not bridged */
/* LAN9303 do not offer reading specific ALR entry. Cache all
* static entries in a flat table
**/
struct lan9303_alr_cache_entry alr_cache[LAN9303_NUM_ALR_RECORDS];
};
#include <linux/dsa/lan9303.h>
extern const struct regmap_access_table lan9303_register_set;
extern const struct lan9303_phy_ops lan9303_indirect_phy_ops;
......
/* Included by drivers/net/dsa/lan9303.h and net/dsa/tag_lan9303.c */
#include <linux/if_ether.h>
struct lan9303;
struct lan9303_phy_ops {
/* PHY 1 and 2 access*/
int (*phy_read)(struct lan9303 *chip, int port, int regnum);
int (*phy_write)(struct lan9303 *chip, int port,
int regnum, u16 val);
};
#define LAN9303_NUM_ALR_RECORDS 512
struct lan9303_alr_cache_entry {
u8 mac_addr[ETH_ALEN];
u8 port_map; /* Bitmap of ports. Zero if unused entry */
u8 stp_override; /* non zero if set ALR_DAT1_AGE_OVERRID */
};
struct lan9303 {
struct device *dev;
struct regmap *regmap;
struct regmap_irq_chip_data *irq_data;
struct gpio_desc *reset_gpio;
u32 reset_duration; /* in [ms] */
bool phy_addr_sel_strap;
struct dsa_switch *ds;
struct mutex indirect_mutex; /* protect indexed register access */
const struct lan9303_phy_ops *ops;
bool is_bridged; /* true if port 1 and 2 are bridged */
u32 swe_port_state; /* remember SWE_PORT_STATE while not bridged */
/* LAN9303 do not offer reading specific ALR entry. Cache all
* static entries in a flat table
**/
struct lan9303_alr_cache_entry alr_cache[LAN9303_NUM_ALR_RECORDS];
};
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