提交 2804ba4e 编写于 作者: J Jisheng Zhang 提交者: David S. Miller

net: mvneta: Try to get named core clock first

Some platforms may provide more than one clk for the mvneta IP, for
example Marvell BG4CT provides one clk for the mac core, and one
clk for the AXI bus logic.

To support for more than one clock, we'll need to distinguish between
the clock by name. Change clock probing to first try to get "core"
clock before falling back to unnamed clock.
Signed-off-by: NJisheng Zhang <jszhang@marvell.com>
Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 0e03f563
......@@ -3604,7 +3604,9 @@ static int mvneta_probe(struct platform_device *pdev)
pp->indir[0] = rxq_def;
pp->clk = devm_clk_get(&pdev->dev, NULL);
pp->clk = devm_clk_get(&pdev->dev, "core");
if (IS_ERR(pp->clk))
pp->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(pp->clk)) {
err = PTR_ERR(pp->clk);
goto err_put_phy_node;
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册