drm/i915/icl: Set graphics mode register for gen11
This patch clears a single bit. The bit is 0 by default but expected not to be set. Explicitly clearing the bit in this patch is intended to indicate some thinking has occurred, and that we want this bit cleared and we are not just excepting the default value. We also stop setting GFX_RUN_LIST_ENABLE, which is correct since that bit is gone. v2 (from Paulo): fix indentation. v3: Changed GEN check to >= 11. Corrected author name. v4 (from Paulo): improve commit message (Daniele). Reviewed-by: NDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: NKelvin Gardiner <kelvin.gardiner@intel.com> Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180130134918.32283-9-paulo.r.zanoni@intel.com
Showing
想要评论请 注册 或 登录