MMC: CSD and CID timeout values

The MMC spec states that the timeout for accessing the CSD and CID
registers is 64 clock cycles.
Signed-off-by: NMatthew Fleming <matthew.fleming@imgtec.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

drivers/mmc/core/mmc_ops.c

@@ -248,8 +248,12 @@ mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host,
 
 	sg_init_one(&sg, data_buf, len);
 
-	if (card)
-		mmc_set_data_timeout(&data, card);
+	/*
+	 * The spec states that CSR and CID accesses have a timeout
+	 * of 64 clock cycles.
+	 */
+	data.timeout_ns = 0;
+	data.timeout_clks = 64;
 
 	mmc_wait_for_req(host, &mrq);