提交 06b8534c 编写于 作者: B Borislav Petkov 提交者: Ingo Molnar

x86/microcode: Rework microcode loading

Yeah, I know, I know, this is a huuge patch and reviewing it is hard.

Sorry but this is the only way I could think of in which I can rewrite
the microcode patches loading procedure without breaking (knowingly) the
driver.

So maybe this patch is easier to review if one looks at the files after
the patch has been applied instead at the diff. Because then it becomes
pretty obvious:

* The BSP-loading path - load_ucode_bsp() is working independently from
  the AP path now and it doesn't save any pointers or patches anymore -
  it solely parses the builtin or initrd microcode and applies the patch.
  That's it.

This fixes the CONFIG_RANDOMIZE_MEMORY offset fun more solidly.

* The AP-loading path - load_ucode_ap() then goes and scans
  builtin/initrd *again* for the microcode patches but it caches them this
  time so that we don't have to do that scan on each AP but only once.

This simplifies the code considerably.

Then, when we save the microcode from the initrd/builtin, we go and
add the relevant patches to our own cache. The AMD side did do that
and now the Intel side does it too. So no more pointer copying and
blabla, we save the microcode patches ourselves and are independent from
initrd/builtin.

This whole conversion gives us other benefits like unifying the
initrd parsing into a single function: find_microcode_in_initrd() is
used by both.

The diffstat speaks for itself: 456 insertions(+), 695 deletions(-)
Signed-off-by: NBorislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20161025095522.11964-12-bp@alien8.deSigned-off-by: NIngo Molnar <mingo@kernel.org>
上级 8027923a
......@@ -64,6 +64,7 @@ struct ucode_cpu_info {
void *mc;
};
extern struct ucode_cpu_info ucode_cpu_info[];
struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa);
#ifdef CONFIG_MICROCODE_INTEL
extern struct microcode_ops * __init init_intel_microcode(void);
......
......@@ -41,53 +41,23 @@ static struct equiv_cpu_entry *equiv_cpu_table;
/*
* This points to the current valid container of microcode patches which we will
* save from the initrd before jettisoning its contents.
* save from the initrd/builtin before jettisoning its contents.
*/
static u8 *container;
static size_t container_size;
static bool ucode_builtin;
struct container {
u8 *data;
size_t size;
} cont;
static u32 ucode_new_rev;
static u8 amd_ucode_patch[PATCH_MAX_SIZE];
static u16 this_equiv_id;
static struct cpio_data ucode_cpio;
static struct cpio_data __init find_ucode_in_initrd(void)
{
#ifdef CONFIG_BLK_DEV_INITRD
char *path;
void *start;
size_t size;
/*
* Microcode patch container file is prepended to the initrd in cpio
* format. See Documentation/x86/early-microcode.txt
*/
static __initdata char ucode_path[] = "kernel/x86/microcode/AuthenticAMD.bin";
#ifdef CONFIG_X86_32
struct boot_params *p;
/*
* On 32-bit, early load occurs before paging is turned on so we need
* to use physical addresses.
*/
p = (struct boot_params *)__pa_nodebug(&boot_params);
path = (char *)__pa_nodebug(ucode_path);
start = (void *)p->hdr.ramdisk_image;
size = p->hdr.ramdisk_size;
#else
path = ucode_path;
start = (void *)(boot_params.hdr.ramdisk_image + PAGE_OFFSET);
size = boot_params.hdr.ramdisk_size;
#endif /* !CONFIG_X86_32 */
return find_cpio_data(path, start, size, NULL);
#else
return (struct cpio_data){ NULL, 0, "" };
#endif
}
/*
* Microcode patch container file is prepended to the initrd in cpio
* format. See Documentation/x86/early-microcode.txt
*/
static const char
ucode_path[] __maybe_unused = "kernel/x86/microcode/AuthenticAMD.bin";
static size_t compute_container_size(u8 *data, u32 total_size)
{
......@@ -143,62 +113,31 @@ static inline u16 find_equiv_id(struct equiv_cpu_entry *equiv_cpu_table,
return 0;
}
static int __apply_microcode_amd(struct microcode_amd *mc_amd)
{
u32 rev, dummy;
native_wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
/* verify patch application was successful */
native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
if (rev != mc_amd->hdr.patch_id)
return -1;
return 0;
}
/*
* Early load occurs before we can vmalloc(). So we look for the microcode
* patch container file in initrd, traverse equivalent cpu table, look for a
* matching microcode patch, and update, all in initrd memory in place.
* When vmalloc() is available for use later -- on 64-bit during first AP load,
* and on 32-bit during save_microcode_in_initrd_amd() -- we can call
* load_microcode_amd() to save equivalent cpu table and microcode patches in
* kernel heap memory.
* This scans the ucode blob for the proper container as we can have multiple
* containers glued together.
*/
static void apply_ucode_in_initrd(void *ucode, size_t size, bool save_patch)
static struct container
find_proper_container(u8 *ucode, size_t size, u16 *ret_id)
{
struct container ret = { NULL, 0 };
u32 eax, ebx, ecx, edx;
struct equiv_cpu_entry *eq;
size_t *cont_sz;
u32 *header;
u8 *data, **cont;
u8 (*patch)[PATCH_MAX_SIZE];
u16 eq_id = 0;
int offset, left;
u32 rev, eax, ebx, ecx, edx;
u32 *new_rev;
#ifdef CONFIG_X86_32
new_rev = (u32 *)__pa_nodebug(&ucode_new_rev);
cont_sz = (size_t *)__pa_nodebug(&container_size);
cont = (u8 **)__pa_nodebug(&container);
patch = (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch);
#else
new_rev = &ucode_new_rev;
cont_sz = &container_size;
cont = &container;
patch = &amd_ucode_patch;
#endif
u16 eq_id = 0;
u32 *header;
u8 *data;
data = ucode;
left = size;
header = (u32 *)data;
/* find equiv cpu table */
if (header[0] != UCODE_MAGIC ||
header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */
header[2] == 0) /* size */
return;
return ret;
eax = 0x00000001;
ecx = 0;
......@@ -207,7 +146,7 @@ static void apply_ucode_in_initrd(void *ucode, size_t size, bool save_patch)
while (left > 0) {
eq = (struct equiv_cpu_entry *)(data + CONTAINER_HDR_SZ);
*cont = data;
ret.data = data;
/* Advance past the container header */
offset = header[2] + CONTAINER_HDR_SZ;
......@@ -216,15 +155,15 @@ static void apply_ucode_in_initrd(void *ucode, size_t size, bool save_patch)
eq_id = find_equiv_id(eq, eax);
if (eq_id) {
this_equiv_id = eq_id;
*cont_sz = compute_container_size(*cont, left + offset);
ret.size = compute_container_size(ret.data, left + offset);
/*
* truncate how much we need to iterate over in the
* ucode update loop below
*/
left = *cont_sz - offset;
break;
left = ret.size - offset;
*ret_id = eq_id;
return ret;
}
/*
......@@ -234,6 +173,7 @@ static void apply_ucode_in_initrd(void *ucode, size_t size, bool save_patch)
*/
while (left > 0) {
header = (u32 *)data;
if (header[0] == UCODE_MAGIC &&
header[1] == UCODE_EQUIV_CPU_TABLE_TYPE)
break;
......@@ -248,14 +188,64 @@ static void apply_ucode_in_initrd(void *ucode, size_t size, bool save_patch)
ucode = data;
}
if (!eq_id) {
*cont = NULL;
*cont_sz = 0;
return;
}
return ret;
}
static int __apply_microcode_amd(struct microcode_amd *mc_amd)
{
u32 rev, dummy;
native_wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
/* verify patch application was successful */
native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
if (rev != mc_amd->hdr.patch_id)
return -1;
return 0;
}
/*
* Early load occurs before we can vmalloc(). So we look for the microcode
* patch container file in initrd, traverse equivalent cpu table, look for a
* matching microcode patch, and update, all in initrd memory in place.
* When vmalloc() is available for use later -- on 64-bit during first AP load,
* and on 32-bit during save_microcode_in_initrd_amd() -- we can call
* load_microcode_amd() to save equivalent cpu table and microcode patches in
* kernel heap memory.
*/
static struct container
apply_microcode_early_amd(void *ucode, size_t size, bool save_patch)
{
struct container ret = { NULL, 0 };
u8 (*patch)[PATCH_MAX_SIZE];
int offset, left;
u32 rev, *header;
u8 *data;
u16 eq_id = 0;
u32 *new_rev;
#ifdef CONFIG_X86_32
new_rev = (u32 *)__pa_nodebug(&ucode_new_rev);
patch = (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch);
#else
new_rev = &ucode_new_rev;
patch = &amd_ucode_patch;
#endif
if (check_current_patch_level(&rev, true))
return;
return (struct container){ NULL, 0 };
ret = find_proper_container(ucode, size, &eq_id);
if (!eq_id)
return (struct container){ NULL, 0 };
this_equiv_id = eq_id;
header = (u32 *)ret.data;
/* We're pointing to an equiv table, skip over it. */
data = ret.data + header[2] + CONTAINER_HDR_SZ;
left = ret.size - (header[2] + CONTAINER_HDR_SZ);
while (left > 0) {
struct microcode_amd *mc;
......@@ -274,8 +264,7 @@ static void apply_ucode_in_initrd(void *ucode, size_t size, bool save_patch)
*new_rev = rev;
if (save_patch)
memcpy(patch, mc,
min_t(u32, header[1], PATCH_MAX_SIZE));
memcpy(patch, mc, min_t(u32, header[1], PATCH_MAX_SIZE));
}
}
......@@ -283,10 +272,10 @@ static void apply_ucode_in_initrd(void *ucode, size_t size, bool save_patch)
data += offset;
left -= offset;
}
return ret;
}
static bool __init load_builtin_amd_microcode(struct cpio_data *cp,
unsigned int family)
static bool get_builtin_microcode(struct cpio_data *cp, unsigned int family)
{
#ifdef CONFIG_X86_64
char fw_name[36] = "amd-ucode/microcode_amd.bin";
......@@ -303,32 +292,31 @@ static bool __init load_builtin_amd_microcode(struct cpio_data *cp,
void __init load_ucode_amd_bsp(unsigned int family)
{
struct ucode_cpu_info *uci;
struct cpio_data cp;
bool *builtin;
void **data;
size_t *size;
const char *path;
bool use_pa;
#ifdef CONFIG_X86_32
data = (void **)__pa_nodebug(&ucode_cpio.data);
size = (size_t *)__pa_nodebug(&ucode_cpio.size);
builtin = (bool *)__pa_nodebug(&ucode_builtin);
#else
data = &ucode_cpio.data;
size = &ucode_cpio.size;
builtin = &ucode_builtin;
#endif
if (IS_ENABLED(CONFIG_X86_32)) {
uci = (struct ucode_cpu_info *)__pa_nodebug(ucode_cpu_info);
path = (const char *)__pa_nodebug(ucode_path);
use_pa = true;
} else {
uci = ucode_cpu_info;
path = ucode_path;
use_pa = false;
}
*builtin = load_builtin_amd_microcode(&cp, family);
if (!*builtin)
cp = find_ucode_in_initrd();
if (!get_builtin_microcode(&cp, family))
cp = find_microcode_in_initrd(path, use_pa);
if (!(cp.data && cp.size))
return;
*data = cp.data;
*size = cp.size;
/* Get BSP's CPUID.EAX(1), needed in load_microcode_amd() */
uci->cpu_sig.sig = cpuid_eax(1);
apply_ucode_in_initrd(cp.data, cp.size, true);
apply_microcode_early_amd(cp.data, cp.size, true);
}
#ifdef CONFIG_X86_32
......@@ -342,8 +330,7 @@ void __init load_ucode_amd_bsp(unsigned int family)
void load_ucode_amd_ap(unsigned int family)
{
struct microcode_amd *mc;
size_t *usize;
void **ucode;
struct cpio_data cp;
mc = (struct microcode_amd *)__pa_nodebug(amd_ucode_patch);
if (mc->hdr.patch_id && mc->hdr.processor_rev_id) {
......@@ -351,55 +338,63 @@ void load_ucode_amd_ap(unsigned int family)
return;
}
ucode = (void *)__pa_nodebug(&container);
usize = (size_t *)__pa_nodebug(&container_size);
if (!get_builtin_microcode(&cp, family))
cp = find_microcode_in_initrd((const char *)__pa_nodebug(ucode_path), true);
if (!*ucode || !*usize)
if (!(cp.data && cp.size))
return;
apply_ucode_in_initrd(*ucode, *usize, false);
}
static void __init collect_cpu_sig_on_bsp(void *arg)
{
unsigned int cpu = smp_processor_id();
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
uci->cpu_sig.sig = cpuid_eax(0x00000001);
}
static void __init get_bsp_sig(void)
{
unsigned int bsp = boot_cpu_data.cpu_index;
struct ucode_cpu_info *uci = ucode_cpu_info + bsp;
if (!uci->cpu_sig.sig)
smp_call_function_single(bsp, collect_cpu_sig_on_bsp, NULL, 1);
/*
* This would set amd_ucode_patch above so that the following APs can
* use it directly instead of going down this path again.
*/
apply_microcode_early_amd(cp.data, cp.size, true);
}
#else
void load_ucode_amd_ap(unsigned int family)
{
struct equiv_cpu_entry *eq;
struct microcode_amd *mc;
u8 *cont = container;
u32 rev, eax;
u16 eq_id;
if (!container)
return;
/*
* 64-bit runs with paging enabled, thus early==false.
*/
/* 64-bit runs with paging enabled, thus early==false. */
if (check_current_patch_level(&rev, false))
return;
/* Add CONFIG_RANDOMIZE_MEMORY offset. */
if (!ucode_builtin)
cont += PAGE_OFFSET - __PAGE_OFFSET_BASE;
/* First AP hasn't cached it yet, go through the blob. */
if (!cont.data) {
struct cpio_data cp = { NULL, 0, "" };
if (cont.size == -1)
return;
reget:
if (!get_builtin_microcode(&cp, family)) {
#ifdef CONFIG_BLK_DEV_INITRD
cp = find_cpio_data(ucode_path, (void *)initrd_start,
initrd_end - initrd_start, NULL);
#endif
if (!(cp.data && cp.size)) {
/*
* Mark it so that other APs do not scan again
* for no real reason and slow down boot
* needlessly.
*/
cont.size = -1;
return;
}
}
cont = apply_microcode_early_amd(cp.data, cp.size, false);
if (!(cont.data && cont.size)) {
cont.size = -1;
return;
}
}
eax = cpuid_eax(0x00000001);
eq = (struct equiv_cpu_entry *)(cont + CONTAINER_HDR_SZ);
eq = (struct equiv_cpu_entry *)(cont.data + CONTAINER_HDR_SZ);
eq_id = find_equiv_id(eq, eax);
if (!eq_id)
......@@ -414,64 +409,50 @@ void load_ucode_amd_ap(unsigned int family)
}
} else {
if (!ucode_cpio.data)
return;
/*
* AP has a different equivalence ID than BSP, looks like
* mixed-steppings silicon so go through the ucode blob anew.
*/
apply_ucode_in_initrd(ucode_cpio.data, ucode_cpio.size, false);
goto reget;
}
}
#endif
#endif /* CONFIG_X86_32 */
static enum ucode_state
load_microcode_amd(int cpu, u8 family, const u8 *data, size_t size);
int __init save_microcode_in_initrd_amd(unsigned int family)
int __init save_microcode_in_initrd_amd(unsigned int fam)
{
unsigned long cont;
int retval = 0;
enum ucode_state ret;
u8 *cont_va;
u32 eax;
int retval = 0;
u16 eq_id;
if (!container)
return -EINVAL;
if (!cont.data) {
if (IS_ENABLED(CONFIG_X86_32) && (cont.size != -1)) {
struct cpio_data cp = { NULL, 0, "" };
#ifdef CONFIG_X86_32
get_bsp_sig();
cont = (unsigned long)container;
cont_va = __va(container);
#else
/*
* We need the physical address of the container for both bitness since
* boot_params.hdr.ramdisk_image is a physical address.
*/
cont = __pa(container);
cont_va = container;
#ifdef CONFIG_BLK_DEV_INITRD
cp = find_cpio_data(ucode_path, (void *)initrd_start,
initrd_end - initrd_start, NULL);
#endif
/*
* Take into account the fact that the ramdisk might get relocated and
* therefore we need to recompute the container's position in virtual
* memory space.
*/
if (relocated_ramdisk)
container = (u8 *)(__va(relocated_ramdisk) +
(cont - boot_params.hdr.ramdisk_image));
else
container = cont_va;
if (!(cp.data && cp.size)) {
cont.size = -1;
return -EINVAL;
}
/* Add CONFIG_RANDOMIZE_MEMORY offset. */
if (!ucode_builtin)
container += PAGE_OFFSET - __PAGE_OFFSET_BASE;
cont = find_proper_container(cp.data, cp.size, &eq_id);
if (!eq_id) {
cont.size = -1;
return -EINVAL;
}
eax = cpuid_eax(0x00000001);
eax = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff);
} else
return -EINVAL;
}
ret = load_microcode_amd(smp_processor_id(), eax, container, container_size);
ret = load_microcode_amd(smp_processor_id(), fam, cont.data, cont.size);
if (ret != UCODE_OK)
retval = -EINVAL;
......@@ -479,8 +460,8 @@ int __init save_microcode_in_initrd_amd(unsigned int family)
* This will be freed any msec now, stash patches for the current
* family and switch to patch cache for cpu hotplug, etc later.
*/
container = NULL;
container_size = 0;
cont.data = NULL;
cont.size = 0;
return retval;
}
......@@ -498,8 +479,10 @@ void reload_ucode_amd(void)
return;
mc = (struct microcode_amd *)amd_ucode_patch;
if (!mc)
return;
if (mc && rev < mc->hdr.patch_id) {
if (rev < mc->hdr.patch_id) {
if (!__apply_microcode_amd(mc)) {
ucode_new_rev = mc->hdr.patch_id;
pr_info("reload patch_level=0x%08x\n", ucode_new_rev);
......
......@@ -39,6 +39,7 @@
#include <asm/microcode.h>
#include <asm/processor.h>
#include <asm/cmdline.h>
#include <asm/setup.h>
#define MICROCODE_VERSION "2.01"
......@@ -196,6 +197,58 @@ static int __init save_microcode_in_initrd(void)
return -EINVAL;
}
struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa)
{
#ifdef CONFIG_BLK_DEV_INITRD
unsigned long start = 0;
size_t size;
#ifdef CONFIG_X86_32
struct boot_params *params;
if (use_pa)
params = (struct boot_params *)__pa_nodebug(&boot_params);
else
params = &boot_params;
size = params->hdr.ramdisk_size;
/*
* Set start only if we have an initrd image. We cannot use initrd_start
* because it is not set that early yet.
*/
if (size)
start = params->hdr.ramdisk_image;
# else /* CONFIG_X86_64 */
size = (unsigned long)boot_params.ext_ramdisk_size << 32;
size |= boot_params.hdr.ramdisk_size;
if (size) {
start = (unsigned long)boot_params.ext_ramdisk_image << 32;
start |= boot_params.hdr.ramdisk_image;
start += PAGE_OFFSET;
}
# endif
/*
* Did we relocate the ramdisk?
*
* So we possibly relocate the ramdisk *after* applying microcode on the
* BSP so we rely on use_pa (use physical addresses) - even if it is not
* absolutely correct - to determine whether we've done the ramdisk
* relocation already.
*/
if (!use_pa && relocated_ramdisk)
start = initrd_start;
return find_cpio_data(path, (void *)start, size, NULL);
#else /* !CONFIG_BLK_DEV_INITRD */
return (struct cpio_data){ NULL, 0, "" };
#endif
}
void reload_early_microcode(void)
{
int vendor, family;
......@@ -455,7 +508,8 @@ static struct attribute_group mc_attr_group = {
static void microcode_fini_cpu(int cpu)
{
microcode_ops->microcode_fini_cpu(cpu);
if (microcode_ops->microcode_fini_cpu)
microcode_ops->microcode_fini_cpu(cpu);
}
static enum ucode_state microcode_resume_cpu(int cpu)
......@@ -584,12 +638,7 @@ static int mc_cpu_down_prep(unsigned int cpu)
/* Suspend is in progress, only remove the interface */
sysfs_remove_group(&dev->kobj, &mc_attr_group);
pr_debug("CPU%d removed\n", cpu);
/*
* When a CPU goes offline, don't free up or invalidate the copy of
* the microcode in kernel memory, so that we can reuse it when the
* CPU comes back online without unnecessarily requesting the userspace
* for it again.
*/
return 0;
}
......
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