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    x86/mce: Make mce_rdmsrl() panic on an inaccessible MSR · e2def7d4
    Borislav Petkov 提交于
    If an exception needs to be handled while reading an MSR - which is in
    most of the cases caused by a #GP on a non-existent MSR - then this
    is most likely the incarnation of a BIOS or a hardware bug. Such bug
    violates the architectural guarantee that MCA banks are present with all
    MSRs belonging to them.
    
    The proper fix belongs in the hardware/firmware - not in the kernel.
    
    Handling an #MC exception which is raised while an NMI is being handled
    would cause the nasty NMI nesting issue because of the shortcoming of
    IRET of reenabling NMIs when executed. And the machine is in an #MC
    context already so <Deity> be at its side.
    
    Tracing MSR accesses while in #MC is another no-no due to tracing being
    inherently a bad idea in atomic context:
    
      vmlinux.o: warning: objtool: do_machine_check()+0x4a: call to mce_rdmsrl() leaves .noinstr.text section
    
    so remove all that "additional" functionality from mce_rdmsrl() and
    provide it with a special exception handler which panics the machine
    when that MSR is not accessible.
    
    The exception handler prints a human-readable message explaining what
    the panic reason is but, what is more, it panics while in the #GP
    handler and latter won't have executed an IRET, thus opening the NMI
    nesting issue in the case when the #MC has happened while handling
    an NMI. (#MC itself won't be reenabled until MCG_STATUS hasn't been
    cleared).
    Suggested-by: NAndy Lutomirski <luto@kernel.org>
    Suggested-by: NPeter Zijlstra <peterz@infradead.org>
    [ Add missing prototypes for ex_handler_* ]
    Reported-by: Nkernel test robot <lkp@intel.com>
    Signed-off-by: NBorislav Petkov <bp@suse.de>
    Reviewed-by: NTony Luck <tony.luck@intel.com>
    Link: https://lkml.kernel.org/r/20200906212130.GA28456@zn.tnic
    e2def7d4
core.c 63.9 KB