• S
    ARM: tegra: Switch to new pinctrl driver · f30d12b3
    Stephen Warren 提交于
    * Rename old pinmux and new pinctrl platform driver and DT match table
      entries, so the new driver gets instantiated.
    * Re-write board-pinmux.c, so that it uses pinctrl APIs to configura the
      pinmux.
    * Re-write board-*-pinmux.c so that the pinmux configuration tables are
      in pinctrl format.
    
    Ventana's pin mux table needed some edits on top of the basic format
    conversion, since some mux options that were previously marked as
    reserved are now valid in the new pinctrl driver. Attempting to use the
    old reserved names will result in a failure. Specifically, groups lpw0,
    lpw2, lsc1, lsck, and lsda were changed from function rsvd4 to displaya,
    and group pta was changed from function rsvd2 to hdmi.
    
    All boards' pin mux tables needed some edits on top of the based format
    conversion, since function i2c was split into i2c1 (first general I2C
    controller) and i2cp (power I2C controller) to better align function
    definitions with HW blocks.
    
    Due to the split of mux tables into pure mux and pull/tristate tables,
    many entries in the separate Seaboard/Ventana tables could be merged
    into the common table, since the entries differed only in the portion
    in one of the tables, not both.
    
    Most pin groups allow configuration of mux, tri-state, and pull. However,
    some don't allow pull configuration, which is instead configured by new
    groups that only allow pull configuration. This is a reflection of the
    true HW capabilities, which weren't fully represented by the old pinmux
    driver. This required adding new pull table entries for those new groups,
    and setting many other entries' pull configuration to
    TEGRA_PINCONFIG_DONT_SET.
    Signed-off-by: NStephen Warren <swarren@nvidia.com>
    Acked-by: NLinus Walleij <linus.walleij@linaro.org>
    Acked-by: NOlof Johansson <olof@lixom.net>
    f30d12b3
board-paz00-pinmux.c 7.8 KB