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    [PATCH] Introduce mechanism for registering active regions of memory · c713216d
    Mel Gorman 提交于
    At a basic level, architectures define structures to record where active
    ranges of page frames are located.  Once located, the code to calculate zone
    sizes and holes in each architecture is very similar.  Some of this zone and
    hole sizing code is difficult to read for no good reason.  This set of patches
    eliminates the similar-looking architecture-specific code.
    
    The patches introduce a mechanism where architectures register where the
    active ranges of page frames are with add_active_range().  When all areas have
    been discovered, free_area_init_nodes() is called to initialise the pgdat and
    zones.  The zone sizes and holes are then calculated in an architecture
    independent manner.
    
    Patch 1 introduces the mechanism for registering and initialising PFN ranges
    Patch 2 changes ppc to use the mechanism - 139 arch-specific LOC removed
    Patch 3 changes x86 to use the mechanism - 136 arch-specific LOC removed
    Patch 4 changes x86_64 to use the mechanism - 74 arch-specific LOC removed
    Patch 5 changes ia64 to use the mechanism - 52 arch-specific LOC removed
    Patch 6 accounts for mem_map as a memory hole as the pages are not reclaimable.
    	It adjusts the watermarks slightly
    
    Tony Luck has successfully tested for ia64 on Itanium with tiger_defconfig,
    gensparse_defconfig and defconfig.  Bob Picco has also tested and debugged on
    IA64.  Jack Steiner successfully boot tested on a mammoth SGI IA64-based
    machine.  These were on patches against 2.6.17-rc1 and release 3 of these
    patches but there have been no ia64-changes since release 3.
    
    There are differences in the zone sizes for x86_64 as the arch-specific code
    for x86_64 accounts the kernel image and the starting mem_maps as memory holes
    but the architecture-independent code accounts the memory as present.
    
    The big benefit of this set of patches is a sizable reduction of
    architecture-specific code, some of which is very hairy.  There should be a
    greater reduction when other architectures use the same mechanisms for zone
    and hole sizing but I lack the hardware to test on.
    
    Additional credit;
    	Dave Hansen for the initial suggestion and comments on early patches
    	Andy Whitcroft for reviewing early versions and catching numerous
    		errors
    	Tony Luck for testing and debugging on IA64
    	Bob Picco for fixing bugs related to pfn registration, reviewing a
    		number of patch revisions, providing a number of suggestions
    		on future direction and testing heavily
    	Jack Steiner and Robin Holt for testing on IA64 and clarifying
    		issues related to memory holes
    	Yasunori for testing on IA64
    	Andi Kleen for reviewing and feeding back about x86_64
    	Christian Kujau for providing valuable information related to ACPI
    		problems on x86_64 and testing potential fixes
    
    This patch:
    
    Define the structure to represent an active range of page frames within a node
    in an architecture independent manner.  Architectures are expected to register
    active ranges of PFNs using add_active_range(nid, start_pfn, end_pfn) and call
    free_area_init_nodes() passing the PFNs of the end of each zone.
    Signed-off-by: NMel Gorman <mel@csn.ul.ie>
    Signed-off-by: NBob Picco <bob.picco@hp.com>
    Cc: Dave Hansen <haveblue@us.ibm.com>
    Cc: Andy Whitcroft <apw@shadowen.org>
    Cc: Andi Kleen <ak@muc.de>
    Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
    Cc: Paul Mackerras <paulus@samba.org>
    Cc: "Keith Mannthey" <kmannth@gmail.com>
    Cc: "Luck, Tony" <tony.luck@intel.com>
    Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
    Cc: Yasunori Goto <y-goto@jp.fujitsu.com>
    Signed-off-by: NAndrew Morton <akpm@osdl.org>
    Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
    c713216d
page_alloc.c 78.8 KB