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    arm64: Add L2 cache topology to ARM Ltd boards/models · 7934d69a
    Sudeep Holla 提交于
    Commit 5d425c18 ("arm64: kernel: add support for cpu cache
    information") adds cacheinfo support for ARM64. Since there's no
    architectural way of detecting the cpus that share particular cache,
    device tree can be used and the core cacheinfo already supports the
    same.
    
    This patch adds the L2 cache topology on Juno board, FVP/RTSM and
    foundation models.
    Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>
    Cc: Mark Rutland <mark.rutland@arm.com>
    Cc: Liviu Dudau <Liviu.Dudau@arm.com>
    Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Signed-off-by: NArnd Bergmann <arnd@arndb.de>
    7934d69a
rtsm_ve-aemv8a.dts 3.6 KB