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    OMAPDSS: DISPC: change sync_pclk_edge default value · 386f167c
    Tomi Valkeinen 提交于
    The common 'struct videomode' does not have a flag to select when the
    sync signals should be driven.
    
    The default behavior of DISPC HW is to drive the sync signal on the
    opposite pixel clock edge from data signal, which is also what the
    videomode_to_omap_video_timings() uses.
    
    However, it looks like what panels usually expect is that the data and
    sync signals are driven on the same edge, so let's change
    videomode_to_omap_video_timings() to set the sync_pclk_edge accordingly.
    
    Note that this only affect panels drivers that use
    videomode_to_omap_video_timings(), probably when getting the video
    timings directly from DT data. The drivers can still configure the
    sync_pclk_edge independently if they so wish.
    Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
    386f167c
display.c 8.0 KB