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由 Taniya Das 提交于
The clock disable signal for video_cc_vcodec0_core_clk is tied to vcodec0_gdsc which is supported in the HW control mode. Thus turning off the clock would be taken care automatically when the GDSC turns OFF by hardware and clock driver does not require to poll on the CLK_OFF bit. Signed-off-by: NTaniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/1581423235-21341-1-git-send-email-tdas@codeaurora.org Fixes: 253dc75a ("clk: qcom: Add video clock controller driver for SC7180") Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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