• R
    i2c: fix bus recovery stop mode timing · cf8ce8b8
    Russell King 提交于
    The I2C specification states that tsu:sto for standard mode timing must
    be at minimum 4us. Pictographically, this is:
    
    SCL: ____/~~~~~~~~~
    SDA: _________/~~~~
           ->|    |<- 4us minimum
    
    We are currently waiting 2.5us between asserting SCL and SDA, which is
    in violation of the standard. Adjust the timings to ensure that we meet
    what is stipulated as the minimum timings to ensure that all devices
    correctly interpret the STOP bus transition.
    
    This is more important than trying to generate a square wave with even
    duty cycle.
    Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
    Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
    cf8ce8b8
i2c-core-base.c 64.2 KB