• M
    MIPS: Correct FP ISA requirements · 2d83fea7
    Maciej W. Rozycki 提交于
    Correct ISA requirements for floating-point instructions:
    
    * the CU3 exception signifies a real COP3 instruction in MIPS I & II,
    
    * the BC1FL and BC1TL instructions are not supported in MIPS I,
    
    * the SQRT.fmt instructions are indeed supported in MIPS II,
    
    * the LDC1 and SDC1 instructions are indeed supported in MIPS32r1,
    
    * the CEIL.W.fmt, FLOOR.W.fmt, ROUND.W.fmt and TRUNC.W.fmt instructions
      are indeed supported in MIPS32,
    
    * the CVT.L.fmt and CVT.fmt.L instructions are indeed supported in
      MIPS32r2 and MIPS32r6,
    
    * the CEIL.L.fmt, FLOOR.L.fmt, ROUND.L.fmt and TRUNC.L.fmt instructions
      are indeed supported in MIPS32r2 and MIPS32r6,
    
    * the RSQRT.fmt and RECIP.fmt instructions are indeed supported in
      MIPS64r1,
    
    Also simplify conditionals for MIPS III and MIPS IV FPU instructions and
    the handling of the MOVCI minor opcode.
    Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/9700/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
    2d83fea7
cp1emu.c 51.5 KB