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    MIPS: Allow RIXI for 32-bit kernels on MIPS64 · 033549c6
    Paul Burton 提交于
    Commit a68d09a1 ("MIPS: Don't use RI/XI with 32-bit kernels on
    64-bit CPUs") prevented use of RIXI on MIPS64 systems, stating that the
    "TLB handlers cannot handle this case". What they actually couldn't
    handle was cases where there were less fill bits in the Entry{Lo,Hi}
    registers than bits used by software in PTEs. The handlers can now deal
    with this case, so enable RIXI for MIPS32 kernels on MIPS64 systems.
    
    Note that beyond the obvious benefits provided by having RIXI on such
    systems, this is required for systems implementing MIPSr6 where RIXI
    cannot be disabled.
    
    This reverts commit a68d09a1 ("MIPS: Don't use RI/XI with 32-bit
    kernels on 64-bit CPUs").
    Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
    Cc: linux-mips@linux-mips.org
    Cc: Joshua Kinard <kumba@gentoo.org>
    Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
    Cc: Maciej W. Rozycki <macro@linux-mips.org>
    Cc: linux-kernel@vger.kernel.org
    Cc: James Hogan <james.hogan@imgtec.com>
    Cc: Markos Chandras <markos.chandras@imgtec.com>
    Patchwork: https://patchwork.linux-mips.org/patch/11219/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
    033549c6
cpu-features.h 12.2 KB