intel.c 6.5 KB
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/*
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 * Intel CPU Microcode Update Driver for Linux
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 *
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 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
 *		 2006 Shaohua Li <shaohua.li@intel.com>
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 *
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 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
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 */
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#include <linux/firmware.h>
#include <linux/uaccess.h>
#include <linux/kernel.h>
#include <linux/module.h>
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#include <linux/vmalloc.h>
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#include <asm/microcode_intel.h>
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#include <asm/processor.h>
#include <asm/msr.h>
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MODULE_DESCRIPTION("Microcode Update Driver");
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MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
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MODULE_LICENSE("GPL");

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static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
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{
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	struct cpuinfo_x86 *c = &cpu_data(cpu_num);
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	unsigned int val[2];

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	memset(csig, 0, sizeof(*csig));
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	csig->sig = cpuid_eax(0x00000001);
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	if ((c->x86_model >= 5) || (c->x86 > 6)) {
		/* get processor flags from MSR 0x17 */
		rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
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		csig->pf = 1 << ((val[1] >> 18) & 7);
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	}

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	csig->rev = c->microcode;
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	pr_info("CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
		cpu_num, csig->sig, csig->pf, csig->rev);
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	return 0;
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}

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/*
 * return 0 - no update found
 * return 1 - found update
 */
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static int get_matching_mc(struct microcode_intel *mc_intel, int cpu)
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{
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	struct cpu_signature cpu_sig;
	unsigned int csig, cpf, crev;
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	collect_cpu_info(cpu, &cpu_sig);
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	csig = cpu_sig.sig;
	cpf = cpu_sig.pf;
	crev = cpu_sig.rev;
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	return has_newer_microcode(mc_intel, csig, cpf, crev);
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}

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static int apply_microcode_intel(int cpu)
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{
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	struct microcode_intel *mc_intel;
	struct ucode_cpu_info *uci;
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	unsigned int val[2];
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	int cpu_num = raw_smp_processor_id();
	struct cpuinfo_x86 *c = &cpu_data(cpu_num);
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	uci = ucode_cpu_info + cpu;
	mc_intel = uci->mc;
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	/* We should bind the task to the CPU */
	BUG_ON(cpu_num != cpu);

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	if (mc_intel == NULL)
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		return 0;
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	/*
	 * Microcode on this CPU could be updated earlier. Only apply the
	 * microcode patch in mc_intel when it is newer than the one on this
	 * CPU.
	 */
	if (get_matching_mc(mc_intel, cpu) == 0)
		return 0;

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	/* write microcode via MSR 0x79 */
	wrmsr(MSR_IA32_UCODE_WRITE,
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	      (unsigned long) mc_intel->bits,
	      (unsigned long) mc_intel->bits >> 16 >> 16);
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	wrmsr(MSR_IA32_UCODE_REV, 0, 0);

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	/* As documented in the SDM: Do a CPUID 1 here */
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	sync_core();
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	/* get the current revision from MSR 0x8B */
	rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);

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	if (val[1] != mc_intel->hdr.rev) {
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		pr_err("CPU%d update to revision 0x%x failed\n",
		       cpu_num, mc_intel->hdr.rev);
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		return -1;
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	}
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	pr_info("CPU%d updated to revision 0x%x, date = %04x-%02x-%02x\n",
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		cpu_num, val[1],
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		mc_intel->hdr.date & 0xffff,
		mc_intel->hdr.date >> 24,
		(mc_intel->hdr.date >> 16) & 0xff);
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	uci->cpu_sig.rev = val[1];
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	c->microcode = val[1];
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	return 0;
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}

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static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
				int (*get_ucode_data)(void *, const void *, size_t))
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{
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	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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	u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
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	int new_rev = uci->cpu_sig.rev;
	unsigned int leftover = size;
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	enum ucode_state state = UCODE_OK;
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	unsigned int curr_mc_size = 0;
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	unsigned int csig, cpf;
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	while (leftover) {
		struct microcode_header_intel mc_header;
		unsigned int mc_size;
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		if (leftover < sizeof(mc_header)) {
			pr_err("error! Truncated header in microcode data file\n");
			break;
		}

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		if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
			break;
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		mc_size = get_totalsize(&mc_header);
		if (!mc_size || mc_size > leftover) {
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			pr_err("error! Bad data in microcode data file\n");
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			break;
		}
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		/* For performance reasons, reuse mc area when possible */
		if (!mc || mc_size > curr_mc_size) {
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			vfree(mc);
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			mc = vmalloc(mc_size);
			if (!mc)
				break;
			curr_mc_size = mc_size;
		}
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		if (get_ucode_data(mc, ucode_ptr, mc_size) ||
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		    microcode_sanity_check(mc, 1) < 0) {
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			break;
		}

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		csig = uci->cpu_sig.sig;
		cpf = uci->cpu_sig.pf;
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		if (has_newer_microcode(mc, csig, cpf, new_rev)) {
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			vfree(new_mc);
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			new_rev = mc_header.rev;
			new_mc  = mc;
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			mc = NULL;	/* trigger new vmalloc */
		}
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		ucode_ptr += mc_size;
		leftover  -= mc_size;
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	}

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	vfree(mc);
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	if (leftover) {
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		vfree(new_mc);
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		state = UCODE_ERROR;
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		goto out;
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	}
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	if (!new_mc) {
		state = UCODE_NFOUND;
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		goto out;
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	}
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	vfree(uci->mc);
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	uci->mc = (struct microcode_intel *)new_mc;

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	/*
	 * If early loading microcode is supported, save this mc into
	 * permanent memory. So it will be loaded early when a CPU is hot added
	 * or resumes.
	 */
	save_mc_for_early(new_mc);

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	pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
		 cpu, new_rev, uci->cpu_sig.rev);
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out:
	return state;
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}

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static int get_ucode_fw(void *to, const void *from, size_t n)
{
	memcpy(to, from, n);
	return 0;
}
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static enum ucode_state request_microcode_fw(int cpu, struct device *device,
					     bool refresh_fw)
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{
	char name[30];
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	struct cpuinfo_x86 *c = &cpu_data(cpu);
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	const struct firmware *firmware;
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	enum ucode_state ret;
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	sprintf(name, "intel-ucode/%02x-%02x-%02x",
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		c->x86, c->x86_model, c->x86_mask);
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	if (request_firmware_direct(&firmware, name, device)) {
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		pr_debug("data file %s load failed\n", name);
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		return UCODE_NFOUND;
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	}
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	ret = generic_load_microcode(cpu, (void *)firmware->data,
				     firmware->size, &get_ucode_fw);
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	release_firmware(firmware);

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	return ret;
}

static int get_ucode_user(void *to, const void *from, size_t n)
{
	return copy_from_user(to, from, n);
}

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static enum ucode_state
request_microcode_user(int cpu, const void __user *buf, size_t size)
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{
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	return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
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}

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static void microcode_fini_cpu(int cpu)
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{
	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;

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	vfree(uci->mc);
	uci->mc = NULL;
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}
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static struct microcode_ops microcode_intel_ops = {
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	.request_microcode_user		  = request_microcode_user,
	.request_microcode_fw             = request_microcode_fw,
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	.collect_cpu_info                 = collect_cpu_info,
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	.apply_microcode                  = apply_microcode_intel,
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	.microcode_fini_cpu               = microcode_fini_cpu,
};

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struct microcode_ops * __init init_intel_microcode(void)
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{
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	struct cpuinfo_x86 *c = &cpu_data(0);

	if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
	    cpu_has(c, X86_FEATURE_IA64)) {
		pr_err("Intel CPU family 0x%x not supported\n", c->x86);
		return NULL;
	}

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	return &microcode_intel_ops;
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}