sdhci.c 43.5 KB
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/*
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 *  linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
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 *
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 *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
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 *
 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or (at
 * your option) any later version.
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 *
 * Thanks to the following companies for their support:
 *
 *     - JMicron (hardware and technical support)
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 */

#include <linux/delay.h>
#include <linux/highmem.h>
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#include <linux/io.h>
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#include <linux/dma-mapping.h>
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#include <linux/scatterlist.h>
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#include <linux/leds.h>

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#include <linux/mmc/host.h>

#include "sdhci.h"

#define DRIVER_NAME "sdhci"

#define DBG(f, x...) \
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	pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
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static unsigned int debug_quirks = 0;
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static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
static void sdhci_finish_data(struct sdhci_host *);

static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
static void sdhci_finish_command(struct sdhci_host *);

static void sdhci_dumpregs(struct sdhci_host *host)
{
	printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");

	printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
		readl(host->ioaddr + SDHCI_DMA_ADDRESS),
		readw(host->ioaddr + SDHCI_HOST_VERSION));
	printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
		readw(host->ioaddr + SDHCI_BLOCK_SIZE),
		readw(host->ioaddr + SDHCI_BLOCK_COUNT));
	printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
		readl(host->ioaddr + SDHCI_ARGUMENT),
		readw(host->ioaddr + SDHCI_TRANSFER_MODE));
	printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
		readl(host->ioaddr + SDHCI_PRESENT_STATE),
		readb(host->ioaddr + SDHCI_HOST_CONTROL));
	printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
		readb(host->ioaddr + SDHCI_POWER_CONTROL),
		readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
	printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
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		readb(host->ioaddr + SDHCI_WAKE_UP_CONTROL),
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		readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
	printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
		readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
		readl(host->ioaddr + SDHCI_INT_STATUS));
	printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
		readl(host->ioaddr + SDHCI_INT_ENABLE),
		readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
	printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
		readw(host->ioaddr + SDHCI_ACMD12_ERR),
		readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
	printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
		readl(host->ioaddr + SDHCI_CAPABILITIES),
		readl(host->ioaddr + SDHCI_MAX_CURRENT));

	printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
}

/*****************************************************************************\
 *                                                                           *
 * Low level functions                                                       *
 *                                                                           *
\*****************************************************************************/

static void sdhci_reset(struct sdhci_host *host, u8 mask)
{
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	unsigned long timeout;

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	if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
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		if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
			SDHCI_CARD_PRESENT))
			return;
	}

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	writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);

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	if (mask & SDHCI_RESET_ALL)
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		host->clock = 0;

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	/* Wait max 100 ms */
	timeout = 100;

	/* hw clears the bit when it's done */
	while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
		if (timeout == 0) {
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			printk(KERN_ERR "%s: Reset 0x%x never completed.\n",
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				mmc_hostname(host->mmc), (int)mask);
			sdhci_dumpregs(host);
			return;
		}
		timeout--;
		mdelay(1);
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	}
}

static void sdhci_init(struct sdhci_host *host)
{
	u32 intmask;

	sdhci_reset(host, SDHCI_RESET_ALL);

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	intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
		SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
		SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
		SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
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		SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
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		SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE |
		SDHCI_INT_ADMA_ERROR;
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	writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
	writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
}

static void sdhci_activate_led(struct sdhci_host *host)
{
	u8 ctrl;

	ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
	ctrl |= SDHCI_CTRL_LED;
	writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
}

static void sdhci_deactivate_led(struct sdhci_host *host)
{
	u8 ctrl;

	ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
	ctrl &= ~SDHCI_CTRL_LED;
	writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
}

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#ifdef CONFIG_LEDS_CLASS
static void sdhci_led_control(struct led_classdev *led,
	enum led_brightness brightness)
{
	struct sdhci_host *host = container_of(led, struct sdhci_host, led);
	unsigned long flags;

	spin_lock_irqsave(&host->lock, flags);

	if (brightness == LED_OFF)
		sdhci_deactivate_led(host);
	else
		sdhci_activate_led(host);

	spin_unlock_irqrestore(&host->lock, flags);
}
#endif

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/*****************************************************************************\
 *                                                                           *
 * Core functions                                                            *
 *                                                                           *
\*****************************************************************************/

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static void sdhci_read_block_pio(struct sdhci_host *host)
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{
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	unsigned long flags;
	size_t blksize, len, chunk;
	u32 scratch;
	u8 *buf;
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	DBG("PIO reading\n");
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	blksize = host->data->blksz;
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	chunk = 0;
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	local_irq_save(flags);
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	while (blksize) {
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		if (!sg_miter_next(&host->sg_miter))
			BUG();
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		len = min(host->sg_miter.length, blksize);
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		blksize -= len;
		host->sg_miter.consumed = len;
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		buf = host->sg_miter.addr;
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		while (len) {
			if (chunk == 0) {
				scratch = readl(host->ioaddr + SDHCI_BUFFER);
				chunk = 4;
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			}
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			*buf = scratch & 0xFF;

			buf++;
			scratch >>= 8;
			chunk--;
			len--;
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		}
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	}
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	sg_miter_stop(&host->sg_miter);

	local_irq_restore(flags);
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}
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static void sdhci_write_block_pio(struct sdhci_host *host)
{
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	unsigned long flags;
	size_t blksize, len, chunk;
	u32 scratch;
	u8 *buf;
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	DBG("PIO writing\n");

	blksize = host->data->blksz;
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	chunk = 0;
	scratch = 0;
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	local_irq_save(flags);
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	while (blksize) {
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		if (!sg_miter_next(&host->sg_miter))
			BUG();
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		len = min(host->sg_miter.length, blksize);

		blksize -= len;
		host->sg_miter.consumed = len;

		buf = host->sg_miter.addr;
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		while (len) {
			scratch |= (u32)*buf << (chunk * 8);

			buf++;
			chunk++;
			len--;

			if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
				writel(scratch, host->ioaddr + SDHCI_BUFFER);
				chunk = 0;
				scratch = 0;
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			}
		}
	}
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	sg_miter_stop(&host->sg_miter);

	local_irq_restore(flags);
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}

static void sdhci_transfer_pio(struct sdhci_host *host)
{
	u32 mask;

	BUG_ON(!host->data);

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	if (host->blocks == 0)
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		return;

	if (host->data->flags & MMC_DATA_READ)
		mask = SDHCI_DATA_AVAILABLE;
	else
		mask = SDHCI_SPACE_AVAILABLE;

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	/*
	 * Some controllers (JMicron JMB38x) mess up the buffer bits
	 * for transfers < 4 bytes. As long as it is just one block,
	 * we can ignore the bits.
	 */
	if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) &&
		(host->data->blocks == 1))
		mask = ~0;

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	while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
		if (host->data->flags & MMC_DATA_READ)
			sdhci_read_block_pio(host);
		else
			sdhci_write_block_pio(host);
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		host->blocks--;
		if (host->blocks == 0)
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			break;
	}
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	DBG("PIO transfer complete.\n");
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}

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static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags)
{
	local_irq_save(*flags);
	return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
}

static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags)
{
	kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
	local_irq_restore(*flags);
}

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static int sdhci_adma_table_pre(struct sdhci_host *host,
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	struct mmc_data *data)
{
	int direction;

	u8 *desc;
	u8 *align;
	dma_addr_t addr;
	dma_addr_t align_addr;
	int len, offset;

	struct scatterlist *sg;
	int i;
	char *buffer;
	unsigned long flags;

	/*
	 * The spec does not specify endianness of descriptor table.
	 * We currently guess that it is LE.
	 */

	if (data->flags & MMC_DATA_READ)
		direction = DMA_FROM_DEVICE;
	else
		direction = DMA_TO_DEVICE;

	/*
	 * The ADMA descriptor table is mapped further down as we
	 * need to fill it with data first.
	 */

	host->align_addr = dma_map_single(mmc_dev(host->mmc),
		host->align_buffer, 128 * 4, direction);
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	if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr))
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		goto fail;
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	BUG_ON(host->align_addr & 0x3);

	host->sg_count = dma_map_sg(mmc_dev(host->mmc),
		data->sg, data->sg_len, direction);
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	if (host->sg_count == 0)
		goto unmap_align;
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	desc = host->adma_desc;
	align = host->align_buffer;

	align_addr = host->align_addr;

	for_each_sg(data->sg, sg, host->sg_count, i) {
		addr = sg_dma_address(sg);
		len = sg_dma_len(sg);

		/*
		 * The SDHCI specification states that ADMA
		 * addresses must be 32-bit aligned. If they
		 * aren't, then we use a bounce buffer for
		 * the (up to three) bytes that screw up the
		 * alignment.
		 */
		offset = (4 - (addr & 0x3)) & 0x3;
		if (offset) {
			if (data->flags & MMC_DATA_WRITE) {
				buffer = sdhci_kmap_atomic(sg, &flags);
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				WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
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				memcpy(align, buffer, offset);
				sdhci_kunmap_atomic(buffer, &flags);
			}

			desc[7] = (align_addr >> 24) & 0xff;
			desc[6] = (align_addr >> 16) & 0xff;
			desc[5] = (align_addr >> 8) & 0xff;
			desc[4] = (align_addr >> 0) & 0xff;

			BUG_ON(offset > 65536);

			desc[3] = (offset >> 8) & 0xff;
			desc[2] = (offset >> 0) & 0xff;

			desc[1] = 0x00;
			desc[0] = 0x21; /* tran, valid */

			align += 4;
			align_addr += 4;

			desc += 8;

			addr += offset;
			len -= offset;
		}

		desc[7] = (addr >> 24) & 0xff;
		desc[6] = (addr >> 16) & 0xff;
		desc[5] = (addr >> 8) & 0xff;
		desc[4] = (addr >> 0) & 0xff;

		BUG_ON(len > 65536);

		desc[3] = (len >> 8) & 0xff;
		desc[2] = (len >> 0) & 0xff;

		desc[1] = 0x00;
		desc[0] = 0x21; /* tran, valid */

		desc += 8;

		/*
		 * If this triggers then we have a calculation bug
		 * somewhere. :/
		 */
		WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4);
	}

	/*
	 * Add a terminating entry.
	 */
	desc[7] = 0;
	desc[6] = 0;
	desc[5] = 0;
	desc[4] = 0;

	desc[3] = 0;
	desc[2] = 0;

	desc[1] = 0x00;
	desc[0] = 0x03; /* nop, end, valid */

	/*
	 * Resync align buffer as we might have changed it.
	 */
	if (data->flags & MMC_DATA_WRITE) {
		dma_sync_single_for_device(mmc_dev(host->mmc),
			host->align_addr, 128 * 4, direction);
	}

	host->adma_addr = dma_map_single(mmc_dev(host->mmc),
		host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE);
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	if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr))
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		goto unmap_entries;
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	BUG_ON(host->adma_addr & 0x3);
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	return 0;

unmap_entries:
	dma_unmap_sg(mmc_dev(host->mmc), data->sg,
		data->sg_len, direction);
unmap_align:
	dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
		128 * 4, direction);
fail:
	return -EINVAL;
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}

static void sdhci_adma_table_post(struct sdhci_host *host,
	struct mmc_data *data)
{
	int direction;

	struct scatterlist *sg;
	int i, size;
	u8 *align;
	char *buffer;
	unsigned long flags;

	if (data->flags & MMC_DATA_READ)
		direction = DMA_FROM_DEVICE;
	else
		direction = DMA_TO_DEVICE;

	dma_unmap_single(mmc_dev(host->mmc), host->adma_addr,
		(128 * 2 + 1) * 4, DMA_TO_DEVICE);

	dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
		128 * 4, direction);

	if (data->flags & MMC_DATA_READ) {
		dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg,
			data->sg_len, direction);

		align = host->align_buffer;

		for_each_sg(data->sg, sg, host->sg_count, i) {
			if (sg_dma_address(sg) & 0x3) {
				size = 4 - (sg_dma_address(sg) & 0x3);

				buffer = sdhci_kmap_atomic(sg, &flags);
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				WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
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				memcpy(buffer, align, size);
				sdhci_kunmap_atomic(buffer, &flags);

				align += 4;
			}
		}
	}

	dma_unmap_sg(mmc_dev(host->mmc), data->sg,
		data->sg_len, direction);
}

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static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_data *data)
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{
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	u8 count;
	unsigned target_timeout, current_timeout;
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	/*
	 * If the host controller provides us with an incorrect timeout
	 * value, just skip the check and use 0xE.  The hardware may take
	 * longer to time out, but that's much better than having a too-short
	 * timeout value.
	 */
	if ((host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL))
		return 0xE;
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	/* timeout in us */
	target_timeout = data->timeout_ns / 1000 +
		data->timeout_clks / host->clock;
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	/*
	 * Figure out needed cycles.
	 * We do this in steps in order to fit inside a 32 bit int.
	 * The first step is the minimum timeout, which will have a
	 * minimum resolution of 6 bits:
	 * (1) 2^13*1000 > 2^22,
	 * (2) host->timeout_clk < 2^16
	 *     =>
	 *     (1) / (2) > 2^6
	 */
	count = 0;
	current_timeout = (1 << 13) * 1000 / host->timeout_clk;
	while (current_timeout < target_timeout) {
		count++;
		current_timeout <<= 1;
		if (count >= 0xF)
			break;
	}

	if (count >= 0xF) {
		printk(KERN_WARNING "%s: Too large timeout requested!\n",
			mmc_hostname(host->mmc));
		count = 0xE;
	}

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	return count;
}

static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
{
	u8 count;
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	u8 ctrl;
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	int ret;
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	WARN_ON(host->data);

	if (data == NULL)
		return;

	/* Sanity checks */
	BUG_ON(data->blksz * data->blocks > 524288);
	BUG_ON(data->blksz > host->mmc->max_blk_size);
	BUG_ON(data->blocks > 65535);

	host->data = data;
	host->data_early = 0;

	count = sdhci_calc_timeout(host, data);
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	writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
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	if (host->flags & SDHCI_USE_DMA)
		host->flags |= SDHCI_REQ_USE_DMA;

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	/*
	 * FIXME: This doesn't account for merging when mapping the
	 * scatterlist.
	 */
	if (host->flags & SDHCI_REQ_USE_DMA) {
		int broken, i;
		struct scatterlist *sg;

		broken = 0;
		if (host->flags & SDHCI_USE_ADMA) {
			if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
				broken = 1;
		} else {
			if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE)
				broken = 1;
		}

		if (unlikely(broken)) {
			for_each_sg(data->sg, sg, data->sg_len, i) {
				if (sg->length & 0x3) {
					DBG("Reverting to PIO because of "
						"transfer size (%d)\n",
						sg->length);
					host->flags &= ~SDHCI_REQ_USE_DMA;
					break;
				}
			}
		}
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	}

	/*
	 * The assumption here being that alignment is the same after
	 * translation to device address space.
	 */
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	if (host->flags & SDHCI_REQ_USE_DMA) {
		int broken, i;
		struct scatterlist *sg;

		broken = 0;
		if (host->flags & SDHCI_USE_ADMA) {
			/*
			 * As we use 3 byte chunks to work around
			 * alignment problems, we need to check this
			 * quirk.
			 */
			if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
				broken = 1;
		} else {
			if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR)
				broken = 1;
		}

		if (unlikely(broken)) {
			for_each_sg(data->sg, sg, data->sg_len, i) {
				if (sg->offset & 0x3) {
					DBG("Reverting to PIO because of "
						"bad alignment\n");
					host->flags &= ~SDHCI_REQ_USE_DMA;
					break;
				}
			}
		}
	}

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	if (host->flags & SDHCI_REQ_USE_DMA) {
		if (host->flags & SDHCI_USE_ADMA) {
			ret = sdhci_adma_table_pre(host, data);
			if (ret) {
				/*
				 * This only happens when someone fed
				 * us an invalid request.
				 */
				WARN_ON(1);
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				host->flags &= ~SDHCI_REQ_USE_DMA;
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			} else {
				writel(host->adma_addr,
					host->ioaddr + SDHCI_ADMA_ADDRESS);
			}
		} else {
663
			int sg_cnt;
664

665
			sg_cnt = dma_map_sg(mmc_dev(host->mmc),
666 667 668 669
					data->sg, data->sg_len,
					(data->flags & MMC_DATA_READ) ?
						DMA_FROM_DEVICE :
						DMA_TO_DEVICE);
670
			if (sg_cnt == 0) {
671 672 673 674 675
				/*
				 * This only happens when someone fed
				 * us an invalid request.
				 */
				WARN_ON(1);
676
				host->flags &= ~SDHCI_REQ_USE_DMA;
677
			} else {
678
				WARN_ON(sg_cnt != 1);
679 680 681 682 683 684
				writel(sg_dma_address(data->sg),
					host->ioaddr + SDHCI_DMA_ADDRESS);
			}
		}
	}

685 686 687 688 689 690 691 692 693 694 695 696 697 698
	/*
	 * Always adjust the DMA selection as some controllers
	 * (e.g. JMicron) can't do PIO properly when the selection
	 * is ADMA.
	 */
	if (host->version >= SDHCI_SPEC_200) {
		ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
		ctrl &= ~SDHCI_CTRL_DMA_MASK;
		if ((host->flags & SDHCI_REQ_USE_DMA) &&
			(host->flags & SDHCI_USE_ADMA))
			ctrl |= SDHCI_CTRL_ADMA32;
		else
			ctrl |= SDHCI_CTRL_SDMA;
		writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
699 700
	}

701
	if (!(host->flags & SDHCI_REQ_USE_DMA)) {
702 703 704
		sg_miter_start(&host->sg_miter,
			data->sg, data->sg_len, SG_MITER_ATOMIC);
		host->blocks = data->blocks;
705
	}
706

707 708 709
	/* We do not handle DMA boundaries, so set it to max (512 KiB) */
	writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
		host->ioaddr + SDHCI_BLOCK_SIZE);
710 711 712 713 714 715 716 717 718 719 720
	writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
}

static void sdhci_set_transfer_mode(struct sdhci_host *host,
	struct mmc_data *data)
{
	u16 mode;

	if (data == NULL)
		return;

721 722
	WARN_ON(!host->data);

723 724 725 726 727
	mode = SDHCI_TRNS_BLK_CNT_EN;
	if (data->blocks > 1)
		mode |= SDHCI_TRNS_MULTI;
	if (data->flags & MMC_DATA_READ)
		mode |= SDHCI_TRNS_READ;
728
	if (host->flags & SDHCI_REQ_USE_DMA)
729 730 731
		mode |= SDHCI_TRNS_DMA;

	writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
732 733 734 735 736 737 738 739 740 741 742
}

static void sdhci_finish_data(struct sdhci_host *host)
{
	struct mmc_data *data;

	BUG_ON(!host->data);

	data = host->data;
	host->data = NULL;

743
	if (host->flags & SDHCI_REQ_USE_DMA) {
744 745 746 747 748 749 750
		if (host->flags & SDHCI_USE_ADMA)
			sdhci_adma_table_post(host, data);
		else {
			dma_unmap_sg(mmc_dev(host->mmc), data->sg,
				data->sg_len, (data->flags & MMC_DATA_READ) ?
					DMA_FROM_DEVICE : DMA_TO_DEVICE);
		}
751 752 753
	}

	/*
754 755 756 757 758
	 * The specification states that the block count register must
	 * be updated, but it does not specify at what point in the
	 * data flow. That makes the register entirely useless to read
	 * back so we have to assume that nothing made it to the card
	 * in the event of an error.
759
	 */
760 761
	if (data->error)
		data->bytes_xfered = 0;
762
	else
763
		data->bytes_xfered = data->blksz * data->blocks;
764 765 766 767 768 769

	if (data->stop) {
		/*
		 * The controller needs a reset of internal state machines
		 * upon error conditions.
		 */
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Pierre Ossman 已提交
770
		if (data->error) {
771 772 773 774 775 776 777 778 779 780 781 782
			sdhci_reset(host, SDHCI_RESET_CMD);
			sdhci_reset(host, SDHCI_RESET_DATA);
		}

		sdhci_send_command(host, data->stop);
	} else
		tasklet_schedule(&host->finish_tasklet);
}

static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
{
	int flags;
783
	u32 mask;
784
	unsigned long timeout;
785 786 787 788

	WARN_ON(host->cmd);

	/* Wait max 10 ms */
789
	timeout = 10;
790 791 792 793 794 795 796 797 798 799 800

	mask = SDHCI_CMD_INHIBIT;
	if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
		mask |= SDHCI_DATA_INHIBIT;

	/* We shouldn't wait for data inihibit for stop commands, even
	   though they might use busy signaling */
	if (host->mrq->data && (cmd == host->mrq->data->stop))
		mask &= ~SDHCI_DATA_INHIBIT;

	while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
801
		if (timeout == 0) {
802
			printk(KERN_ERR "%s: Controller never released "
P
Pierre Ossman 已提交
803
				"inhibit bit(s).\n", mmc_hostname(host->mmc));
804
			sdhci_dumpregs(host);
P
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805
			cmd->error = -EIO;
806 807 808
			tasklet_schedule(&host->finish_tasklet);
			return;
		}
809 810 811
		timeout--;
		mdelay(1);
	}
812 813 814 815 816 817 818 819 820

	mod_timer(&host->timer, jiffies + 10 * HZ);

	host->cmd = cmd;

	sdhci_prepare_data(host, cmd->data);

	writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);

821 822
	sdhci_set_transfer_mode(host, cmd->data);

823
	if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
P
Pierre Ossman 已提交
824
		printk(KERN_ERR "%s: Unsupported response type!\n",
825
			mmc_hostname(host->mmc));
P
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826
		cmd->error = -EINVAL;
827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846
		tasklet_schedule(&host->finish_tasklet);
		return;
	}

	if (!(cmd->flags & MMC_RSP_PRESENT))
		flags = SDHCI_CMD_RESP_NONE;
	else if (cmd->flags & MMC_RSP_136)
		flags = SDHCI_CMD_RESP_LONG;
	else if (cmd->flags & MMC_RSP_BUSY)
		flags = SDHCI_CMD_RESP_SHORT_BUSY;
	else
		flags = SDHCI_CMD_RESP_SHORT;

	if (cmd->flags & MMC_RSP_CRC)
		flags |= SDHCI_CMD_CRC;
	if (cmd->flags & MMC_RSP_OPCODE)
		flags |= SDHCI_CMD_INDEX;
	if (cmd->data)
		flags |= SDHCI_CMD_DATA;

847
	writew(SDHCI_MAKE_CMD(cmd->opcode, flags),
848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872
		host->ioaddr + SDHCI_COMMAND);
}

static void sdhci_finish_command(struct sdhci_host *host)
{
	int i;

	BUG_ON(host->cmd == NULL);

	if (host->cmd->flags & MMC_RSP_PRESENT) {
		if (host->cmd->flags & MMC_RSP_136) {
			/* CRC is stripped so we need to do some shifting. */
			for (i = 0;i < 4;i++) {
				host->cmd->resp[i] = readl(host->ioaddr +
					SDHCI_RESPONSE + (3-i)*4) << 8;
				if (i != 3)
					host->cmd->resp[i] |=
						readb(host->ioaddr +
						SDHCI_RESPONSE + (3-i)*4-1);
			}
		} else {
			host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
		}
	}

P
Pierre Ossman 已提交
873
	host->cmd->error = 0;
874

875 876 877 878
	if (host->data && host->data_early)
		sdhci_finish_data(host);

	if (!host->cmd->data)
879 880 881 882 883 884 885 886 887
		tasklet_schedule(&host->finish_tasklet);

	host->cmd = NULL;
}

static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
{
	int div;
	u16 clk;
888
	unsigned long timeout;
889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908

	if (clock == host->clock)
		return;

	writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);

	if (clock == 0)
		goto out;

	for (div = 1;div < 256;div *= 2) {
		if ((host->max_clk / div) <= clock)
			break;
	}
	div >>= 1;

	clk = div << SDHCI_DIVIDER_SHIFT;
	clk |= SDHCI_CLOCK_INT_EN;
	writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);

	/* Wait max 10 ms */
909 910 911 912
	timeout = 10;
	while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
		& SDHCI_CLOCK_INT_STABLE)) {
		if (timeout == 0) {
P
Pierre Ossman 已提交
913 914
			printk(KERN_ERR "%s: Internal clock never "
				"stabilised.\n", mmc_hostname(host->mmc));
915 916 917
			sdhci_dumpregs(host);
			return;
		}
918 919 920
		timeout--;
		mdelay(1);
	}
921 922 923 924 925 926 927 928

	clk |= SDHCI_CLOCK_CARD_EN;
	writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);

out:
	host->clock = clock;
}

929 930 931 932 933 934 935
static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
{
	u8 pwr;

	if (host->power == power)
		return;

936 937
	if (power == (unsigned short)-1) {
		writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
938
		goto out;
939 940 941 942 943 944
	}

	/*
	 * Spec says that we should clear the power reg before setting
	 * a new value. Some controllers don't seem to like this though.
	 */
945
	if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
946
		writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
947 948 949

	pwr = SDHCI_POWER_ON;

950
	switch (1 << power) {
951
	case MMC_VDD_165_195:
952 953
		pwr |= SDHCI_POWER_180;
		break;
954 955
	case MMC_VDD_29_30:
	case MMC_VDD_30_31:
956 957
		pwr |= SDHCI_POWER_300;
		break;
958 959
	case MMC_VDD_32_33:
	case MMC_VDD_33_34:
960 961 962 963 964 965
		pwr |= SDHCI_POWER_330;
		break;
	default:
		BUG();
	}

966
	/*
967
	 * At least the Marvell CaFe chip gets confused if we set the voltage
968 969
	 * and set turn on power at the same time, so set the voltage first.
	 */
970
	if ((host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER))
971 972 973
		writeb(pwr & ~SDHCI_POWER_ON,
				host->ioaddr + SDHCI_POWER_CONTROL);

974 975 976 977 978 979
	writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);

out:
	host->power = power;
}

980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996
/*****************************************************************************\
 *                                                                           *
 * MMC callbacks                                                             *
 *                                                                           *
\*****************************************************************************/

static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
{
	struct sdhci_host *host;
	unsigned long flags;

	host = mmc_priv(mmc);

	spin_lock_irqsave(&host->lock, flags);

	WARN_ON(host->mrq != NULL);

997
#ifndef CONFIG_LEDS_CLASS
998
	sdhci_activate_led(host);
999
#endif
1000 1001 1002

	host->mrq = mrq;

P
Pierre Ossman 已提交
1003 1004
	if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)
		|| (host->flags & SDHCI_DEVICE_DEAD)) {
P
Pierre Ossman 已提交
1005
		host->mrq->cmd->error = -ENOMEDIUM;
1006 1007 1008 1009
		tasklet_schedule(&host->finish_tasklet);
	} else
		sdhci_send_command(host, mrq->cmd);

1010
	mmiowb();
1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023
	spin_unlock_irqrestore(&host->lock, flags);
}

static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
	struct sdhci_host *host;
	unsigned long flags;
	u8 ctrl;

	host = mmc_priv(mmc);

	spin_lock_irqsave(&host->lock, flags);

P
Pierre Ossman 已提交
1024 1025 1026
	if (host->flags & SDHCI_DEVICE_DEAD)
		goto out;

1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038
	/*
	 * Reset the chip on each power off.
	 * Should clear out any weird states.
	 */
	if (ios->power_mode == MMC_POWER_OFF) {
		writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
		sdhci_init(host);
	}

	sdhci_set_clock(host, ios->clock);

	if (ios->power_mode == MMC_POWER_OFF)
1039
		sdhci_set_power(host, -1);
1040
	else
1041
		sdhci_set_power(host, ios->vdd);
1042 1043

	ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
1044

1045 1046 1047 1048
	if (ios->bus_width == MMC_BUS_WIDTH_4)
		ctrl |= SDHCI_CTRL_4BITBUS;
	else
		ctrl &= ~SDHCI_CTRL_4BITBUS;
1049 1050 1051 1052 1053 1054

	if (ios->timing == MMC_TIMING_SD_HS)
		ctrl |= SDHCI_CTRL_HISPD;
	else
		ctrl &= ~SDHCI_CTRL_HISPD;

1055 1056
	writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);

1057 1058 1059 1060 1061
	/*
	 * Some (ENE) controllers go apeshit on some ios operation,
	 * signalling timeout and CRC errors even on CMD0. Resetting
	 * it on each ios seems to solve the problem.
	 */
1062
	if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS)
1063 1064
		sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);

P
Pierre Ossman 已提交
1065
out:
1066
	mmiowb();
1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079
	spin_unlock_irqrestore(&host->lock, flags);
}

static int sdhci_get_ro(struct mmc_host *mmc)
{
	struct sdhci_host *host;
	unsigned long flags;
	int present;

	host = mmc_priv(mmc);

	spin_lock_irqsave(&host->lock, flags);

P
Pierre Ossman 已提交
1080 1081 1082 1083
	if (host->flags & SDHCI_DEVICE_DEAD)
		present = 0;
	else
		present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
1084 1085 1086 1087 1088 1089

	spin_unlock_irqrestore(&host->lock, flags);

	return !(present & SDHCI_WRITE_PROTECT);
}

P
Pierre Ossman 已提交
1090 1091 1092 1093 1094 1095 1096 1097 1098 1099
static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable)
{
	struct sdhci_host *host;
	unsigned long flags;
	u32 ier;

	host = mmc_priv(mmc);

	spin_lock_irqsave(&host->lock, flags);

P
Pierre Ossman 已提交
1100 1101 1102
	if (host->flags & SDHCI_DEVICE_DEAD)
		goto out;

P
Pierre Ossman 已提交
1103 1104 1105 1106 1107 1108 1109 1110 1111
	ier = readl(host->ioaddr + SDHCI_INT_ENABLE);

	ier &= ~SDHCI_INT_CARD_INT;
	if (enable)
		ier |= SDHCI_INT_CARD_INT;

	writel(ier, host->ioaddr + SDHCI_INT_ENABLE);
	writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE);

P
Pierre Ossman 已提交
1112
out:
P
Pierre Ossman 已提交
1113 1114 1115 1116 1117
	mmiowb();

	spin_unlock_irqrestore(&host->lock, flags);
}

1118
static const struct mmc_host_ops sdhci_ops = {
1119 1120 1121
	.request	= sdhci_request,
	.set_ios	= sdhci_set_ios,
	.get_ro		= sdhci_get_ro,
P
Pierre Ossman 已提交
1122
	.enable_sdio_irq = sdhci_enable_sdio_irq,
1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149
};

/*****************************************************************************\
 *                                                                           *
 * Tasklets                                                                  *
 *                                                                           *
\*****************************************************************************/

static void sdhci_tasklet_card(unsigned long param)
{
	struct sdhci_host *host;
	unsigned long flags;

	host = (struct sdhci_host*)param;

	spin_lock_irqsave(&host->lock, flags);

	if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
		if (host->mrq) {
			printk(KERN_ERR "%s: Card removed during transfer!\n",
				mmc_hostname(host->mmc));
			printk(KERN_ERR "%s: Resetting controller.\n",
				mmc_hostname(host->mmc));

			sdhci_reset(host, SDHCI_RESET_CMD);
			sdhci_reset(host, SDHCI_RESET_DATA);

P
Pierre Ossman 已提交
1150
			host->mrq->cmd->error = -ENOMEDIUM;
1151 1152 1153 1154 1155 1156
			tasklet_schedule(&host->finish_tasklet);
		}
	}

	spin_unlock_irqrestore(&host->lock, flags);

P
Pierre Ossman 已提交
1157
	mmc_detect_change(host->mmc, msecs_to_jiffies(200));
1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177
}

static void sdhci_tasklet_finish(unsigned long param)
{
	struct sdhci_host *host;
	unsigned long flags;
	struct mmc_request *mrq;

	host = (struct sdhci_host*)param;

	spin_lock_irqsave(&host->lock, flags);

	del_timer(&host->timer);

	mrq = host->mrq;

	/*
	 * The controller needs a reset of internal state machines
	 * upon error conditions.
	 */
P
Pierre Ossman 已提交
1178 1179 1180 1181 1182
	if (!(host->flags & SDHCI_DEVICE_DEAD) &&
		(mrq->cmd->error ||
		 (mrq->data && (mrq->data->error ||
		  (mrq->data->stop && mrq->data->stop->error))) ||
		   (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) {
1183 1184

		/* Some controllers need this kick or reset won't work here */
1185
		if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
1186 1187 1188 1189 1190 1191 1192 1193 1194 1195
			unsigned int clock;

			/* This is to force an update */
			clock = host->clock;
			host->clock = 0;
			sdhci_set_clock(host, clock);
		}

		/* Spec says we should do both at the same time, but Ricoh
		   controllers do not like that. */
1196 1197 1198 1199 1200 1201 1202 1203
		sdhci_reset(host, SDHCI_RESET_CMD);
		sdhci_reset(host, SDHCI_RESET_DATA);
	}

	host->mrq = NULL;
	host->cmd = NULL;
	host->data = NULL;

1204
#ifndef CONFIG_LEDS_CLASS
1205
	sdhci_deactivate_led(host);
1206
#endif
1207

1208
	mmiowb();
1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223
	spin_unlock_irqrestore(&host->lock, flags);

	mmc_request_done(host->mmc, mrq);
}

static void sdhci_timeout_timer(unsigned long data)
{
	struct sdhci_host *host;
	unsigned long flags;

	host = (struct sdhci_host*)data;

	spin_lock_irqsave(&host->lock, flags);

	if (host->mrq) {
P
Pierre Ossman 已提交
1224 1225
		printk(KERN_ERR "%s: Timeout waiting for hardware "
			"interrupt.\n", mmc_hostname(host->mmc));
1226 1227 1228
		sdhci_dumpregs(host);

		if (host->data) {
P
Pierre Ossman 已提交
1229
			host->data->error = -ETIMEDOUT;
1230 1231 1232
			sdhci_finish_data(host);
		} else {
			if (host->cmd)
P
Pierre Ossman 已提交
1233
				host->cmd->error = -ETIMEDOUT;
1234
			else
P
Pierre Ossman 已提交
1235
				host->mrq->cmd->error = -ETIMEDOUT;
1236 1237 1238 1239 1240

			tasklet_schedule(&host->finish_tasklet);
		}
	}

1241
	mmiowb();
1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255
	spin_unlock_irqrestore(&host->lock, flags);
}

/*****************************************************************************\
 *                                                                           *
 * Interrupt handling                                                        *
 *                                                                           *
\*****************************************************************************/

static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
{
	BUG_ON(intmask == 0);

	if (!host->cmd) {
1256 1257 1258
		printk(KERN_ERR "%s: Got command interrupt 0x%08x even "
			"though no command operation was in progress.\n",
			mmc_hostname(host->mmc), (unsigned)intmask);
1259 1260 1261 1262
		sdhci_dumpregs(host);
		return;
	}

1263
	if (intmask & SDHCI_INT_TIMEOUT)
P
Pierre Ossman 已提交
1264 1265 1266 1267
		host->cmd->error = -ETIMEDOUT;
	else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
			SDHCI_INT_INDEX))
		host->cmd->error = -EILSEQ;
1268

1269
	if (host->cmd->error) {
1270
		tasklet_schedule(&host->finish_tasklet);
1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293
		return;
	}

	/*
	 * The host can send and interrupt when the busy state has
	 * ended, allowing us to wait without wasting CPU cycles.
	 * Unfortunately this is overloaded on the "data complete"
	 * interrupt, so we need to take some care when handling
	 * it.
	 *
	 * Note: The 1.0 specification is a bit ambiguous about this
	 *       feature so there might be some problems with older
	 *       controllers.
	 */
	if (host->cmd->flags & MMC_RSP_BUSY) {
		if (host->cmd->data)
			DBG("Cannot wait for busy signal when also "
				"doing a data transfer");
		else
			return;
	}

	if (intmask & SDHCI_INT_RESPONSE)
1294
		sdhci_finish_command(host);
1295 1296 1297 1298 1299 1300 1301 1302
}

static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
{
	BUG_ON(intmask == 0);

	if (!host->data) {
		/*
1303 1304 1305
		 * The "data complete" interrupt is also used to
		 * indicate that a busy state has ended. See comment
		 * above in sdhci_cmd_irq().
1306
		 */
1307 1308 1309 1310 1311 1312
		if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
			if (intmask & SDHCI_INT_DATA_END) {
				sdhci_finish_command(host);
				return;
			}
		}
1313

1314 1315 1316
		printk(KERN_ERR "%s: Got data interrupt 0x%08x even "
			"though no data operation was in progress.\n",
			mmc_hostname(host->mmc), (unsigned)intmask);
1317 1318 1319 1320 1321 1322
		sdhci_dumpregs(host);

		return;
	}

	if (intmask & SDHCI_INT_DATA_TIMEOUT)
P
Pierre Ossman 已提交
1323 1324 1325
		host->data->error = -ETIMEDOUT;
	else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT))
		host->data->error = -EILSEQ;
1326 1327
	else if (intmask & SDHCI_INT_ADMA_ERROR)
		host->data->error = -EIO;
1328

P
Pierre Ossman 已提交
1329
	if (host->data->error)
1330 1331
		sdhci_finish_data(host);
	else {
P
Pierre Ossman 已提交
1332
		if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1333 1334
			sdhci_transfer_pio(host);

1335 1336 1337 1338 1339 1340 1341 1342 1343
		/*
		 * We currently don't do anything fancy with DMA
		 * boundaries, but as we can't disable the feature
		 * we need to at least restart the transfer.
		 */
		if (intmask & SDHCI_INT_DMA_END)
			writel(readl(host->ioaddr + SDHCI_DMA_ADDRESS),
				host->ioaddr + SDHCI_DMA_ADDRESS);

1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355
		if (intmask & SDHCI_INT_DATA_END) {
			if (host->cmd) {
				/*
				 * Data managed to finish before the
				 * command completed. Make sure we do
				 * things in the proper order.
				 */
				host->data_early = 1;
			} else {
				sdhci_finish_data(host);
			}
		}
1356 1357 1358
	}
}

1359
static irqreturn_t sdhci_irq(int irq, void *dev_id)
1360 1361 1362 1363
{
	irqreturn_t result;
	struct sdhci_host* host = dev_id;
	u32 intmask;
P
Pierre Ossman 已提交
1364
	int cardint = 0;
1365 1366 1367 1368 1369

	spin_lock(&host->lock);

	intmask = readl(host->ioaddr + SDHCI_INT_STATUS);

1370
	if (!intmask || intmask == 0xffffffff) {
1371 1372 1373 1374
		result = IRQ_NONE;
		goto out;
	}

1375 1376
	DBG("*** %s got interrupt: 0x%08x\n",
		mmc_hostname(host->mmc), intmask);
1377

1378 1379 1380
	if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
		writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
			host->ioaddr + SDHCI_INT_STATUS);
1381
		tasklet_schedule(&host->card_tasklet);
1382
	}
1383

1384
	intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1385

1386
	if (intmask & SDHCI_INT_CMD_MASK) {
1387 1388
		writel(intmask & SDHCI_INT_CMD_MASK,
			host->ioaddr + SDHCI_INT_STATUS);
1389
		sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1390 1391 1392 1393 1394
	}

	if (intmask & SDHCI_INT_DATA_MASK) {
		writel(intmask & SDHCI_INT_DATA_MASK,
			host->ioaddr + SDHCI_INT_STATUS);
1395
		sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1396 1397 1398 1399
	}

	intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);

1400 1401
	intmask &= ~SDHCI_INT_ERROR;

1402
	if (intmask & SDHCI_INT_BUS_POWER) {
1403
		printk(KERN_ERR "%s: Card is consuming too much power!\n",
1404
			mmc_hostname(host->mmc));
1405
		writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
1406 1407
	}

1408
	intmask &= ~SDHCI_INT_BUS_POWER;
1409

P
Pierre Ossman 已提交
1410 1411 1412 1413 1414
	if (intmask & SDHCI_INT_CARD_INT)
		cardint = 1;

	intmask &= ~SDHCI_INT_CARD_INT;

1415
	if (intmask) {
P
Pierre Ossman 已提交
1416
		printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n",
1417
			mmc_hostname(host->mmc), intmask);
1418 1419 1420
		sdhci_dumpregs(host);

		writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
1421
	}
1422 1423 1424

	result = IRQ_HANDLED;

1425
	mmiowb();
1426 1427 1428
out:
	spin_unlock(&host->lock);

P
Pierre Ossman 已提交
1429 1430 1431 1432 1433 1434
	/*
	 * We have to delay this as it calls back into the driver.
	 */
	if (cardint)
		mmc_signal_sdio_irq(host->mmc);

1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445
	return result;
}

/*****************************************************************************\
 *                                                                           *
 * Suspend/resume                                                            *
 *                                                                           *
\*****************************************************************************/

#ifdef CONFIG_PM

1446
int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state)
1447
{
1448
	int ret;
1449

1450 1451 1452
	ret = mmc_suspend_host(host->mmc, state);
	if (ret)
		return ret;
1453

1454
	free_irq(host->irq, host);
1455 1456 1457 1458

	return 0;
}

1459
EXPORT_SYMBOL_GPL(sdhci_suspend_host);
1460

1461 1462 1463
int sdhci_resume_host(struct sdhci_host *host)
{
	int ret;
1464

1465 1466 1467 1468
	if (host->flags & SDHCI_USE_DMA) {
		if (host->ops->enable_dma)
			host->ops->enable_dma(host);
	}
1469

1470 1471
	ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
			  mmc_hostname(host->mmc), host);
1472 1473
	if (ret)
		return ret;
1474

1475 1476 1477 1478 1479 1480
	sdhci_init(host);
	mmiowb();

	ret = mmc_resume_host(host->mmc);
	if (ret)
		return ret;
1481 1482 1483 1484

	return 0;
}

1485
EXPORT_SYMBOL_GPL(sdhci_resume_host);
1486 1487 1488 1489 1490

#endif /* CONFIG_PM */

/*****************************************************************************\
 *                                                                           *
1491
 * Device allocation/registration                                            *
1492 1493 1494
 *                                                                           *
\*****************************************************************************/

1495 1496
struct sdhci_host *sdhci_alloc_host(struct device *dev,
	size_t priv_size)
1497 1498 1499 1500
{
	struct mmc_host *mmc;
	struct sdhci_host *host;

1501
	WARN_ON(dev == NULL);
1502

1503
	mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev);
1504
	if (!mmc)
1505
		return ERR_PTR(-ENOMEM);
1506 1507 1508 1509

	host = mmc_priv(mmc);
	host->mmc = mmc;

1510 1511
	return host;
}
1512

1513
EXPORT_SYMBOL_GPL(sdhci_alloc_host);
1514

1515 1516 1517 1518 1519
int sdhci_add_host(struct sdhci_host *host)
{
	struct mmc_host *mmc;
	unsigned int caps;
	int ret;
1520

1521 1522 1523
	WARN_ON(host == NULL);
	if (host == NULL)
		return -EINVAL;
1524

1525
	mmc = host->mmc;
1526

1527 1528
	if (debug_quirks)
		host->quirks = debug_quirks;
1529

1530 1531
	sdhci_reset(host, SDHCI_RESET_ALL);

1532 1533 1534 1535
	host->version = readw(host->ioaddr + SDHCI_HOST_VERSION);
	host->version = (host->version & SDHCI_SPEC_VER_MASK)
				>> SDHCI_SPEC_VER_SHIFT;
	if (host->version > SDHCI_SPEC_200) {
1536
		printk(KERN_ERR "%s: Unknown controller version (%d). "
1537
			"You may experience problems.\n", mmc_hostname(mmc),
1538
			host->version);
1539 1540
	}

1541 1542
	caps = readl(host->ioaddr + SDHCI_CAPABILITIES);

1543
	if (host->quirks & SDHCI_QUIRK_FORCE_DMA)
1544
		host->flags |= SDHCI_USE_DMA;
1545 1546 1547
	else if (!(caps & SDHCI_CAN_DO_DMA))
		DBG("Controller doesn't have DMA capability\n");
	else
1548 1549
		host->flags |= SDHCI_USE_DMA;

1550
	if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) &&
1551
		(host->flags & SDHCI_USE_DMA)) {
R
Rolf Eike Beer 已提交
1552
		DBG("Disabling DMA as it is marked broken\n");
1553 1554 1555
		host->flags &= ~SDHCI_USE_DMA;
	}

1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567
	if (host->flags & SDHCI_USE_DMA) {
		if ((host->version >= SDHCI_SPEC_200) &&
				(caps & SDHCI_CAN_DO_ADMA2))
			host->flags |= SDHCI_USE_ADMA;
	}

	if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) &&
		(host->flags & SDHCI_USE_ADMA)) {
		DBG("Disabling ADMA as it is marked broken\n");
		host->flags &= ~SDHCI_USE_ADMA;
	}

1568
	if (host->flags & SDHCI_USE_DMA) {
1569 1570 1571 1572 1573
		if (host->ops->enable_dma) {
			if (host->ops->enable_dma(host)) {
				printk(KERN_WARNING "%s: No suitable DMA "
					"available. Falling back to PIO.\n",
					mmc_hostname(mmc));
1574
				host->flags &= ~(SDHCI_USE_DMA | SDHCI_USE_ADMA);
1575
			}
1576 1577 1578
		}
	}

1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596
	if (host->flags & SDHCI_USE_ADMA) {
		/*
		 * We need to allocate descriptors for all sg entries
		 * (128) and potentially one alignment transfer for
		 * each of those entries.
		 */
		host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL);
		host->align_buffer = kmalloc(128 * 4, GFP_KERNEL);
		if (!host->adma_desc || !host->align_buffer) {
			kfree(host->adma_desc);
			kfree(host->align_buffer);
			printk(KERN_WARNING "%s: Unable to allocate ADMA "
				"buffers. Falling back to standard DMA.\n",
				mmc_hostname(mmc));
			host->flags &= ~SDHCI_USE_ADMA;
		}
	}

1597 1598 1599 1600 1601 1602 1603 1604 1605
	/*
	 * If we use DMA, then it's up to the caller to set the DMA
	 * mask, but PIO does not need the hw shim so we set a new
	 * mask here in that case.
	 */
	if (!(host->flags & SDHCI_USE_DMA)) {
		host->dma_mask = DMA_BIT_MASK(64);
		mmc_dev(host->mmc)->dma_mask = &host->dma_mask;
	}
1606

1607 1608 1609 1610
	host->max_clk =
		(caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
	if (host->max_clk == 0) {
		printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1611
			"frequency.\n", mmc_hostname(mmc));
1612
		return -ENODEV;
1613
	}
1614 1615
	host->max_clk *= 1000000;

1616 1617 1618 1619
	host->timeout_clk =
		(caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
	if (host->timeout_clk == 0) {
		printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1620
			"frequency.\n", mmc_hostname(mmc));
1621
		return -ENODEV;
1622 1623 1624
	}
	if (caps & SDHCI_TIMEOUT_CLK_UNIT)
		host->timeout_clk *= 1000;
1625 1626 1627 1628 1629 1630 1631

	/*
	 * Set host parameters.
	 */
	mmc->ops = &sdhci_ops;
	mmc->f_min = host->max_clk / 256;
	mmc->f_max = host->max_clk;
1632
	mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
1633

1634 1635
	if ((caps & SDHCI_CAN_DO_HISPD) ||
		(host->quirks & SDHCI_QUIRK_FORCE_HIGHSPEED))
1636 1637
		mmc->caps |= MMC_CAP_SD_HIGHSPEED;

1638 1639 1640
	mmc->ocr_avail = 0;
	if (caps & SDHCI_CAN_VDD_330)
		mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
P
Pierre Ossman 已提交
1641
	if (caps & SDHCI_CAN_VDD_300)
1642
		mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
P
Pierre Ossman 已提交
1643
	if (caps & SDHCI_CAN_VDD_180)
1644
		mmc->ocr_avail |= MMC_VDD_165_195;
1645 1646 1647

	if (mmc->ocr_avail == 0) {
		printk(KERN_ERR "%s: Hardware doesn't report any "
1648
			"support voltages.\n", mmc_hostname(mmc));
1649
		return -ENODEV;
1650 1651
	}

1652 1653 1654
	spin_lock_init(&host->lock);

	/*
1655 1656
	 * Maximum number of segments. Depends on if the hardware
	 * can do scatter/gather or not.
1657
	 */
1658 1659 1660
	if (host->flags & SDHCI_USE_ADMA)
		mmc->max_hw_segs = 128;
	else if (host->flags & SDHCI_USE_DMA)
1661
		mmc->max_hw_segs = 1;
1662 1663 1664
	else /* PIO */
		mmc->max_hw_segs = 128;
	mmc->max_phys_segs = 128;
1665 1666

	/*
1667
	 * Maximum number of sectors in one transfer. Limited by DMA boundary
1668
	 * size (512KiB).
1669
	 */
1670
	mmc->max_req_size = 524288;
1671 1672 1673

	/*
	 * Maximum segment size. Could be one segment with the maximum number
1674 1675
	 * of bytes. When doing hardware scatter/gather, each entry cannot
	 * be larger than 64 KiB though.
1676
	 */
1677 1678 1679 1680
	if (host->flags & SDHCI_USE_ADMA)
		mmc->max_seg_size = 65536;
	else
		mmc->max_seg_size = mmc->max_req_size;
1681

1682 1683 1684 1685 1686 1687
	/*
	 * Maximum block size. This varies from controller to controller and
	 * is specified in the capabilities register.
	 */
	mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
	if (mmc->max_blk_size >= 3) {
1688 1689
		printk(KERN_WARNING "%s: Invalid maximum block size, "
			"assuming 512 bytes\n", mmc_hostname(mmc));
1690 1691 1692
		mmc->max_blk_size = 512;
	} else
		mmc->max_blk_size = 512 << mmc->max_blk_size;
1693

1694 1695 1696 1697 1698
	/*
	 * Maximum block count.
	 */
	mmc->max_blk_count = 65535;

1699 1700 1701 1702 1703 1704 1705 1706
	/*
	 * Init tasklets.
	 */
	tasklet_init(&host->card_tasklet,
		sdhci_tasklet_card, (unsigned long)host);
	tasklet_init(&host->finish_tasklet,
		sdhci_tasklet_finish, (unsigned long)host);

1707
	setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1708

1709
	ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1710
		mmc_hostname(mmc), host);
1711
	if (ret)
1712
		goto untasklet;
1713 1714 1715 1716 1717 1718 1719

	sdhci_init(host);

#ifdef CONFIG_MMC_DEBUG
	sdhci_dumpregs(host);
#endif

1720 1721 1722 1723 1724 1725
#ifdef CONFIG_LEDS_CLASS
	host->led.name = mmc_hostname(mmc);
	host->led.brightness = LED_OFF;
	host->led.default_trigger = mmc_hostname(mmc);
	host->led.brightness_set = sdhci_led_control;

1726
	ret = led_classdev_register(mmc_dev(mmc), &host->led);
1727 1728 1729 1730
	if (ret)
		goto reset;
#endif

1731 1732
	mmiowb();

1733 1734
	mmc_add_host(mmc);

1735
	printk(KERN_INFO "%s: SDHCI controller on %s [%s] using %s%s\n",
1736
		mmc_hostname(mmc), host->hw_name, mmc_dev(mmc)->bus_id,
1737
		(host->flags & SDHCI_USE_ADMA)?"A":"",
1738 1739 1740 1741
		(host->flags & SDHCI_USE_DMA)?"DMA":"PIO");

	return 0;

1742 1743 1744 1745 1746
#ifdef CONFIG_LEDS_CLASS
reset:
	sdhci_reset(host, SDHCI_RESET_ALL);
	free_irq(host->irq, host);
#endif
1747
untasklet:
1748 1749 1750 1751 1752 1753
	tasklet_kill(&host->card_tasklet);
	tasklet_kill(&host->finish_tasklet);

	return ret;
}

1754
EXPORT_SYMBOL_GPL(sdhci_add_host);
1755

P
Pierre Ossman 已提交
1756
void sdhci_remove_host(struct sdhci_host *host, int dead)
1757
{
P
Pierre Ossman 已提交
1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775
	unsigned long flags;

	if (dead) {
		spin_lock_irqsave(&host->lock, flags);

		host->flags |= SDHCI_DEVICE_DEAD;

		if (host->mrq) {
			printk(KERN_ERR "%s: Controller removed during "
				" transfer!\n", mmc_hostname(host->mmc));

			host->mrq->cmd->error = -ENOMEDIUM;
			tasklet_schedule(&host->finish_tasklet);
		}

		spin_unlock_irqrestore(&host->lock, flags);
	}

1776
	mmc_remove_host(host->mmc);
1777

1778 1779 1780 1781
#ifdef CONFIG_LEDS_CLASS
	led_classdev_unregister(&host->led);
#endif

P
Pierre Ossman 已提交
1782 1783
	if (!dead)
		sdhci_reset(host, SDHCI_RESET_ALL);
1784 1785 1786 1787 1788 1789 1790

	free_irq(host->irq, host);

	del_timer_sync(&host->timer);

	tasklet_kill(&host->card_tasklet);
	tasklet_kill(&host->finish_tasklet);
1791 1792 1793 1794 1795 1796

	kfree(host->adma_desc);
	kfree(host->align_buffer);

	host->adma_desc = NULL;
	host->align_buffer = NULL;
1797 1798
}

1799
EXPORT_SYMBOL_GPL(sdhci_remove_host);
1800

1801
void sdhci_free_host(struct sdhci_host *host)
1802
{
1803
	mmc_free_host(host->mmc);
1804 1805
}

1806
EXPORT_SYMBOL_GPL(sdhci_free_host);
1807 1808 1809 1810 1811 1812 1813 1814 1815 1816

/*****************************************************************************\
 *                                                                           *
 * Driver init/exit                                                          *
 *                                                                           *
\*****************************************************************************/

static int __init sdhci_drv_init(void)
{
	printk(KERN_INFO DRIVER_NAME
1817
		": Secure Digital Host Controller Interface driver\n");
1818 1819
	printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");

1820
	return 0;
1821 1822 1823 1824 1825 1826 1827 1828 1829
}

static void __exit sdhci_drv_exit(void)
{
}

module_init(sdhci_drv_init);
module_exit(sdhci_drv_exit);

1830
module_param(debug_quirks, uint, 0444);
1831

1832
MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1833
MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver");
1834
MODULE_LICENSE("GPL");
1835

1836
MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");