sky2.c 89.8 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
/*
 * New driver for Marvell Yukon 2 chipset.
 * Based on earlier sk98lin, and skge driver.
 *
 * This driver intentionally does not support all the features
 * of the original driver such as link fail-over and link management because
 * those should be done at higher levels.
 *
 * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
S
Stephen Hemminger 已提交
18
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 20 21 22 23 24 25 26
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/config.h>
S
Stephen Hemminger 已提交
27
#include <linux/crc32.h>
28 29 30 31
#include <linux/kernel.h>
#include <linux/version.h>
#include <linux/module.h>
#include <linux/netdevice.h>
A
Andrew Morton 已提交
32
#include <linux/dma-mapping.h>
33 34 35 36 37 38 39
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/pci.h>
#include <linux/ip.h>
#include <linux/tcp.h>
#include <linux/in.h>
#include <linux/delay.h>
40
#include <linux/workqueue.h>
41
#include <linux/if_vlan.h>
S
Stephen Hemminger 已提交
42
#include <linux/prefetch.h>
43
#include <linux/mii.h>
44 45 46

#include <asm/irq.h>

47 48 49 50
#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
#define SKY2_VLAN_TAG_USED 1
#endif

51 52 53
#include "sky2.h"

#define DRV_NAME		"sky2"
S
Stephen Hemminger 已提交
54
#define DRV_VERSION		"1.1"
55 56 57 58 59 60 61 62 63
#define PFX			DRV_NAME " "

/*
 * The Yukon II chipset takes 64 bit command blocks (called list elements)
 * that are organized into three (receive, transmit, status) different rings
 * similar to Tigon3. A transmit can require several elements;
 * a receive requires one (or two if using 64 bit dma).
 */

64
#define RX_LE_SIZE	    	512
65
#define RX_LE_BYTES		(RX_LE_SIZE*sizeof(struct sky2_rx_le))
66
#define RX_MAX_PENDING		(RX_LE_SIZE/2 - 2)
67
#define RX_DEF_PENDING		RX_MAX_PENDING
68
#define RX_SKB_ALIGN		8
S
Stephen Hemminger 已提交
69 70 71 72

#define TX_RING_SIZE		512
#define TX_DEF_PENDING		(TX_RING_SIZE - 1)
#define TX_MIN_PENDING		64
73
#define MAX_SKB_TX_LE		(4 + (sizeof(dma_addr_t)/sizeof(u32))*MAX_SKB_FRAGS)
74

S
Stephen Hemminger 已提交
75
#define STATUS_RING_SIZE	2048	/* 2 ports * (TX + 2*RX) */
76 77 78 79 80 81 82
#define STATUS_LE_BYTES		(STATUS_RING_SIZE*sizeof(struct sky2_status_le))
#define ETH_JUMBO_MTU		9000
#define TX_WATCHDOG		(5 * HZ)
#define NAPI_WEIGHT		64
#define PHY_RETRIES		1000

static const u32 default_msg =
S
Stephen Hemminger 已提交
83 84
    NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
    | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
85
    | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
86

S
Stephen Hemminger 已提交
87
static int debug = -1;		/* defaults above */
88 89 90
module_param(debug, int, 0);
MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");

91 92 93 94
static int copybreak __read_mostly = 256;
module_param(copybreak, int, 0);
MODULE_PARM_DESC(copybreak, "Receive copy threshold");

95 96 97 98
static int disable_msi = 0;
module_param(disable_msi, int, 0);
MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");

99
static const struct pci_device_id sky2_id_table[] = {
S
Stephen Hemminger 已提交
100
	{ PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) },
101 102 103 104 105 106 107 108 109 110 111
	{ PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) },
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) },
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) },
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) },
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) },
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) },
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) },
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) },
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) },
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) },
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) },
112
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) },
113 114 115
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) },
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) },
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) },
116
	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) },
117 118
	{ 0 }
};
S
Stephen Hemminger 已提交
119

120 121 122 123 124 125
MODULE_DEVICE_TABLE(pci, sky2_id_table);

/* Avoid conditionals by using array */
static const unsigned txqaddr[] = { Q_XA1, Q_XA2 };
static const unsigned rxqaddr[] = { Q_R1, Q_R2 };

126 127 128 129 130 131 132
/* This driver supports yukon2 chipset only */
static const char *yukon2_name[] = {
	"XL",		/* 0xb3 */
	"EC Ultra", 	/* 0xb4 */
	"UNKNOWN",	/* 0xb5 */
	"EC",		/* 0xb6 */
	"FE",		/* 0xb7 */
S
Stephen Hemminger 已提交
133 134 135
};

/* Access to external PHY */
136
static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val)
137 138 139 140 141 142 143 144 145
{
	int i;

	gma_write16(hw, port, GM_SMI_DATA, val);
	gma_write16(hw, port, GM_SMI_CTRL,
		    GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg));

	for (i = 0; i < PHY_RETRIES; i++) {
		if (!(gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_BUSY))
146
			return 0;
S
Stephen Hemminger 已提交
147
		udelay(1);
148
	}
149

S
Stephen Hemminger 已提交
150
	printk(KERN_WARNING PFX "%s: phy write timeout\n", hw->dev[port]->name);
151
	return -ETIMEDOUT;
152 153
}

154
static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val)
155 156 157
{
	int i;

S
Stephen Hemminger 已提交
158
	gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV)
159 160 161
		    | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD);

	for (i = 0; i < PHY_RETRIES; i++) {
162 163 164 165 166
		if (gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_RD_VAL) {
			*val = gma_read16(hw, port, GM_SMI_DATA);
			return 0;
		}

S
Stephen Hemminger 已提交
167
		udelay(1);
168 169
	}

170 171 172 173 174 175 176 177 178 179
	return -ETIMEDOUT;
}

static u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
{
	u16 v;

	if (__gm_phy_read(hw, port, reg, &v) != 0)
		printk(KERN_WARNING PFX "%s: phy read timeout\n", hw->dev[port]->name);
	return v;
180 181
}

182 183 184 185 186 187 188 189 190 191
static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
{
	u16 power_control;
	u32 reg1;
	int vaux;
	int ret = 0;

	pr_debug("sky2_set_power_state %d\n", state);
	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);

192
	power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_PMC);
193
	vaux = (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL) &&
194 195
		(power_control & PCI_PM_CAP_PME_D3cold);

196
	power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_CTRL);
197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219

	power_control |= PCI_PM_CTRL_PME_STATUS;
	power_control &= ~(PCI_PM_CTRL_STATE_MASK);

	switch (state) {
	case PCI_D0:
		/* switch power to VCC (WA for VAUX problem) */
		sky2_write8(hw, B0_POWER_CTRL,
			    PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);

		/* disable Core Clock Division, */
		sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);

		if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
			/* enable bits are inverted */
			sky2_write8(hw, B2_Y2_CLK_GATE,
				    Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
				    Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
				    Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
		else
			sky2_write8(hw, B2_Y2_CLK_GATE, 0);

		/* Turn off phy power saving */
220
		reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
221 222
		reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);

S
shemminger@osdl.org 已提交
223
		/* looks like this XL is back asswards .. */
224 225 226 227 228
		if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) {
			reg1 |= PCI_Y2_PHY1_COMA;
			if (hw->ports > 1)
				reg1 |= PCI_Y2_PHY2_COMA;
		}
229 230

		if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
231 232
			sky2_pci_write32(hw, PCI_DEV_REG3, 0);
			reg1 = sky2_pci_read32(hw, PCI_DEV_REG4);
233
			reg1 &= P_ASPM_CONTROL_MSK;
234 235
			sky2_pci_write32(hw, PCI_DEV_REG4, reg1);
			sky2_pci_write32(hw, PCI_DEV_REG5, 0);
236 237
		}

238
		sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
239

240 241 242 243 244
		break;

	case PCI_D3hot:
	case PCI_D3cold:
		/* Turn on phy power saving */
245
		reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
246 247 248 249
		if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
			reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
		else
			reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
250
		sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271

		if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
			sky2_write8(hw, B2_Y2_CLK_GATE, 0);
		else
			/* enable bits are inverted */
			sky2_write8(hw, B2_Y2_CLK_GATE,
				    Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
				    Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
				    Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);

		/* switch power to VAUX */
		if (vaux && state != PCI_D3cold)
			sky2_write8(hw, B0_POWER_CTRL,
				    (PC_VAUX_ENA | PC_VCC_ENA |
				     PC_VAUX_ON | PC_VCC_OFF));
		break;
	default:
		printk(KERN_ERR PFX "Unknown power state %d\n", state);
		ret = -1;
	}

272
	sky2_pci_write16(hw, hw->pm_cap + PCI_PM_CTRL, power_control);
273 274 275 276
	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
	return ret;
}

277 278 279 280 281 282 283 284
static void sky2_phy_reset(struct sky2_hw *hw, unsigned port)
{
	u16 reg;

	/* disable all GMAC IRQ's */
	sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
	/* disable PHY IRQs */
	gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
S
Stephen Hemminger 已提交
285

286 287 288 289 290 291 292 293 294 295 296 297 298
	gma_write16(hw, port, GM_MC_ADDR_H1, 0);	/* clear MC hash */
	gma_write16(hw, port, GM_MC_ADDR_H2, 0);
	gma_write16(hw, port, GM_MC_ADDR_H3, 0);
	gma_write16(hw, port, GM_MC_ADDR_H4, 0);

	reg = gma_read16(hw, port, GM_RX_CTRL);
	reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
	gma_write16(hw, port, GM_RX_CTRL, reg);
}

static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
{
	struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
S
Stephen Hemminger 已提交
299
	u16 ctrl, ct1000, adv, pg, ledctrl, ledover;
300

S
Stephen Hemminger 已提交
301
	if (sky2->autoneg == AUTONEG_ENABLE && hw->chip_id != CHIP_ID_YUKON_XL) {
302 303 304
		u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);

		ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
S
Stephen Hemminger 已提交
305
			   PHY_M_EC_MAC_S_MSK);
306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381
		ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);

		if (hw->chip_id == CHIP_ID_YUKON_EC)
			ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
		else
			ectrl |= PHY_M_EC_M_DSC(2) | PHY_M_EC_S_DSC(3);

		gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
	}

	ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
	if (hw->copper) {
		if (hw->chip_id == CHIP_ID_YUKON_FE) {
			/* enable automatic crossover */
			ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
		} else {
			/* disable energy detect */
			ctrl &= ~PHY_M_PC_EN_DET_MSK;

			/* enable automatic crossover */
			ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);

			if (sky2->autoneg == AUTONEG_ENABLE &&
			    hw->chip_id == CHIP_ID_YUKON_XL) {
				ctrl &= ~PHY_M_PC_DSC_MSK;
				ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
			}
		}
		gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
	} else {
		/* workaround for deviation #4.88 (CRC errors) */
		/* disable Automatic Crossover */

		ctrl &= ~PHY_M_PC_MDIX_MSK;
		gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);

		if (hw->chip_id == CHIP_ID_YUKON_XL) {
			/* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
			gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
			ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
			ctrl &= ~PHY_M_MAC_MD_MSK;
			ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
			gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);

			/* select page 1 to access Fiber registers */
			gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
		}
	}

	ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL);
	if (sky2->autoneg == AUTONEG_DISABLE)
		ctrl &= ~PHY_CT_ANE;
	else
		ctrl |= PHY_CT_ANE;

	ctrl |= PHY_CT_RESET;
	gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);

	ctrl = 0;
	ct1000 = 0;
	adv = PHY_AN_CSMA;

	if (sky2->autoneg == AUTONEG_ENABLE) {
		if (hw->copper) {
			if (sky2->advertising & ADVERTISED_1000baseT_Full)
				ct1000 |= PHY_M_1000C_AFD;
			if (sky2->advertising & ADVERTISED_1000baseT_Half)
				ct1000 |= PHY_M_1000C_AHD;
			if (sky2->advertising & ADVERTISED_100baseT_Full)
				adv |= PHY_M_AN_100_FD;
			if (sky2->advertising & ADVERTISED_100baseT_Half)
				adv |= PHY_M_AN_100_HD;
			if (sky2->advertising & ADVERTISED_10baseT_Full)
				adv |= PHY_M_AN_10_FD;
			if (sky2->advertising & ADVERTISED_10baseT_Half)
				adv |= PHY_M_AN_10_HD;
S
Stephen Hemminger 已提交
382
		} else		/* special defines for FIBER (88E1011S only) */
383 384 385 386
			adv |= PHY_M_AN_1000X_AHD | PHY_M_AN_1000X_AFD;

		/* Set Flow-control capabilities */
		if (sky2->tx_pause && sky2->rx_pause)
S
Stephen Hemminger 已提交
387
			adv |= PHY_AN_PAUSE_CAP;	/* symmetric */
388
		else if (sky2->rx_pause && !sky2->tx_pause)
S
Stephen Hemminger 已提交
389
			adv |= PHY_AN_PAUSE_ASYM | PHY_AN_PAUSE_CAP;
390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438
		else if (!sky2->rx_pause && sky2->tx_pause)
			adv |= PHY_AN_PAUSE_ASYM;	/* local */

		/* Restart Auto-negotiation */
		ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
	} else {
		/* forced speed/duplex settings */
		ct1000 = PHY_M_1000C_MSE;

		if (sky2->duplex == DUPLEX_FULL)
			ctrl |= PHY_CT_DUP_MD;

		switch (sky2->speed) {
		case SPEED_1000:
			ctrl |= PHY_CT_SP1000;
			break;
		case SPEED_100:
			ctrl |= PHY_CT_SP100;
			break;
		}

		ctrl |= PHY_CT_RESET;
	}

	if (hw->chip_id != CHIP_ID_YUKON_FE)
		gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);

	gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
	gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);

	/* Setup Phy LED's */
	ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
	ledover = 0;

	switch (hw->chip_id) {
	case CHIP_ID_YUKON_FE:
		/* on 88E3082 these bits are at 11..9 (shifted left) */
		ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;

		ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR);

		/* delete ACT LED control bits */
		ctrl &= ~PHY_M_FELP_LED1_MSK;
		/* change ACT LED control to blink mode */
		ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
		gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
		break;

	case CHIP_ID_YUKON_XL:
S
Stephen Hemminger 已提交
439
		pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
440 441 442 443 444

		/* select page 3 to access LED control register */
		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);

		/* set LED Function Control register */
S
Stephen Hemminger 已提交
445 446 447 448
		gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, (PHY_M_LEDC_LOS_CTRL(1) |	/* LINK/ACT */
							   PHY_M_LEDC_INIT_CTRL(7) |	/* 10 Mbps */
							   PHY_M_LEDC_STA1_CTRL(7) |	/* 100 Mbps */
							   PHY_M_LEDC_STA0_CTRL(7)));	/* 1000 Mbps */
449 450 451

		/* set Polarity Control register */
		gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
S
Stephen Hemminger 已提交
452 453 454 455 456 457
			     (PHY_M_POLC_LS1_P_MIX(4) |
			      PHY_M_POLC_IS0_P_MIX(4) |
			      PHY_M_POLC_LOS_CTRL(2) |
			      PHY_M_POLC_INIT_CTRL(2) |
			      PHY_M_POLC_STA1_CTRL(2) |
			      PHY_M_POLC_STA0_CTRL(2)));
458 459

		/* restore page register */
S
Stephen Hemminger 已提交
460
		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
461 462 463 464 465 466 467 468 469
		break;

	default:
		/* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
		ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
		/* turn off the Rx LED (LED_RX) */
		ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
	}

470 471 472 473 474 475
	if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev >= 2) {
		/* apply fixes in PHY AFE */
		gm_phy_write(hw, port, 22, 255);
		/* increase differential signal amplitude in 10BASE-T */
		gm_phy_write(hw, port, 24, 0xaa99);
		gm_phy_write(hw, port, 23, 0x2011);
476

477 478 479 480 481 482 483 484
		/* fix for IEEE A/B Symmetry failure in 1000BASE-T */
		gm_phy_write(hw, port, 24, 0xa204);
		gm_phy_write(hw, port, 23, 0x2002);

		/* set page register to 0 */
		gm_phy_write(hw, port, 22, 0);
	} else {
		gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
485

486 487 488 489
		if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) {
			/* turn on 100 Mbps LED (LED_LINK100) */
			ledover |= PHY_M_LED_MO_100(MO_LED_ON);
		}
490

491 492 493 494
		if (ledover)
			gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);

	}
S
shemminger@osdl.org 已提交
495
	/* Enable phy interrupt on auto-negotiation complete (or link up) */
496 497 498 499 500 501
	if (sky2->autoneg == AUTONEG_ENABLE)
		gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
	else
		gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
}

502 503 504
/* Force a renegotiation */
static void sky2_phy_reinit(struct sky2_port *sky2)
{
505
	spin_lock_bh(&sky2->phy_lock);
506
	sky2_phy_init(sky2->hw, sky2->port);
507
	spin_unlock_bh(&sky2->phy_lock);
508 509
}

510 511 512 513 514 515 516
static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
{
	struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
	u16 reg;
	int i;
	const u8 *addr = hw->dev[port]->dev_addr;

517 518
	sky2_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
	sky2_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR|GPC_ENA_PAUSE);
519 520 521

	sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);

S
Stephen Hemminger 已提交
522
	if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && port == 1) {
523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541
		/* WA DEV_472 -- looks like crossed wires on port 2 */
		/* clear GMAC 1 Control reset */
		sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
		do {
			sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
			sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
		} while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL ||
			 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 ||
			 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
	}

	if (sky2->autoneg == AUTONEG_DISABLE) {
		reg = gma_read16(hw, port, GM_GP_CTRL);
		reg |= GM_GPCR_AU_ALL_DIS;
		gma_write16(hw, port, GM_GP_CTRL, reg);
		gma_read16(hw, port, GM_GP_CTRL);

		switch (sky2->speed) {
		case SPEED_1000:
542
			reg &= ~GM_GPCR_SPEED_100;
543
			reg |= GM_GPCR_SPEED_1000;
544
			break;
545
		case SPEED_100:
546
			reg &= ~GM_GPCR_SPEED_1000;
547
			reg |= GM_GPCR_SPEED_100;
548 549 550 551
			break;
		case SPEED_10:
			reg &= ~(GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100);
			break;
552 553 554 555 556 557 558 559 560
		}

		if (sky2->duplex == DUPLEX_FULL)
			reg |= GM_GPCR_DUP_FULL;
	} else
		reg = GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100 | GM_GPCR_DUP_FULL;

	if (!sky2->tx_pause && !sky2->rx_pause) {
		sky2_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
S
Stephen Hemminger 已提交
561 562 563
		reg |=
		    GM_GPCR_FC_TX_DIS | GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS;
	} else if (sky2->tx_pause && !sky2->rx_pause) {
564 565 566 567 568 569
		/* disable Rx flow-control */
		reg |= GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS;
	}

	gma_write16(hw, port, GM_GP_CTRL, reg);

S
Stephen Hemminger 已提交
570
	sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
571

572
	spin_lock_bh(&sky2->phy_lock);
573
	sky2_phy_init(hw, port);
574
	spin_unlock_bh(&sky2->phy_lock);
575 576 577 578 579

	/* MIB clear */
	reg = gma_read16(hw, port, GM_PHY_ADDR);
	gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);

580 581
	for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
		gma_read16(hw, port, i);
582 583 584 585 586 587 588
	gma_write16(hw, port, GM_PHY_ADDR, reg);

	/* transmit control */
	gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));

	/* receive control reg: unicast + multicast + no FCS  */
	gma_write16(hw, port, GM_RX_CTRL,
S
Stephen Hemminger 已提交
589
		    GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA);
590 591 592 593 594 595 596 597 598 599 600 601 602

	/* transmit flow control */
	gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);

	/* transmit parameter */
	gma_write16(hw, port, GM_TX_PARAM,
		    TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) |
		    TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
		    TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) |
		    TX_BACK_OFF_LIM(TX_BOF_LIM_DEF));

	/* serial mode register */
	reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
603
		GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
604

605
	if (hw->dev[port]->mtu > ETH_DATA_LEN)
606 607 608 609 610 611 612
		reg |= GM_SMOD_JUMBO_ENA;

	gma_write16(hw, port, GM_SERIAL_MODE, reg);

	/* virtual address for data */
	gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr);

S
Stephen Hemminger 已提交
613 614 615 616
	/* physical address: used for pause frames */
	gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr);

	/* ignore counter overflows */
617 618 619 620 621 622
	gma_write16(hw, port, GM_TX_IRQ_MSK, 0);
	gma_write16(hw, port, GM_RX_IRQ_MSK, 0);
	gma_write16(hw, port, GM_TR_IRQ_MSK, 0);

	/* Configure Rx MAC FIFO */
	sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
623 624
	sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
		     GMF_OPER_ON | GMF_RX_F_FL_ON);
625

S
shemminger@osdl.org 已提交
626
	/* Flush Rx MAC FIFO on any flow control or error */
627
	sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
628

S
Stephen Hemminger 已提交
629 630
	/* Set threshold to 0xa (64 bytes)
	 *  ASF disabled so no need to do WA dev #4.30
631 632 633 634 635 636
	 */
	sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF);

	/* Configure Tx MAC FIFO */
	sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
	sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
637 638 639 640 641 642 643 644 645 646 647 648

	if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
		sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
		sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);
		if (hw->dev[port]->mtu > ETH_DATA_LEN) {
			/* set Tx GMAC FIFO Almost Empty Threshold */
			sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR), 0x180);
			/* Disable Store & Forward mode for TX */
			sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS);
		}
	}

649 650
}

651 652 653 654 655
/* Assign Ram Buffer allocation.
 * start and end are in units of 4k bytes
 * ram registers are in units of 64bit words
 */
static void sky2_ramset(struct sky2_hw *hw, u16 q, u8 startk, u8 endk)
656
{
657
	u32 start, end;
658

659 660
	start = startk * 4096/8;
	end = (endk * 4096/8) - 1;
S
Stephen Hemminger 已提交
661

662 663 664 665 666 667 668
	sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
	sky2_write32(hw, RB_ADDR(q, RB_START), start);
	sky2_write32(hw, RB_ADDR(q, RB_END), end);
	sky2_write32(hw, RB_ADDR(q, RB_WP), start);
	sky2_write32(hw, RB_ADDR(q, RB_RP), start);

	if (q == Q_R1 || q == Q_R2) {
669 670
		u32 space = (endk - startk) * 4096/8;
		u32 tp = space - space/4;
S
Stephen Hemminger 已提交
671

672 673 674 675 676 677
		/* On receive queue's set the thresholds
		 * give receiver priority when > 3/4 full
		 * send pause when down to 2K
		 */
		sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
		sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
S
Stephen Hemminger 已提交
678

679 680 681
		tp = space - 2048/8;
		sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
		sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
682 683 684 685 686 687 688 689
	} else {
		/* Enable store & forward on Tx queue's because
		 * Tx FIFO is only 1K on Yukon
		 */
		sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
	}

	sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
S
Stephen Hemminger 已提交
690
	sky2_read8(hw, RB_ADDR(q, RB_CTRL));
691 692 693
}

/* Setup Bus Memory Interface */
694
static void sky2_qset(struct sky2_hw *hw, u16 q)
695 696 697 698
{
	sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
	sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
	sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
699
	sky2_write32(hw, Q_ADDR(q, Q_WM),  BMU_WM_DEFAULT);
700 701 702 703 704
}

/* Setup prefetch unit registers. This is the interface between
 * hardware and driver list elements
 */
705
static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
706 707 708 709 710 711 712 713
				      u64 addr, u32 last)
{
	sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
	sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR);
	sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), addr >> 32);
	sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), (u32) addr);
	sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last);
	sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON);
S
Stephen Hemminger 已提交
714 715

	sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL));
716 717
}

S
Stephen Hemminger 已提交
718 719 720 721 722 723 724
static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2)
{
	struct sky2_tx_le *le = sky2->tx_le + sky2->tx_prod;

	sky2->tx_prod = (sky2->tx_prod + 1) % TX_RING_SIZE;
	return le;
}
725

726 727
/* Update chip's next pointer */
static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
728
{
729
	wmb();
730
	sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
731
	mmiowb();
732 733
}

S
Stephen Hemminger 已提交
734

735 736 737 738 739 740 741
static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
{
	struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
	sky2->rx_put = (sky2->rx_put + 1) % RX_LE_SIZE;
	return le;
}

742 743 744
/* Return high part of DMA address (could be 32 or 64 bit) */
static inline u32 high32(dma_addr_t a)
{
745
	return sizeof(a) > sizeof(u32) ? (a >> 16) >> 16 : 0;
746 747
}

S
Stephen Hemminger 已提交
748
/* Build description to hardware about buffer */
749
static void sky2_rx_add(struct sky2_port *sky2, dma_addr_t map)
750 751
{
	struct sky2_rx_le *le;
752 753
	u32 hi = high32(map);
	u16 len = sky2->rx_bufsize;
754

S
Stephen Hemminger 已提交
755
	if (sky2->rx_addr64 != hi) {
756
		le = sky2_next_rx(sky2);
S
Stephen Hemminger 已提交
757
		le->addr = cpu_to_le32(hi);
758 759
		le->ctrl = 0;
		le->opcode = OP_ADDR64 | HW_OWNER;
760
		sky2->rx_addr64 = high32(map + len);
761
	}
S
Stephen Hemminger 已提交
762

763
	le = sky2_next_rx(sky2);
764 765
	le->addr = cpu_to_le32((u32) map);
	le->length = cpu_to_le16(len);
766 767 768 769
	le->ctrl = 0;
	le->opcode = OP_PACKET | HW_OWNER;
}

S
Stephen Hemminger 已提交
770

771 772 773 774
/* Tell chip where to start receive checksum.
 * Actually has two checksums, but set both same to avoid possible byte
 * order problems.
 */
S
Stephen Hemminger 已提交
775
static void rx_set_checksum(struct sky2_port *sky2)
776 777 778 779
{
	struct sky2_rx_le *le;

	le = sky2_next_rx(sky2);
S
Stephen Hemminger 已提交
780
	le->addr = (ETH_HLEN << 16) | ETH_HLEN;
781 782
	le->ctrl = 0;
	le->opcode = OP_TCPSTART | HW_OWNER;
S
Stephen Hemminger 已提交
783 784 785 786

	sky2_write32(sky2->hw,
		     Q_ADDR(rxqaddr[sky2->port], Q_CSR),
		     sky2->rx_csum ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
787 788 789

}

790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821
/*
 * The RX Stop command will not work for Yukon-2 if the BMU does not
 * reach the end of packet and since we can't make sure that we have
 * incoming data, we must reset the BMU while it is not doing a DMA
 * transfer. Since it is possible that the RX path is still active,
 * the RX RAM buffer will be stopped first, so any possible incoming
 * data will not trigger a DMA. After the RAM buffer is stopped, the
 * BMU is polled until any DMA in progress is ended and only then it
 * will be reset.
 */
static void sky2_rx_stop(struct sky2_port *sky2)
{
	struct sky2_hw *hw = sky2->hw;
	unsigned rxq = rxqaddr[sky2->port];
	int i;

	/* disable the RAM Buffer receive queue */
	sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);

	for (i = 0; i < 0xffff; i++)
		if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL))
		    == sky2_read8(hw, RB_ADDR(rxq, Q_RL)))
			goto stopped;

	printk(KERN_WARNING PFX "%s: receiver stop failed\n",
	       sky2->netdev->name);
stopped:
	sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);

	/* reset the Rx prefetch unit */
	sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
}
S
Stephen Hemminger 已提交
822

S
shemminger@osdl.org 已提交
823
/* Clean out receive buffer area, assumes receiver hardware stopped */
824 825 826 827 828
static void sky2_rx_clean(struct sky2_port *sky2)
{
	unsigned i;

	memset(sky2->rx_le, 0, RX_LE_BYTES);
S
Stephen Hemminger 已提交
829
	for (i = 0; i < sky2->rx_pending; i++) {
830 831 832
		struct ring_info *re = sky2->rx_ring + i;

		if (re->skb) {
S
Stephen Hemminger 已提交
833
			pci_unmap_single(sky2->hw->pdev,
834
					 re->mapaddr, sky2->rx_bufsize,
835 836 837 838 839 840 841
					 PCI_DMA_FROMDEVICE);
			kfree_skb(re->skb);
			re->skb = NULL;
		}
	}
}

842 843 844 845 846 847 848 849 850 851 852
/* Basic MII support */
static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
{
	struct mii_ioctl_data *data = if_mii(ifr);
	struct sky2_port *sky2 = netdev_priv(dev);
	struct sky2_hw *hw = sky2->hw;
	int err = -EOPNOTSUPP;

	if (!netif_running(dev))
		return -ENODEV;	/* Phy still in reset */

853
	switch (cmd) {
854 855 856 857 858 859
	case SIOCGMIIPHY:
		data->phy_id = PHY_ADDR_MARV;

		/* fallthru */
	case SIOCGMIIREG: {
		u16 val = 0;
860

861
		spin_lock_bh(&sky2->phy_lock);
862
		err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val);
863
		spin_unlock_bh(&sky2->phy_lock);
864

865 866 867 868 869 870 871 872
		data->val_out = val;
		break;
	}

	case SIOCSMIIREG:
		if (!capable(CAP_NET_ADMIN))
			return -EPERM;

873
		spin_lock_bh(&sky2->phy_lock);
874 875
		err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f,
				   data->val_in);
876
		spin_unlock_bh(&sky2->phy_lock);
877 878 879 880 881
		break;
	}
	return err;
}

882 883 884 885 886 887 888
#ifdef SKY2_VLAN_TAG_USED
static void sky2_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
{
	struct sky2_port *sky2 = netdev_priv(dev);
	struct sky2_hw *hw = sky2->hw;
	u16 port = sky2->port;

889
	spin_lock_bh(&sky2->tx_lock);
890 891 892 893 894

	sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), RX_VLAN_STRIP_ON);
	sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_VLAN_TAG_ON);
	sky2->vlgrp = grp;

895
	spin_unlock_bh(&sky2->tx_lock);
896 897 898 899 900 901 902 903
}

static void sky2_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
{
	struct sky2_port *sky2 = netdev_priv(dev);
	struct sky2_hw *hw = sky2->hw;
	u16 port = sky2->port;

904
	spin_lock_bh(&sky2->tx_lock);
905 906 907 908 909 910

	sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), RX_VLAN_STRIP_OFF);
	sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_VLAN_TAG_OFF);
	if (sky2->vlgrp)
		sky2->vlgrp->vlan_devices[vid] = NULL;

911
	spin_unlock_bh(&sky2->tx_lock);
912 913 914
}
#endif

915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934
/*
 * It appears the hardware has a bug in the FIFO logic that
 * cause it to hang if the FIFO gets overrun and the receive buffer
 * is not aligned. ALso alloc_skb() won't align properly if slab
 * debugging is enabled.
 */
static inline struct sk_buff *sky2_alloc_skb(unsigned int size, gfp_t gfp_mask)
{
	struct sk_buff *skb;

	skb = alloc_skb(size + RX_SKB_ALIGN, gfp_mask);
	if (likely(skb)) {
		unsigned long p	= (unsigned long) skb->data;
		skb_reserve(skb,
			((p + RX_SKB_ALIGN - 1) & ~(RX_SKB_ALIGN - 1)) - p);
	}

	return skb;
}

935 936 937 938 939 940
/*
 * Allocate and setup receiver buffer pool.
 * In case of 64 bit dma, there are 2X as many list elements
 * available as ring entries
 * and need to reserve one list element so we don't wrap around.
 */
941
static int sky2_rx_start(struct sky2_port *sky2)
942
{
943 944 945
	struct sky2_hw *hw = sky2->hw;
	unsigned rxq = rxqaddr[sky2->port];
	int i;
946

947
	sky2->rx_put = sky2->rx_next = 0;
948
	sky2_qset(hw, rxq);
949 950 951 952 953 954

	if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev >= 2) {
		/* MAC Rx RAM Read is controlled by hardware */
		sky2_write32(hw, Q_ADDR(rxq, Q_F), F_M_RX_RAM_DIS);
	}

955 956 957
	sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);

	rx_set_checksum(sky2);
S
Stephen Hemminger 已提交
958
	for (i = 0; i < sky2->rx_pending; i++) {
959 960
		struct ring_info *re = sky2->rx_ring + i;

961
		re->skb = sky2_alloc_skb(sky2->rx_bufsize, GFP_KERNEL);
962 963 964
		if (!re->skb)
			goto nomem;

965
		re->mapaddr = pci_map_single(hw->pdev, re->skb->data,
966 967
					     sky2->rx_bufsize, PCI_DMA_FROMDEVICE);
		sky2_rx_add(sky2, re->mapaddr);
968 969
	}

970 971 972 973
 	/* Truncate oversize frames */
 	sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), sky2->rx_bufsize - 8);
 	sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);

974 975
	/* Tell chip about available buffers */
	sky2_write16(hw, Y2_QADDR(rxq, PREF_UNIT_PUT_IDX), sky2->rx_put);
976 977 978 979 980 981 982 983 984 985 986 987
	return 0;
nomem:
	sky2_rx_clean(sky2);
	return -ENOMEM;
}

/* Bring up network interface. */
static int sky2_up(struct net_device *dev)
{
	struct sky2_port *sky2 = netdev_priv(dev);
	struct sky2_hw *hw = sky2->hw;
	unsigned port = sky2->port;
988
	u32 ramsize, rxspace, imask;
989 990 991 992 993 994 995
	int err = -ENOMEM;

	if (netif_msg_ifup(sky2))
		printk(KERN_INFO PFX "%s: enabling interface\n", dev->name);

	/* must be power of 2 */
	sky2->tx_le = pci_alloc_consistent(hw->pdev,
S
Stephen Hemminger 已提交
996 997
					   TX_RING_SIZE *
					   sizeof(struct sky2_tx_le),
998 999 1000 1001
					   &sky2->tx_le_map);
	if (!sky2->tx_le)
		goto err_out;

1002
	sky2->tx_ring = kcalloc(TX_RING_SIZE, sizeof(struct tx_ring_info),
1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013
				GFP_KERNEL);
	if (!sky2->tx_ring)
		goto err_out;
	sky2->tx_prod = sky2->tx_cons = 0;

	sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES,
					   &sky2->rx_le_map);
	if (!sky2->rx_le)
		goto err_out;
	memset(sky2->rx_le, 0, RX_LE_BYTES);

1014
	sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct ring_info),
1015 1016 1017 1018 1019 1020
				GFP_KERNEL);
	if (!sky2->rx_ring)
		goto err_out;

	sky2_mac_init(hw, port);

1021 1022 1023 1024 1025 1026 1027 1028 1029 1030
	/* Determine available ram buffer space (in 4K blocks).
	 * Note: not sure about the FE setting below yet
	 */
	if (hw->chip_id == CHIP_ID_YUKON_FE)
		ramsize = 4;
	else
		ramsize = sky2_read8(hw, B2_E_0);

	/* Give transmitter one third (rounded up) */
	rxspace = ramsize - (ramsize + 2) / 3;
1031 1032

	sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1033
	sky2_ramset(hw, txqaddr[port], rxspace, ramsize);
1034

S
Stephen Hemminger 已提交
1035 1036 1037 1038
	/* Make sure SyncQ is disabled */
	sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
		    RB_RST_SET);

1039
	sky2_qset(hw, txqaddr[port]);
1040

1041 1042 1043
	/* Set almost empty threshold */
	if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev == 1)
		sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), 0x1a0);
1044

1045 1046
	sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
			   TX_RING_SIZE - 1);
1047

1048
	err = sky2_rx_start(sky2);
1049 1050 1051 1052
	if (err)
		goto err_out;

	/* Enable interrupts from phy/mac for port */
1053 1054 1055 1056
	imask = sky2_read32(hw, B0_IMSK);
	imask |= (port == 0) ? Y2_IS_PORT_1 : Y2_IS_PORT_2;
	sky2_write32(hw, B0_IMSK, imask);

1057 1058 1059
	return 0;

err_out:
1060
	if (sky2->rx_le) {
1061 1062
		pci_free_consistent(hw->pdev, RX_LE_BYTES,
				    sky2->rx_le, sky2->rx_le_map);
1063 1064 1065
		sky2->rx_le = NULL;
	}
	if (sky2->tx_le) {
1066 1067 1068
		pci_free_consistent(hw->pdev,
				    TX_RING_SIZE * sizeof(struct sky2_tx_le),
				    sky2->tx_le, sky2->tx_le_map);
1069 1070 1071 1072
		sky2->tx_le = NULL;
	}
	kfree(sky2->tx_ring);
	kfree(sky2->rx_ring);
1073

1074 1075
	sky2->tx_ring = NULL;
	sky2->rx_ring = NULL;
1076 1077 1078
	return err;
}

S
Stephen Hemminger 已提交
1079 1080 1081
/* Modular subtraction in ring */
static inline int tx_dist(unsigned tail, unsigned head)
{
1082
	return (head - tail) % TX_RING_SIZE;
S
Stephen Hemminger 已提交
1083
}
1084

S
Stephen Hemminger 已提交
1085 1086
/* Number of list elements available for next tx */
static inline int tx_avail(const struct sky2_port *sky2)
1087
{
S
Stephen Hemminger 已提交
1088
	return sky2->tx_pending - tx_dist(sky2->tx_cons, sky2->tx_prod);
1089 1090
}

S
Stephen Hemminger 已提交
1091
/* Estimate of number of transmit list elements required */
1092
static unsigned tx_le_req(const struct sk_buff *skb)
1093
{
S
Stephen Hemminger 已提交
1094 1095 1096 1097 1098 1099 1100 1101
	unsigned count;

	count = sizeof(dma_addr_t) / sizeof(u32);
	count += skb_shinfo(skb)->nr_frags * count;

	if (skb_shinfo(skb)->tso_size)
		++count;

1102
	if (skb->ip_summed == CHECKSUM_HW)
S
Stephen Hemminger 已提交
1103 1104 1105
		++count;

	return count;
1106 1107
}

S
Stephen Hemminger 已提交
1108 1109 1110 1111 1112
/*
 * Put one packet in ring for transmit.
 * A single packet can generate multiple list elements, and
 * the number of ring elements will probably be less than the number
 * of list elements used.
1113 1114
 *
 * No BH disabling for tx_lock here (like tg3)
S
Stephen Hemminger 已提交
1115
 */
1116 1117 1118 1119
static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev)
{
	struct sky2_port *sky2 = netdev_priv(dev);
	struct sky2_hw *hw = sky2->hw;
1120
	struct sky2_tx_le *le = NULL;
1121
	struct tx_ring_info *re;
1122
	unsigned i, len;
1123
	int avail;
1124 1125 1126 1127 1128
	dma_addr_t mapping;
	u32 addr64;
	u16 mss;
	u8 ctrl;

1129 1130 1131 1132
	/* No BH disabling for tx_lock here.  We are running in BH disabled
	 * context and TX reclaim runs via poll inside of a software
	 * interrupt, and no related locks in IRQ processing.
	 */
1133
	if (!spin_trylock(&sky2->tx_lock))
1134 1135
		return NETDEV_TX_LOCKED;

S
Stephen Hemminger 已提交
1136
	if (unlikely(tx_avail(sky2) < tx_le_req(skb))) {
1137 1138 1139 1140 1141
		/* There is a known but harmless race with lockless tx
		 * and netif_stop_queue.
		 */
		if (!netif_queue_stopped(dev)) {
			netif_stop_queue(dev);
1142 1143 1144
			if (net_ratelimit())
				printk(KERN_WARNING PFX "%s: ring full when queue awake!\n",
				       dev->name);
1145
		}
1146
		spin_unlock(&sky2->tx_lock);
1147 1148 1149 1150

		return NETDEV_TX_BUSY;
	}

S
Stephen Hemminger 已提交
1151
	if (unlikely(netif_msg_tx_queued(sky2)))
1152 1153 1154 1155 1156
		printk(KERN_DEBUG "%s: tx queued, slot %u, len %d\n",
		       dev->name, sky2->tx_prod, skb->len);

	len = skb_headlen(skb);
	mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE);
1157
	addr64 = high32(mapping);
S
Stephen Hemminger 已提交
1158 1159 1160

	re = sky2->tx_ring + sky2->tx_prod;

1161 1162
	/* Send high bits if changed or crosses boundary */
	if (addr64 != sky2->tx_addr64 || high32(mapping + len) != sky2->tx_addr64) {
S
Stephen Hemminger 已提交
1163 1164 1165 1166
		le = get_tx_le(sky2);
		le->tx.addr = cpu_to_le32(addr64);
		le->ctrl = 0;
		le->opcode = OP_ADDR64 | HW_OWNER;
1167
		sky2->tx_addr64 = high32(mapping + len);
S
Stephen Hemminger 已提交
1168
	}
1169 1170 1171

	/* Check for TCP Segmentation Offload */
	mss = skb_shinfo(skb)->tso_size;
S
Stephen Hemminger 已提交
1172
	if (mss != 0) {
1173 1174 1175
		/* just drop the packet if non-linear expansion fails */
		if (skb_header_cloned(skb) &&
		    pskb_expand_head(skb, 0, 0, GFP_ATOMIC)) {
1176
			dev_kfree_skb(skb);
S
Stephen Hemminger 已提交
1177
			goto out_unlock;
1178 1179 1180 1181 1182
		}

		mss += ((skb->h.th->doff - 5) * 4);	/* TCP options */
		mss += (skb->nh.iph->ihl * 4) + sizeof(struct tcphdr);
		mss += ETH_HLEN;
S
Stephen Hemminger 已提交
1183
	}
1184

S
Stephen Hemminger 已提交
1185
	if (mss != sky2->tx_last_mss) {
1186 1187
		le = get_tx_le(sky2);
		le->tx.tso.size = cpu_to_le16(mss);
S
Stephen Hemminger 已提交
1188
		le->tx.tso.rsvd = 0;
1189 1190
		le->opcode = OP_LRGLEN | HW_OWNER;
		le->ctrl = 0;
S
Stephen Hemminger 已提交
1191
		sky2->tx_last_mss = mss;
1192 1193 1194
	}

	ctrl = 0;
1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210
#ifdef SKY2_VLAN_TAG_USED
	/* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */
	if (sky2->vlgrp && vlan_tx_tag_present(skb)) {
		if (!le) {
			le = get_tx_le(sky2);
			le->tx.addr = 0;
			le->opcode = OP_VLAN|HW_OWNER;
			le->ctrl = 0;
		} else
			le->opcode |= OP_VLAN;
		le->length = cpu_to_be16(vlan_tx_tag_get(skb));
		ctrl |= INS_VLAN;
	}
#endif

	/* Handle TCP checksum offload */
1211
	if (skb->ip_summed == CHECKSUM_HW) {
S
Stephen Hemminger 已提交
1212 1213
		u16 hdr = skb->h.raw - skb->data;
		u16 offset = hdr + skb->csum;
1214 1215 1216 1217 1218 1219 1220

		ctrl = CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
		if (skb->nh.iph->protocol == IPPROTO_UDP)
			ctrl |= UDPTCP;

		le = get_tx_le(sky2);
		le->tx.csum.start = cpu_to_le16(hdr);
S
Stephen Hemminger 已提交
1221 1222
		le->tx.csum.offset = cpu_to_le16(offset);
		le->length = 0;	/* initial checksum value */
1223
		le->ctrl = 1;	/* one packet */
S
Stephen Hemminger 已提交
1224
		le->opcode = OP_TCPLISW | HW_OWNER;
1225 1226 1227 1228 1229 1230
	}

	le = get_tx_le(sky2);
	le->tx.addr = cpu_to_le32((u32) mapping);
	le->length = cpu_to_le16(len);
	le->ctrl = ctrl;
S
Stephen Hemminger 已提交
1231
	le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
1232

S
Stephen Hemminger 已提交
1233
	/* Record the transmit mapping info */
1234
	re->skb = skb;
1235
	pci_unmap_addr_set(re, mapaddr, mapping);
1236 1237 1238

	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1239
		struct tx_ring_info *fre;
1240 1241 1242

		mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset,
				       frag->size, PCI_DMA_TODEVICE);
1243
		addr64 = high32(mapping);
S
Stephen Hemminger 已提交
1244 1245 1246 1247 1248 1249
		if (addr64 != sky2->tx_addr64) {
			le = get_tx_le(sky2);
			le->tx.addr = cpu_to_le32(addr64);
			le->ctrl = 0;
			le->opcode = OP_ADDR64 | HW_OWNER;
			sky2->tx_addr64 = addr64;
1250 1251 1252 1253 1254 1255
		}

		le = get_tx_le(sky2);
		le->tx.addr = cpu_to_le32((u32) mapping);
		le->length = cpu_to_le16(frag->size);
		le->ctrl = ctrl;
S
Stephen Hemminger 已提交
1256
		le->opcode = OP_BUFFER | HW_OWNER;
1257

S
Stephen Hemminger 已提交
1258 1259
		fre = sky2->tx_ring
		    + ((re - sky2->tx_ring) + i + 1) % TX_RING_SIZE;
1260
		pci_unmap_addr_set(fre, mapaddr, mapping);
1261
	}
1262

S
Stephen Hemminger 已提交
1263
	re->idx = sky2->tx_prod;
1264 1265
	le->ctrl |= EOP;

1266 1267 1268 1269 1270 1271 1272
	avail = tx_avail(sky2);
	if (mss != 0 || avail < TX_MIN_PENDING) {
 		le->ctrl |= FRC_STAT;
		if (avail <= MAX_SKB_TX_LE)
			netif_stop_queue(dev);
	}

1273
	sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
1274

S
Stephen Hemminger 已提交
1275
out_unlock:
1276
	spin_unlock(&sky2->tx_lock);
1277 1278 1279 1280 1281 1282

	dev->trans_start = jiffies;
	return NETDEV_TX_OK;
}

/*
S
Stephen Hemminger 已提交
1283 1284 1285
 * Free ring elements from starting at tx_cons until "done"
 *
 * NB: the hardware will tell us about partial completion of multi-part
S
shemminger@osdl.org 已提交
1286
 *     buffers; these are deferred until completion.
1287
 */
1288
static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
1289
{
1290
	struct net_device *dev = sky2->netdev;
1291 1292
	struct pci_dev *pdev = sky2->hw->pdev;
	u16 nxt, put;
S
Stephen Hemminger 已提交
1293
	unsigned i;
1294

1295
	BUG_ON(done >= TX_RING_SIZE);
1296

1297
	if (unlikely(netif_msg_tx_done(sky2)))
S
shemminger@osdl.org 已提交
1298
		printk(KERN_DEBUG "%s: tx done, up to %u\n",
1299
		       dev->name, done);
1300

1301 1302 1303
	for (put = sky2->tx_cons; put != done; put = nxt) {
		struct tx_ring_info *re = sky2->tx_ring + put;
		struct sk_buff *skb = re->skb;
1304

1305
		nxt = re->idx;
1306
		BUG_ON(nxt >= TX_RING_SIZE);
S
Stephen Hemminger 已提交
1307
		prefetch(sky2->tx_ring + nxt);
1308

S
Stephen Hemminger 已提交
1309
		/* Check for partial status */
1310 1311
		if (tx_dist(put, done) < tx_dist(put, nxt))
			break;
S
Stephen Hemminger 已提交
1312 1313

		skb = re->skb;
1314
		pci_unmap_single(pdev, pci_unmap_addr(re, mapaddr),
1315
				 skb_headlen(skb), PCI_DMA_TODEVICE);
S
Stephen Hemminger 已提交
1316 1317

		for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1318
			struct tx_ring_info *fre;
1319 1320
			fre = sky2->tx_ring + (put + i + 1) % TX_RING_SIZE;
			pci_unmap_page(pdev, pci_unmap_addr(fre, mapaddr),
1321
				       skb_shinfo(skb)->frags[i].size,
1322
				       PCI_DMA_TODEVICE);
1323 1324
		}

1325
		dev_kfree_skb(skb);
S
Stephen Hemminger 已提交
1326 1327
	}

1328
	sky2->tx_cons = put;
1329
	if (tx_avail(sky2) > MAX_SKB_TX_LE)
1330 1331 1332 1333
		netif_wake_queue(dev);
}

/* Cleanup all untransmitted buffers, assume transmitter not running */
1334
static void sky2_tx_clean(struct sky2_port *sky2)
1335
{
1336
	spin_lock_bh(&sky2->tx_lock);
1337
	sky2_tx_complete(sky2, sky2->tx_prod);
1338
	spin_unlock_bh(&sky2->tx_lock);
1339 1340 1341 1342 1343 1344 1345 1346 1347
}

/* Network shutdown */
static int sky2_down(struct net_device *dev)
{
	struct sky2_port *sky2 = netdev_priv(dev);
	struct sky2_hw *hw = sky2->hw;
	unsigned port = sky2->port;
	u16 ctrl;
1348
	u32 imask;
1349

1350 1351 1352 1353
	/* Never really got started! */
	if (!sky2->tx_le)
		return 0;

1354 1355 1356
	if (netif_msg_ifdown(sky2))
		printk(KERN_INFO PFX "%s: disabling interface\n", dev->name);

1357
	/* Stop more packets from being queued */
1358 1359
	netif_stop_queue(dev);

S
Stephen Hemminger 已提交
1360 1361
	sky2_phy_reset(hw, port);

1362 1363 1364 1365 1366
	/* Stop transmitter */
	sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
	sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));

	sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
S
Stephen Hemminger 已提交
1367
		     RB_RST_SET | RB_DIS_OP_MD);
1368 1369

	ctrl = gma_read16(hw, port, GM_GP_CTRL);
S
Stephen Hemminger 已提交
1370
	ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA);
1371 1372 1373 1374 1375
	gma_write16(hw, port, GM_GP_CTRL, ctrl);

	sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);

	/* Workaround shared GMAC reset */
S
Stephen Hemminger 已提交
1376 1377
	if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0
	      && port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388
		sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);

	/* Disable Force Sync bit and Enable Alloc bit */
	sky2_write8(hw, SK_REG(port, TXA_CTRL),
		    TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);

	/* Stop Interval Timer and Limit Counter of Tx Arbiter */
	sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
	sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);

	/* Reset the PCI FIFO of the async Tx queue */
S
Stephen Hemminger 已提交
1389 1390
	sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
		     BMU_RST_SET | BMU_FIFO_RST);
1391 1392 1393 1394 1395 1396 1397

	/* Reset the Tx prefetch units */
	sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL),
		     PREF_UNIT_RST_SET);

	sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);

1398
	sky2_rx_stop(sky2);
1399 1400 1401 1402

	sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
	sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);

1403 1404 1405 1406 1407
	/* Disable port IRQ */
	imask = sky2_read32(hw, B0_IMSK);
	imask &= ~(sky2->port == 0) ? Y2_IS_PORT_1 : Y2_IS_PORT_2;
	sky2_write32(hw, B0_IMSK, imask);

S
shemminger@osdl.org 已提交
1408
	/* turn off LED's */
1409 1410
	sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);

1411 1412
	synchronize_irq(hw->pdev->irq);

1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424
	sky2_tx_clean(sky2);
	sky2_rx_clean(sky2);

	pci_free_consistent(hw->pdev, RX_LE_BYTES,
			    sky2->rx_le, sky2->rx_le_map);
	kfree(sky2->rx_ring);

	pci_free_consistent(hw->pdev,
			    TX_RING_SIZE * sizeof(struct sky2_tx_le),
			    sky2->tx_le, sky2->tx_le_map);
	kfree(sky2->tx_ring);

1425 1426 1427 1428 1429 1430
	sky2->tx_le = NULL;
	sky2->rx_le = NULL;

	sky2->rx_ring = NULL;
	sky2->tx_ring = NULL;

1431 1432 1433 1434 1435
	return 0;
}

static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
{
S
Stephen Hemminger 已提交
1436 1437 1438
	if (!hw->copper)
		return SPEED_1000;

1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458
	if (hw->chip_id == CHIP_ID_YUKON_FE)
		return (aux & PHY_M_PS_SPEED_100) ? SPEED_100 : SPEED_10;

	switch (aux & PHY_M_PS_SPEED_MSK) {
	case PHY_M_PS_SPEED_1000:
		return SPEED_1000;
	case PHY_M_PS_SPEED_100:
		return SPEED_100;
	default:
		return SPEED_10;
	}
}

static void sky2_link_up(struct sky2_port *sky2)
{
	struct sky2_hw *hw = sky2->hw;
	unsigned port = sky2->port;
	u16 reg;

	/* Enable Transmit FIFO Underrun */
S
Stephen Hemminger 已提交
1459
	sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
1460 1461

	reg = gma_read16(hw, port, GM_GP_CTRL);
1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484
	if (sky2->autoneg == AUTONEG_DISABLE) {
		reg |= GM_GPCR_AU_ALL_DIS;

		/* Is write/read necessary?  Copied from sky2_mac_init */
		gma_write16(hw, port, GM_GP_CTRL, reg);
		gma_read16(hw, port, GM_GP_CTRL);

		switch (sky2->speed) {
		case SPEED_1000:
			reg &= ~GM_GPCR_SPEED_100;
			reg |= GM_GPCR_SPEED_1000;
			break;
		case SPEED_100:
			reg &= ~GM_GPCR_SPEED_1000;
			reg |= GM_GPCR_SPEED_100;
			break;
		case SPEED_10:
			reg &= ~(GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100);
			break;
		}
	} else
		reg &= ~GM_GPCR_AU_ALL_DIS;

1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498
	if (sky2->duplex == DUPLEX_FULL || sky2->autoneg == AUTONEG_ENABLE)
		reg |= GM_GPCR_DUP_FULL;

	/* enable Rx/Tx */
	reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
	gma_write16(hw, port, GM_GP_CTRL, reg);
	gma_read16(hw, port, GM_GP_CTRL);

	gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);

	netif_carrier_on(sky2->netdev);
	netif_wake_queue(sky2->netdev);

	/* Turn on link LED */
S
Stephen Hemminger 已提交
1499
	sky2_write8(hw, SK_REG(port, LNK_LED_REG),
1500 1501
		    LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);

S
Stephen Hemminger 已提交
1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515
	if (hw->chip_id == CHIP_ID_YUKON_XL) {
		u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);

		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
		gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, PHY_M_LEDC_LOS_CTRL(1) |	/* LINK/ACT */
			     PHY_M_LEDC_INIT_CTRL(sky2->speed ==
						  SPEED_10 ? 7 : 0) |
			     PHY_M_LEDC_STA1_CTRL(sky2->speed ==
						  SPEED_100 ? 7 : 0) |
			     PHY_M_LEDC_STA0_CTRL(sky2->speed ==
						  SPEED_1000 ? 7 : 0));
		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
	}

1516 1517
	if (netif_msg_link(sky2))
		printk(KERN_INFO PFX
S
shemminger@osdl.org 已提交
1518
		       "%s: Link is up at %d Mbps, %s duplex, flow control %s\n",
1519 1520 1521
		       sky2->netdev->name, sky2->speed,
		       sky2->duplex == DUPLEX_FULL ? "full" : "half",
		       (sky2->tx_pause && sky2->rx_pause) ? "both" :
S
Stephen Hemminger 已提交
1522
		       sky2->tx_pause ? "tx" : sky2->rx_pause ? "rx" : "none");
1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540
}

static void sky2_link_down(struct sky2_port *sky2)
{
	struct sky2_hw *hw = sky2->hw;
	unsigned port = sky2->port;
	u16 reg;

	gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);

	reg = gma_read16(hw, port, GM_GP_CTRL);
	reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
	gma_write16(hw, port, GM_GP_CTRL, reg);
	gma_read16(hw, port, GM_GP_CTRL);	/* PCI post */

	if (sky2->rx_pause && !sky2->tx_pause) {
		/* restore Asymmetric Pause bit */
		gm_phy_write(hw, port, PHY_MARV_AUNE_ADV,
S
Stephen Hemminger 已提交
1541 1542
			     gm_phy_read(hw, port, PHY_MARV_AUNE_ADV)
			     | PHY_M_AN_ASP);
1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555
	}

	netif_carrier_off(sky2->netdev);
	netif_stop_queue(sky2->netdev);

	/* Turn on link LED */
	sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);

	if (netif_msg_link(sky2))
		printk(KERN_INFO PFX "%s: Link is down.\n", sky2->netdev->name);
	sky2_phy_init(hw, port);
}

S
Stephen Hemminger 已提交
1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600
static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
{
	struct sky2_hw *hw = sky2->hw;
	unsigned port = sky2->port;
	u16 lpa;

	lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP);

	if (lpa & PHY_M_AN_RF) {
		printk(KERN_ERR PFX "%s: remote fault", sky2->netdev->name);
		return -1;
	}

	if (hw->chip_id != CHIP_ID_YUKON_FE &&
	    gm_phy_read(hw, port, PHY_MARV_1000T_STAT) & PHY_B_1000S_MSF) {
		printk(KERN_ERR PFX "%s: master/slave fault",
		       sky2->netdev->name);
		return -1;
	}

	if (!(aux & PHY_M_PS_SPDUP_RES)) {
		printk(KERN_ERR PFX "%s: speed/duplex mismatch",
		       sky2->netdev->name);
		return -1;
	}

	sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;

	sky2->speed = sky2_phy_speed(hw, aux);

	/* Pause bits are offset (9..8) */
	if (hw->chip_id == CHIP_ID_YUKON_XL)
		aux >>= 6;

	sky2->rx_pause = (aux & PHY_M_PS_RX_P_EN) != 0;
	sky2->tx_pause = (aux & PHY_M_PS_TX_P_EN) != 0;

	if ((sky2->tx_pause || sky2->rx_pause)
	    && !(sky2->speed < SPEED_1000 && sky2->duplex == DUPLEX_HALF))
		sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
	else
		sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);

	return 0;
}
1601

1602 1603
/* Interrupt from PHY */
static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
1604
{
1605 1606
	struct net_device *dev = hw->dev[port];
	struct sky2_port *sky2 = netdev_priv(dev);
1607 1608
	u16 istatus, phystat;

1609 1610 1611 1612 1613 1614
	spin_lock(&sky2->phy_lock);
	istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
	phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);

	if (!netif_running(dev))
		goto out;
1615 1616 1617 1618 1619 1620

	if (netif_msg_intr(sky2))
		printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n",
		       sky2->netdev->name, istatus, phystat);

	if (istatus & PHY_M_IS_AN_COMPL) {
S
Stephen Hemminger 已提交
1621 1622 1623 1624
		if (sky2_autoneg_done(sky2, phystat) == 0)
			sky2_link_up(sky2);
		goto out;
	}
1625

S
Stephen Hemminger 已提交
1626 1627
	if (istatus & PHY_M_IS_LSP_CHANGE)
		sky2->speed = sky2_phy_speed(hw, phystat);
1628

S
Stephen Hemminger 已提交
1629 1630 1631
	if (istatus & PHY_M_IS_DUP_CHANGE)
		sky2->duplex =
		    (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
1632

S
Stephen Hemminger 已提交
1633 1634
	if (istatus & PHY_M_IS_LST_CHANGE) {
		if (phystat & PHY_M_PS_LINK_UP)
1635
			sky2_link_up(sky2);
S
Stephen Hemminger 已提交
1636 1637
		else
			sky2_link_down(sky2);
1638
	}
S
Stephen Hemminger 已提交
1639
out:
1640
	spin_unlock(&sky2->phy_lock);
1641 1642
}

1643 1644 1645 1646

/* Transmit timeout is only called if we are running, carries is up
 * and tx queue is full (stopped).
 */
1647 1648 1649
static void sky2_tx_timeout(struct net_device *dev)
{
	struct sky2_port *sky2 = netdev_priv(dev);
1650 1651
	struct sky2_hw *hw = sky2->hw;
	unsigned txq = txqaddr[sky2->port];
1652
	u16 report, done;
1653 1654 1655 1656

	if (netif_msg_timer(sky2))
		printk(KERN_ERR PFX "%s: tx timeout\n", dev->name);

1657 1658
	report = sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX);
	done = sky2_read16(hw, Q_ADDR(txq, Q_DONE));
1659

1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676
	printk(KERN_DEBUG PFX "%s: transmit ring %u .. %u report=%u done=%u\n",
	       dev->name,
	       sky2->tx_cons, sky2->tx_prod, report, done);

	if (report != done) {
		printk(KERN_INFO PFX "status burst pending (irq moderation?)\n");

		sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
		sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
	} else if (report != sky2->tx_cons) {
		printk(KERN_INFO PFX "status report lost?\n");

		spin_lock_bh(&sky2->tx_lock);
		sky2_tx_complete(sky2, report);
		spin_unlock_bh(&sky2->tx_lock);
	} else {
		printk(KERN_INFO PFX "hardware hung? flushing\n");
1677

1678 1679 1680 1681 1682 1683 1684 1685
		sky2_write32(hw, Q_ADDR(txq, Q_CSR), BMU_STOP);
		sky2_write32(hw, Y2_QADDR(txq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);

		sky2_tx_clean(sky2);

		sky2_qset(hw, txq);
		sky2_prefetch_init(hw, txq, sky2->tx_le_map, TX_RING_SIZE - 1);
	}
1686 1687
}

1688 1689

#define roundup(x, y)   ((((x)+((y)-1))/(y))*(y))
1690 1691 1692
/* Want receive buffer size to be multiple of 64 bits
 * and incl room for vlan and truncation
 */
1693 1694
static inline unsigned sky2_buf_size(int mtu)
{
1695
	return roundup(mtu + ETH_HLEN + VLAN_HLEN, 8) + 8;
1696 1697
}

1698 1699
static int sky2_change_mtu(struct net_device *dev, int new_mtu)
{
1700 1701 1702 1703
	struct sky2_port *sky2 = netdev_priv(dev);
	struct sky2_hw *hw = sky2->hw;
	int err;
	u16 ctl, mode;
1704
	u32 imask;
1705 1706 1707 1708

	if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
		return -EINVAL;

1709 1710 1711
	if (hw->chip_id == CHIP_ID_YUKON_EC_U && new_mtu > ETH_DATA_LEN)
		return -EINVAL;

1712 1713 1714 1715 1716
	if (!netif_running(dev)) {
		dev->mtu = new_mtu;
		return 0;
	}

1717
	imask = sky2_read32(hw, B0_IMSK);
1718 1719
	sky2_write32(hw, B0_IMSK, 0);

1720 1721 1722 1723
	dev->trans_start = jiffies;	/* prevent tx timeout */
	netif_stop_queue(dev);
	netif_poll_disable(hw->dev[0]);

1724 1725
	synchronize_irq(hw->pdev->irq);

1726 1727 1728 1729
	ctl = gma_read16(hw, sky2->port, GM_GP_CTRL);
	gma_write16(hw, sky2->port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
	sky2_rx_stop(sky2);
	sky2_rx_clean(sky2);
1730 1731

	dev->mtu = new_mtu;
1732
	sky2->rx_bufsize = sky2_buf_size(new_mtu);
1733 1734 1735 1736 1737 1738 1739
	mode = DATA_BLIND_VAL(DATA_BLIND_DEF) |
		GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);

	if (dev->mtu > ETH_DATA_LEN)
		mode |= GM_SMOD_JUMBO_ENA;

	gma_write16(hw, sky2->port, GM_SERIAL_MODE, mode);
1740

1741
	sky2_write8(hw, RB_ADDR(rxqaddr[sky2->port], RB_CTRL), RB_ENA_OP_MD);
1742

1743
	err = sky2_rx_start(sky2);
1744
	sky2_write32(hw, B0_IMSK, imask);
1745

1746 1747 1748 1749 1750 1751 1752 1753 1754
	if (err)
		dev_close(dev);
	else {
		gma_write16(hw, sky2->port, GM_GP_CTRL, ctl);

		netif_poll_enable(hw->dev[0]);
		netif_wake_queue(dev);
	}

1755 1756 1757 1758 1759 1760
	return err;
}

/*
 * Receive one packet.
 * For small packets or errors, just reuse existing skb.
S
shemminger@osdl.org 已提交
1761
 * For larger packets, get new buffer.
1762
 */
1763
static struct sk_buff *sky2_receive(struct sky2_port *sky2,
1764 1765 1766
				    u16 length, u32 status)
{
	struct ring_info *re = sky2->rx_ring + sky2->rx_next;
1767
	struct sk_buff *skb = NULL;
1768 1769 1770

	if (unlikely(netif_msg_rx_status(sky2)))
		printk(KERN_DEBUG PFX "%s: rx slot %u status 0x%x len %d\n",
1771
		       sky2->netdev->name, sky2->rx_next, status, length);
1772

S
Stephen Hemminger 已提交
1773
	sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
S
Stephen Hemminger 已提交
1774
	prefetch(sky2->rx_ring + sky2->rx_next);
1775

1776
	if (status & GMR_FS_ANY_ERR)
1777 1778
		goto error;

1779 1780 1781
	if (!(status & GMR_FS_RX_OK))
		goto resubmit;

1782
	if (length > sky2->netdev->mtu + ETH_HLEN)
1783 1784
		goto oversize;

1785
	if (length < copybreak) {
1786 1787
		skb = alloc_skb(length + 2, GFP_ATOMIC);
		if (!skb)
S
Stephen Hemminger 已提交
1788 1789
			goto resubmit;

1790
		skb_reserve(skb, 2);
S
Stephen Hemminger 已提交
1791 1792
		pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->mapaddr,
					    length, PCI_DMA_FROMDEVICE);
1793
		memcpy(skb->data, re->skb->data, length);
1794 1795
		skb->ip_summed = re->skb->ip_summed;
		skb->csum = re->skb->csum;
S
Stephen Hemminger 已提交
1796 1797 1798
		pci_dma_sync_single_for_device(sky2->hw->pdev, re->mapaddr,
					       length, PCI_DMA_FROMDEVICE);
	} else {
1799 1800
		struct sk_buff *nskb;

1801
		nskb = sky2_alloc_skb(sky2->rx_bufsize, GFP_ATOMIC);
S
Stephen Hemminger 已提交
1802 1803
		if (!nskb)
			goto resubmit;
1804

S
Stephen Hemminger 已提交
1805
		skb = re->skb;
1806
		re->skb = nskb;
S
Stephen Hemminger 已提交
1807
		pci_unmap_single(sky2->hw->pdev, re->mapaddr,
1808
				 sky2->rx_bufsize, PCI_DMA_FROMDEVICE);
S
Stephen Hemminger 已提交
1809
		prefetch(skb->data);
1810

S
Stephen Hemminger 已提交
1811
		re->mapaddr = pci_map_single(sky2->hw->pdev, nskb->data,
1812
					     sky2->rx_bufsize, PCI_DMA_FROMDEVICE);
S
Stephen Hemminger 已提交
1813
	}
1814

1815
	skb_put(skb, length);
S
Stephen Hemminger 已提交
1816
resubmit:
1817
	re->skb->ip_summed = CHECKSUM_NONE;
1818
	sky2_rx_add(sky2, re->mapaddr);
1819

1820
	/* Tell receiver about new buffers. */
1821
	sky2_put_idx(sky2->hw, rxqaddr[sky2->port], sky2->rx_put);
1822

1823 1824
	return skb;

1825 1826 1827 1828
oversize:
	++sky2->net_stats.rx_over_errors;
	goto resubmit;

1829
error:
1830 1831
	++sky2->net_stats.rx_errors;

1832
	if (netif_msg_rx_err(sky2) && net_ratelimit())
1833 1834
		printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n",
		       sky2->netdev->name, status, length);
S
Stephen Hemminger 已提交
1835 1836

	if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE))
1837 1838 1839 1840 1841
		sky2->net_stats.rx_length_errors++;
	if (status & GMR_FS_FRAGMENT)
		sky2->net_stats.rx_frame_errors++;
	if (status & GMR_FS_CRC_ERR)
		sky2->net_stats.rx_crc_errors++;
S
Stephen Hemminger 已提交
1842 1843
	if (status & GMR_FS_RX_FF_OV)
		sky2->net_stats.rx_fifo_errors++;
1844

S
Stephen Hemminger 已提交
1845
	goto resubmit;
1846 1847
}

1848 1849
/* Transmit complete */
static inline void sky2_tx_done(struct net_device *dev, u16 last)
1850
{
1851
	struct sky2_port *sky2 = netdev_priv(dev);
1852

1853 1854 1855 1856
	if (netif_running(dev)) {
		spin_lock(&sky2->tx_lock);
		sky2_tx_complete(sky2, last);
		spin_unlock(&sky2->tx_lock);
1857
	}
1858 1859
}

1860 1861
/* Process status response ring */
static int sky2_status_intr(struct sky2_hw *hw, int to_do)
1862
{
1863
	int work_done = 0;
1864

1865
	rmb();
1866

1867
	for(;;) {
1868 1869
		struct sky2_status_le *le  = hw->st_le + hw->st_idx;
		struct net_device *dev;
1870
		struct sky2_port *sky2;
1871 1872 1873
		struct sk_buff *skb;
		u32 status;
		u16 length;
1874 1875 1876 1877 1878 1879
		u8  link, opcode;

		opcode = le->opcode;
		if (!opcode)
			break;
		opcode &= ~HW_OWNER;
1880

1881
		hw->st_idx = (hw->st_idx + 1) % STATUS_RING_SIZE;
1882
		le->opcode = 0;
1883

1884 1885 1886
		link = le->link;
		BUG_ON(link >= 2);
		dev = hw->dev[link];
1887 1888

		sky2 = netdev_priv(dev);
1889 1890
		length = le->length;
		status = le->status;
1891

1892
		switch (opcode) {
1893
		case OP_RXSTAT:
1894
			skb = sky2_receive(sky2, length, status);
1895 1896
			if (!skb)
				break;
1897 1898 1899 1900 1901

			skb->dev = dev;
			skb->protocol = eth_type_trans(skb, dev);
			dev->last_rx = jiffies;

1902 1903 1904 1905 1906 1907 1908
#ifdef SKY2_VLAN_TAG_USED
			if (sky2->vlgrp && (status & GMR_FS_VLAN)) {
				vlan_hwaccel_receive_skb(skb,
							 sky2->vlgrp,
							 be16_to_cpu(sky2->rx_tag));
			} else
#endif
1909
				netif_receive_skb(skb);
1910 1911 1912

			if (++work_done >= to_do)
				goto exit_loop;
1913 1914
			break;

1915 1916 1917 1918 1919 1920 1921 1922 1923
#ifdef SKY2_VLAN_TAG_USED
		case OP_RXVLAN:
			sky2->rx_tag = length;
			break;

		case OP_RXCHKSVLAN:
			sky2->rx_tag = length;
			/* fall through */
#endif
1924
		case OP_RXCHKS:
1925 1926 1927
			skb = sky2->rx_ring[sky2->rx_next].skb;
			skb->ip_summed = CHECKSUM_HW;
			skb->csum = le16_to_cpu(status);
1928 1929 1930
			break;

		case OP_TXINDEXLE:
1931
			/* TX index reports status for both ports */
1932 1933 1934 1935 1936
			sky2_tx_done(hw->dev[0], status & 0xffff);
			if (hw->dev[1])
				sky2_tx_done(hw->dev[1],
				     ((status >> 24) & 0xff)
					     | (u16)(length & 0xf) << 8);
1937 1938 1939 1940
			break;

		default:
			if (net_ratelimit())
S
Stephen Hemminger 已提交
1941
				printk(KERN_WARNING PFX
1942
				       "unknown status opcode 0x%x\n", opcode);
1943 1944
			break;
		}
1945
	}
1946

1947
exit_loop:
1948
	return work_done;
1949 1950 1951 1952 1953 1954
}

static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status)
{
	struct net_device *dev = hw->dev[port];

1955 1956 1957
	if (net_ratelimit())
		printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n",
		       dev->name, status);
1958 1959

	if (status & Y2_IS_PAR_RD1) {
1960 1961 1962
		if (net_ratelimit())
			printk(KERN_ERR PFX "%s: ram data read parity error\n",
			       dev->name);
1963 1964 1965 1966 1967
		/* Clear IRQ */
		sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
	}

	if (status & Y2_IS_PAR_WR1) {
1968 1969 1970
		if (net_ratelimit())
			printk(KERN_ERR PFX "%s: ram data write parity error\n",
			       dev->name);
1971 1972 1973 1974 1975

		sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
	}

	if (status & Y2_IS_PAR_MAC1) {
1976 1977
		if (net_ratelimit())
			printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name);
1978 1979 1980 1981
		sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
	}

	if (status & Y2_IS_PAR_RX1) {
1982 1983
		if (net_ratelimit())
			printk(KERN_ERR PFX "%s: RX parity error\n", dev->name);
1984 1985 1986 1987
		sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
	}

	if (status & Y2_IS_TCP_TXA1) {
1988 1989 1990
		if (net_ratelimit())
			printk(KERN_ERR PFX "%s: TCP segmentation error\n",
			       dev->name);
1991 1992 1993 1994 1995 1996 1997 1998
		sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
	}
}

static void sky2_hw_intr(struct sky2_hw *hw)
{
	u32 status = sky2_read32(hw, B0_HWE_ISRC);

S
Stephen Hemminger 已提交
1999
	if (status & Y2_IS_TIST_OV)
2000 2001 2002
		sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);

	if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
S
Stephen Hemminger 已提交
2003 2004
		u16 pci_err;

2005
		pci_err = sky2_pci_read16(hw, PCI_STATUS);
2006 2007 2008
		if (net_ratelimit())
			printk(KERN_ERR PFX "%s: pci hw error (0x%x)\n",
			       pci_name(hw->pdev), pci_err);
2009 2010

		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2011
		sky2_pci_write16(hw, PCI_STATUS,
S
Stephen Hemminger 已提交
2012
				      pci_err | PCI_STATUS_ERROR_BITS);
2013 2014 2015 2016
		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
	}

	if (status & Y2_IS_PCI_EXP) {
S
shemminger@osdl.org 已提交
2017
		/* PCI-Express uncorrectable Error occurred */
S
Stephen Hemminger 已提交
2018 2019
		u32 pex_err;

2020
		pex_err = sky2_pci_read32(hw, PEX_UNC_ERR_STAT);
2021

2022 2023 2024
		if (net_ratelimit())
			printk(KERN_ERR PFX "%s: pci express error (0x%x)\n",
			       pci_name(hw->pdev), pex_err);
2025 2026 2027

		/* clear the interrupt */
		sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2028
		sky2_pci_write32(hw, PEX_UNC_ERR_STAT,
S
Stephen Hemminger 已提交
2029
				       0xffffffffUL);
2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066
		sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);

		if (pex_err & PEX_FATAL_ERRORS) {
			u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
			hwmsk &= ~Y2_IS_PCI_EXP;
			sky2_write32(hw, B0_HWE_IMSK, hwmsk);
		}
	}

	if (status & Y2_HWE_L1_MASK)
		sky2_hw_error(hw, 0, status);
	status >>= 8;
	if (status & Y2_HWE_L1_MASK)
		sky2_hw_error(hw, 1, status);
}

static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
{
	struct net_device *dev = hw->dev[port];
	struct sky2_port *sky2 = netdev_priv(dev);
	u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC));

	if (netif_msg_intr(sky2))
		printk(KERN_INFO PFX "%s: mac interrupt status 0x%x\n",
		       dev->name, status);

	if (status & GM_IS_RX_FF_OR) {
		++sky2->net_stats.rx_fifo_errors;
		sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
	}

	if (status & GM_IS_TX_FF_UR) {
		++sky2->net_stats.tx_fifo_errors;
		sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
	}
}

2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087
/* This should never happen it is a fatal situation */
static void sky2_descriptor_error(struct sky2_hw *hw, unsigned port,
				  const char *rxtx, u32 mask)
{
	struct net_device *dev = hw->dev[port];
	struct sky2_port *sky2 = netdev_priv(dev);
	u32 imask;

	printk(KERN_ERR PFX "%s: %s descriptor error (hardware problem)\n",
	       dev ? dev->name : "<not registered>", rxtx);

	imask = sky2_read32(hw, B0_IMSK);
	imask &= ~mask;
	sky2_write32(hw, B0_IMSK, imask);

	if (dev) {
		spin_lock(&sky2->phy_lock);
		sky2_link_down(sky2);
		spin_unlock(&sky2->phy_lock);
	}
}
2088

2089
static int sky2_poll(struct net_device *dev0, int *budget)
2090
{
2091 2092 2093
	struct sky2_hw *hw = ((struct sky2_port *) netdev_priv(dev0))->hw;
	int work_limit = min(dev0->quota, *budget);
	int work_done = 0;
2094
	u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
2095

2096 2097 2098 2099 2100 2101
	if (unlikely(status & ~Y2_IS_STAT_BMU)) {
		if (status & Y2_IS_HW_ERR)
			sky2_hw_intr(hw);

		if (status & Y2_IS_IRQ_PHY1)
			sky2_phy_intr(hw, 0);
2102

2103 2104
		if (status & Y2_IS_IRQ_PHY2)
			sky2_phy_intr(hw, 1);
2105

2106 2107
		if (status & Y2_IS_IRQ_MAC1)
			sky2_mac_intr(hw, 0);
2108

2109 2110
		if (status & Y2_IS_IRQ_MAC2)
			sky2_mac_intr(hw, 1);
2111

2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123
		if (status & Y2_IS_CHK_RX1)
			sky2_descriptor_error(hw, 0, "receive", Y2_IS_CHK_RX1);

		if (status & Y2_IS_CHK_RX2)
			sky2_descriptor_error(hw, 1, "receive", Y2_IS_CHK_RX2);

		if (status & Y2_IS_CHK_TXA1)
			sky2_descriptor_error(hw, 0, "transmit", Y2_IS_CHK_TXA1);

		if (status & Y2_IS_CHK_TXA2)
			sky2_descriptor_error(hw, 1, "transmit", Y2_IS_CHK_TXA2);
	}
2124

2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137
	if (status & Y2_IS_STAT_BMU) {
		work_done = sky2_status_intr(hw, work_limit);
		*budget -= work_done;
		dev0->quota -= work_done;

		if (work_done >= work_limit)
			return 1;

		sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
	}

	netif_rx_complete(dev0);

2138
	status = sky2_read32(hw, B0_Y2_SP_LISR);
2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151
	return 0;
}

static irqreturn_t sky2_intr(int irq, void *dev_id, struct pt_regs *regs)
{
	struct sky2_hw *hw = dev_id;
	struct net_device *dev0 = hw->dev[0];
	u32 status;

	/* Reading this mask interrupts as side effect */
	status = sky2_read32(hw, B0_Y2_SP_ISRC2);
	if (status == 0 || status == ~0)
		return IRQ_NONE;
S
Stephen Hemminger 已提交
2152

2153 2154 2155
	prefetch(&hw->st_le[hw->st_idx]);
	if (likely(__netif_rx_schedule_prep(dev0)))
		__netif_rx_schedule(dev0);
2156 2157
	else
		printk(KERN_DEBUG PFX "irq race detected\n");
S
Stephen Hemminger 已提交
2158

2159 2160 2161 2162 2163 2164 2165 2166
	return IRQ_HANDLED;
}

#ifdef CONFIG_NET_POLL_CONTROLLER
static void sky2_netpoll(struct net_device *dev)
{
	struct sky2_port *sky2 = netdev_priv(dev);

S
Stephen Hemminger 已提交
2167
	sky2_intr(sky2->hw->pdev->irq, sky2->hw, NULL);
2168 2169 2170 2171
}
#endif

/* Chip internal frequency for clock calculations */
2172
static inline u32 sky2_mhz(const struct sky2_hw *hw)
2173
{
S
Stephen Hemminger 已提交
2174
	switch (hw->chip_id) {
2175
	case CHIP_ID_YUKON_EC:
2176
	case CHIP_ID_YUKON_EC_U:
2177
		return 125;	/* 125 Mhz */
2178
	case CHIP_ID_YUKON_FE:
2179
		return 100;	/* 100 Mhz */
S
Stephen Hemminger 已提交
2180
	default:		/* YUKON_XL */
2181
		return 156;	/* 156 Mhz */
2182 2183 2184
	}
}

2185
static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
2186
{
2187
	return sky2_mhz(hw) * us;
2188 2189
}

2190
static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
2191
{
2192
	return clk / sky2_mhz(hw);
2193 2194
}

2195

2196 2197 2198 2199
static int sky2_reset(struct sky2_hw *hw)
{
	u16 status;
	u8 t8, pmd_type;
2200
	int i;
2201 2202

	sky2_write8(hw, B0_CTST, CS_RST_CLR);
2203

2204 2205 2206 2207 2208 2209 2210
	hw->chip_id = sky2_read8(hw, B2_CHIP_ID);
	if (hw->chip_id < CHIP_ID_YUKON_XL || hw->chip_id > CHIP_ID_YUKON_FE) {
		printk(KERN_ERR PFX "%s: unsupported chip type 0x%x\n",
		       pci_name(hw->pdev), hw->chip_id);
		return -EOPNOTSUPP;
	}

2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227
	hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;

	/* This rev is really old, and requires untested workarounds */
	if (hw->chip_id == CHIP_ID_YUKON_EC && hw->chip_rev == CHIP_REV_YU_EC_A1) {
		printk(KERN_ERR PFX "%s: unsupported revision Yukon-%s (0x%x) rev %d\n",
		       pci_name(hw->pdev), yukon2_name[hw->chip_id - CHIP_ID_YUKON_XL],
		       hw->chip_id, hw->chip_rev);
		return -EOPNOTSUPP;
	}

	/* This chip is new and not tested yet */
	if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
		pr_info(PFX "%s: is a version of Yukon 2 chipset that has not been tested yet.\n",
			pci_name(hw->pdev));
		pr_info("Please report success/failure to maintainer <shemminger@osdl.org>\n");
	}

2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238
	/* disable ASF */
	if (hw->chip_id <= CHIP_ID_YUKON_EC) {
		sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
		sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
	}

	/* do a SW reset */
	sky2_write8(hw, B0_CTST, CS_RST_SET);
	sky2_write8(hw, B0_CTST, CS_RST_CLR);

	/* clear PCI errors, if any */
2239
	status = sky2_pci_read16(hw, PCI_STATUS);
2240

2241
	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2242 2243
	sky2_pci_write16(hw, PCI_STATUS, status | PCI_STATUS_ERROR_BITS);

2244 2245 2246 2247

	sky2_write8(hw, B0_CTST, CS_MRST_CLR);

	/* clear any PEX errors */
2248
	if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
2249 2250
		sky2_pci_write32(hw, PEX_UNC_ERR_STAT, 0xffffffffUL);

2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261

	pmd_type = sky2_read8(hw, B2_PMD_TYP);
	hw->copper = !(pmd_type == 'L' || pmd_type == 'S');

	hw->ports = 1;
	t8 = sky2_read8(hw, B2_Y2_HW_RES);
	if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
		if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC))
			++hw->ports;
	}

2262
	sky2_set_power_state(hw, PCI_D0);
2263 2264 2265 2266 2267 2268 2269 2270

	for (i = 0; i < hw->ports; i++) {
		sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
		sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
	}

	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);

S
Stephen Hemminger 已提交
2271 2272
	/* Clear I2C IRQ noise */
	sky2_write32(hw, B2_I2C_IRQ, 1);
2273 2274 2275 2276

	/* turn off hardware timer (unused) */
	sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
	sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
S
Stephen Hemminger 已提交
2277

2278 2279
	sky2_write8(hw, B0_Y2LED, LED_STAT_ON);

2280 2281
	/* Turn off descriptor polling */
	sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
2282 2283 2284

	/* Turn off receive timestamp */
	sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
S
Stephen Hemminger 已提交
2285
	sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
2286 2287 2288 2289 2290 2291 2292

	/* enable the Tx Arbiters */
	for (i = 0; i < hw->ports; i++)
		sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);

	/* Initialize ram interface */
	for (i = 0; i < hw->ports; i++) {
S
Stephen Hemminger 已提交
2293
		sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320

		sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
		sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
		sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
		sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
		sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
		sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
		sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
		sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
		sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
		sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
		sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
		sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
	}

	sky2_write32(hw, B0_HWE_IMSK, Y2_HWE_ALL_MASK);

	for (i = 0; i < hw->ports; i++)
		sky2_phy_reset(hw, i);

	memset(hw->st_le, 0, STATUS_LE_BYTES);
	hw->st_idx = 0;

	sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET);
	sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR);

	sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma);
S
Stephen Hemminger 已提交
2321
	sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32);
2322 2323

	/* Set the list last index */
S
Stephen Hemminger 已提交
2324
	sky2_write16(hw, STAT_LAST_IDX, STATUS_RING_SIZE - 1);
2325

2326 2327
	sky2_write16(hw, STAT_TX_IDX_TH, 10);
	sky2_write8(hw, STAT_FIFO_WM, 16);
2328

2329 2330 2331 2332 2333
	/* set Status-FIFO ISR watermark */
	if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
		sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
	else
		sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
2334

2335
	sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
2336 2337
	sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
	sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100));
2338

S
Stephen Hemminger 已提交
2339
	/* enable status unit */
2340 2341 2342 2343 2344 2345 2346 2347 2348
	sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON);

	sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
	sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
	sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);

	return 0;
}

2349
static u32 sky2_supported_modes(const struct sky2_hw *hw)
2350 2351 2352
{
	u32 modes;
	if (hw->copper) {
S
Stephen Hemminger 已提交
2353 2354 2355 2356 2357
		modes = SUPPORTED_10baseT_Half
		    | SUPPORTED_10baseT_Full
		    | SUPPORTED_100baseT_Half
		    | SUPPORTED_100baseT_Full
		    | SUPPORTED_Autoneg | SUPPORTED_TP;
2358 2359 2360

		if (hw->chip_id != CHIP_ID_YUKON_FE)
			modes |= SUPPORTED_1000baseT_Half
S
Stephen Hemminger 已提交
2361
			    | SUPPORTED_1000baseT_Full;
2362 2363
	} else
		modes = SUPPORTED_1000baseT_Full | SUPPORTED_FIBRE
S
Stephen Hemminger 已提交
2364
		    | SUPPORTED_Autoneg;
2365 2366 2367
	return modes;
}

S
Stephen Hemminger 已提交
2368
static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2369 2370 2371 2372 2373 2374 2375 2376 2377
{
	struct sky2_port *sky2 = netdev_priv(dev);
	struct sky2_hw *hw = sky2->hw;

	ecmd->transceiver = XCVR_INTERNAL;
	ecmd->supported = sky2_supported_modes(hw);
	ecmd->phy_address = PHY_ADDR_MARV;
	if (hw->copper) {
		ecmd->supported = SUPPORTED_10baseT_Half
S
Stephen Hemminger 已提交
2378 2379 2380 2381 2382 2383
		    | SUPPORTED_10baseT_Full
		    | SUPPORTED_100baseT_Half
		    | SUPPORTED_100baseT_Full
		    | SUPPORTED_1000baseT_Half
		    | SUPPORTED_1000baseT_Full
		    | SUPPORTED_Autoneg | SUPPORTED_TP;
2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407
		ecmd->port = PORT_TP;
	} else
		ecmd->port = PORT_FIBRE;

	ecmd->advertising = sky2->advertising;
	ecmd->autoneg = sky2->autoneg;
	ecmd->speed = sky2->speed;
	ecmd->duplex = sky2->duplex;
	return 0;
}

static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
{
	struct sky2_port *sky2 = netdev_priv(dev);
	const struct sky2_hw *hw = sky2->hw;
	u32 supported = sky2_supported_modes(hw);

	if (ecmd->autoneg == AUTONEG_ENABLE) {
		ecmd->advertising = supported;
		sky2->duplex = -1;
		sky2->speed = -1;
	} else {
		u32 setting;

S
Stephen Hemminger 已提交
2408
		switch (ecmd->speed) {
2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420 2421 2422 2423 2424 2425 2426 2427 2428 2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445 2446 2447
		case SPEED_1000:
			if (ecmd->duplex == DUPLEX_FULL)
				setting = SUPPORTED_1000baseT_Full;
			else if (ecmd->duplex == DUPLEX_HALF)
				setting = SUPPORTED_1000baseT_Half;
			else
				return -EINVAL;
			break;
		case SPEED_100:
			if (ecmd->duplex == DUPLEX_FULL)
				setting = SUPPORTED_100baseT_Full;
			else if (ecmd->duplex == DUPLEX_HALF)
				setting = SUPPORTED_100baseT_Half;
			else
				return -EINVAL;
			break;

		case SPEED_10:
			if (ecmd->duplex == DUPLEX_FULL)
				setting = SUPPORTED_10baseT_Full;
			else if (ecmd->duplex == DUPLEX_HALF)
				setting = SUPPORTED_10baseT_Half;
			else
				return -EINVAL;
			break;
		default:
			return -EINVAL;
		}

		if ((setting & supported) == 0)
			return -EINVAL;

		sky2->speed = ecmd->speed;
		sky2->duplex = ecmd->duplex;
	}

	sky2->autoneg = ecmd->autoneg;
	sky2->advertising = ecmd->advertising;

2448 2449
	if (netif_running(dev))
		sky2_phy_reinit(sky2);
2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465

	return 0;
}

static void sky2_get_drvinfo(struct net_device *dev,
			     struct ethtool_drvinfo *info)
{
	struct sky2_port *sky2 = netdev_priv(dev);

	strcpy(info->driver, DRV_NAME);
	strcpy(info->version, DRV_VERSION);
	strcpy(info->fw_version, "N/A");
	strcpy(info->bus_info, pci_name(sky2->hw->pdev));
}

static const struct sky2_stat {
S
Stephen Hemminger 已提交
2466 2467
	char name[ETH_GSTRING_LEN];
	u16 offset;
2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478
} sky2_stats[] = {
	{ "tx_bytes",	   GM_TXO_OK_HI },
	{ "rx_bytes",	   GM_RXO_OK_HI },
	{ "tx_broadcast",  GM_TXF_BC_OK },
	{ "rx_broadcast",  GM_RXF_BC_OK },
	{ "tx_multicast",  GM_TXF_MC_OK },
	{ "rx_multicast",  GM_RXF_MC_OK },
	{ "tx_unicast",    GM_TXF_UC_OK },
	{ "rx_unicast",    GM_RXF_UC_OK },
	{ "tx_mac_pause",  GM_TXF_MPAUSE },
	{ "rx_mac_pause",  GM_RXF_MPAUSE },
2479
	{ "collisions",    GM_TXF_COL },
2480 2481
	{ "late_collision",GM_TXF_LAT_COL },
	{ "aborted", 	   GM_TXF_ABO_COL },
2482
	{ "single_collisions", GM_TXF_SNG_COL },
2483
	{ "multi_collisions", GM_TXF_MUL_COL },
2484

2485
	{ "rx_short",      GM_RXF_SHT },
2486
	{ "rx_runt", 	   GM_RXE_FRAG },
2487 2488 2489 2490 2491 2492 2493
	{ "rx_64_byte_packets", GM_RXF_64B },
	{ "rx_65_to_127_byte_packets", GM_RXF_127B },
	{ "rx_128_to_255_byte_packets", GM_RXF_255B },
	{ "rx_256_to_511_byte_packets", GM_RXF_511B },
	{ "rx_512_to_1023_byte_packets", GM_RXF_1023B },
	{ "rx_1024_to_1518_byte_packets", GM_RXF_1518B },
	{ "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ },
2494
	{ "rx_too_long",   GM_RXF_LNG_ERR },
2495 2496
	{ "rx_fifo_overflow", GM_RXE_FIFO_OV },
	{ "rx_jabber",     GM_RXF_JAB_PKT },
2497
	{ "rx_fcs_error",   GM_RXF_FCS_ERR },
2498 2499 2500 2501 2502 2503 2504 2505 2506

	{ "tx_64_byte_packets", GM_TXF_64B },
	{ "tx_65_to_127_byte_packets", GM_TXF_127B },
	{ "tx_128_to_255_byte_packets", GM_TXF_255B },
	{ "tx_256_to_511_byte_packets", GM_TXF_511B },
	{ "tx_512_to_1023_byte_packets", GM_TXF_1023B },
	{ "tx_1024_to_1518_byte_packets", GM_TXF_1518B },
	{ "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ },
	{ "tx_fifo_underrun", GM_TXE_FIFO_UR },
2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520
};

static u32 sky2_get_rx_csum(struct net_device *dev)
{
	struct sky2_port *sky2 = netdev_priv(dev);

	return sky2->rx_csum;
}

static int sky2_set_rx_csum(struct net_device *dev, u32 data)
{
	struct sky2_port *sky2 = netdev_priv(dev);

	sky2->rx_csum = data;
S
Stephen Hemminger 已提交
2521

2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532 2533
	sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
		     data ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);

	return 0;
}

static u32 sky2_get_msglevel(struct net_device *netdev)
{
	struct sky2_port *sky2 = netdev_priv(netdev);
	return sky2->msg_enable;
}

2534 2535 2536 2537 2538 2539 2540
static int sky2_nway_reset(struct net_device *dev)
{
	struct sky2_port *sky2 = netdev_priv(dev);

	if (sky2->autoneg != AUTONEG_ENABLE)
		return -EINVAL;

2541
	sky2_phy_reinit(sky2);
2542 2543 2544 2545

	return 0;
}

S
Stephen Hemminger 已提交
2546
static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count)
2547 2548 2549 2550 2551 2552
{
	struct sky2_hw *hw = sky2->hw;
	unsigned port = sky2->port;
	int i;

	data[0] = (u64) gma_read32(hw, port, GM_TXO_OK_HI) << 32
S
Stephen Hemminger 已提交
2553
	    | (u64) gma_read32(hw, port, GM_TXO_OK_LO);
2554
	data[1] = (u64) gma_read32(hw, port, GM_RXO_OK_HI) << 32
S
Stephen Hemminger 已提交
2555
	    | (u64) gma_read32(hw, port, GM_RXO_OK_LO);
2556

S
Stephen Hemminger 已提交
2557
	for (i = 2; i < count; i++)
2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572
		data[i] = (u64) gma_read32(hw, port, sky2_stats[i].offset);
}

static void sky2_set_msglevel(struct net_device *netdev, u32 value)
{
	struct sky2_port *sky2 = netdev_priv(netdev);
	sky2->msg_enable = value;
}

static int sky2_get_stats_count(struct net_device *dev)
{
	return ARRAY_SIZE(sky2_stats);
}

static void sky2_get_ethtool_stats(struct net_device *dev,
S
Stephen Hemminger 已提交
2573
				   struct ethtool_stats *stats, u64 * data)
2574 2575 2576
{
	struct sky2_port *sky2 = netdev_priv(dev);

S
Stephen Hemminger 已提交
2577
	sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats));
2578 2579
}

S
Stephen Hemminger 已提交
2580
static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data)
2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599
{
	int i;

	switch (stringset) {
	case ETH_SS_STATS:
		for (i = 0; i < ARRAY_SIZE(sky2_stats); i++)
			memcpy(data + i * ETH_GSTRING_LEN,
			       sky2_stats[i].name, ETH_GSTRING_LEN);
		break;
	}
}

/* Use hardware MIB variables for critical path statistics and
 * transmit feedback not reported at interrupt.
 * Other errors are accounted for in interrupt handler.
 */
static struct net_device_stats *sky2_get_stats(struct net_device *dev)
{
	struct sky2_port *sky2 = netdev_priv(dev);
S
Stephen Hemminger 已提交
2600
	u64 data[13];
2601

S
Stephen Hemminger 已提交
2602
	sky2_phy_stats(sky2, data, ARRAY_SIZE(data));
2603 2604 2605 2606 2607

	sky2->net_stats.tx_bytes = data[0];
	sky2->net_stats.rx_bytes = data[1];
	sky2->net_stats.tx_packets = data[2] + data[4] + data[6];
	sky2->net_stats.rx_packets = data[3] + data[5] + data[7];
S
Stephen Hemminger 已提交
2608
	sky2->net_stats.multicast = data[3] + data[5];
2609 2610 2611 2612 2613 2614 2615 2616 2617
	sky2->net_stats.collisions = data[10];
	sky2->net_stats.tx_aborted_errors = data[12];

	return &sky2->net_stats;
}

static int sky2_set_mac_address(struct net_device *dev, void *p)
{
	struct sky2_port *sky2 = netdev_priv(dev);
2618 2619 2620
	struct sky2_hw *hw = sky2->hw;
	unsigned port = sky2->port;
	const struct sockaddr *addr = p;
2621 2622 2623 2624 2625

	if (!is_valid_ether_addr(addr->sa_data))
		return -EADDRNOTAVAIL;

	memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
2626
	memcpy_toio(hw->regs + B2_MAC_1 + port * 8,
2627
		    dev->dev_addr, ETH_ALEN);
2628
	memcpy_toio(hw->regs + B2_MAC_2 + port * 8,
2629
		    dev->dev_addr, ETH_ALEN);
2630

2631 2632 2633 2634 2635
	/* virtual address for data */
	gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr);

	/* physical address: used for pause frames */
	gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr);
2636 2637

	return 0;
2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653
}

static void sky2_set_multicast(struct net_device *dev)
{
	struct sky2_port *sky2 = netdev_priv(dev);
	struct sky2_hw *hw = sky2->hw;
	unsigned port = sky2->port;
	struct dev_mc_list *list = dev->mc_list;
	u16 reg;
	u8 filter[8];

	memset(filter, 0, sizeof(filter));

	reg = gma_read16(hw, port, GM_RX_CTRL);
	reg |= GM_RXCR_UCF_ENA;

S
shemminger@osdl.org 已提交
2654
	if (dev->flags & IFF_PROMISC)	/* promiscuous */
2655
		reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
S
Stephen Hemminger 已提交
2656
	else if ((dev->flags & IFF_ALLMULTI) || dev->mc_count > 16)	/* all multicast */
2657
		memset(filter, 0xff, sizeof(filter));
S
Stephen Hemminger 已提交
2658
	else if (dev->mc_count == 0)	/* no multicast */
2659 2660 2661 2662 2663 2664 2665
		reg &= ~GM_RXCR_MCF_ENA;
	else {
		int i;
		reg |= GM_RXCR_MCF_ENA;

		for (i = 0; list && i < dev->mc_count; i++, list = list->next) {
			u32 bit = ether_crc(ETH_ALEN, list->dmi_addr) & 0x3f;
S
Stephen Hemminger 已提交
2666
			filter[bit / 8] |= 1 << (bit % 8);
2667 2668 2669 2670
		}
	}

	gma_write16(hw, port, GM_MC_ADDR_H1,
S
Stephen Hemminger 已提交
2671
		    (u16) filter[0] | ((u16) filter[1] << 8));
2672
	gma_write16(hw, port, GM_MC_ADDR_H2,
S
Stephen Hemminger 已提交
2673
		    (u16) filter[2] | ((u16) filter[3] << 8));
2674
	gma_write16(hw, port, GM_MC_ADDR_H3,
S
Stephen Hemminger 已提交
2675
		    (u16) filter[4] | ((u16) filter[5] << 8));
2676
	gma_write16(hw, port, GM_MC_ADDR_H4,
S
Stephen Hemminger 已提交
2677
		    (u16) filter[6] | ((u16) filter[7] << 8));
2678 2679 2680 2681 2682 2683 2684

	gma_write16(hw, port, GM_RX_CTRL, reg);
}

/* Can have one global because blinking is controlled by
 * ethtool and that is always under RTNL mutex
 */
2685
static void sky2_led(struct sky2_hw *hw, unsigned port, int on)
2686
{
S
Stephen Hemminger 已提交
2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704
	u16 pg;

	switch (hw->chip_id) {
	case CHIP_ID_YUKON_XL:
		pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
		gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
			     on ? (PHY_M_LEDC_LOS_CTRL(1) |
				   PHY_M_LEDC_INIT_CTRL(7) |
				   PHY_M_LEDC_STA1_CTRL(7) |
				   PHY_M_LEDC_STA0_CTRL(7))
			     : 0);

		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
		break;

	default:
		gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0);
2705
		gm_phy_write(hw, port, PHY_MARV_LED_OVER,
S
Stephen Hemminger 已提交
2706 2707 2708
			     on ? PHY_M_LED_MO_DUP(MO_LED_ON) |
			     PHY_M_LED_MO_10(MO_LED_ON) |
			     PHY_M_LED_MO_100(MO_LED_ON) |
2709
			     PHY_M_LED_MO_1000(MO_LED_ON) |
S
Stephen Hemminger 已提交
2710 2711 2712 2713
			     PHY_M_LED_MO_RX(MO_LED_ON)
			     : PHY_M_LED_MO_DUP(MO_LED_OFF) |
			     PHY_M_LED_MO_10(MO_LED_OFF) |
			     PHY_M_LED_MO_100(MO_LED_OFF) |
2714 2715 2716
			     PHY_M_LED_MO_1000(MO_LED_OFF) |
			     PHY_M_LED_MO_RX(MO_LED_OFF));

S
Stephen Hemminger 已提交
2717
	}
2718 2719 2720 2721 2722 2723 2724 2725
}

/* blink LED's for finding board */
static int sky2_phys_id(struct net_device *dev, u32 data)
{
	struct sky2_port *sky2 = netdev_priv(dev);
	struct sky2_hw *hw = sky2->hw;
	unsigned port = sky2->port;
S
Stephen Hemminger 已提交
2726
	u16 ledctrl, ledover = 0;
2727
	long ms;
2728
	int interrupted;
2729 2730
	int onoff = 1;

S
Stephen Hemminger 已提交
2731
	if (!data || data > (u32) (MAX_SCHEDULE_TIMEOUT / HZ))
2732 2733 2734 2735 2736
		ms = jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT);
	else
		ms = data * 1000;

	/* save initial values */
2737
	spin_lock_bh(&sky2->phy_lock);
S
Stephen Hemminger 已提交
2738 2739 2740 2741 2742 2743 2744 2745 2746
	if (hw->chip_id == CHIP_ID_YUKON_XL) {
		u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
		ledctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
	} else {
		ledctrl = gm_phy_read(hw, port, PHY_MARV_LED_CTRL);
		ledover = gm_phy_read(hw, port, PHY_MARV_LED_OVER);
	}
2747

2748 2749
	interrupted = 0;
	while (!interrupted && ms > 0) {
2750 2751 2752
		sky2_led(hw, port, onoff);
		onoff = !onoff;

2753
		spin_unlock_bh(&sky2->phy_lock);
2754
		interrupted = msleep_interruptible(250);
2755
		spin_lock_bh(&sky2->phy_lock);
2756

2757 2758 2759 2760
		ms -= 250;
	}

	/* resume regularly scheduled programming */
S
Stephen Hemminger 已提交
2761 2762 2763 2764 2765 2766 2767 2768 2769
	if (hw->chip_id == CHIP_ID_YUKON_XL) {
		u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
		gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ledctrl);
		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
	} else {
		gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
		gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
	}
2770
	spin_unlock_bh(&sky2->phy_lock);
2771 2772 2773 2774 2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791 2792 2793 2794

	return 0;
}

static void sky2_get_pauseparam(struct net_device *dev,
				struct ethtool_pauseparam *ecmd)
{
	struct sky2_port *sky2 = netdev_priv(dev);

	ecmd->tx_pause = sky2->tx_pause;
	ecmd->rx_pause = sky2->rx_pause;
	ecmd->autoneg = sky2->autoneg;
}

static int sky2_set_pauseparam(struct net_device *dev,
			       struct ethtool_pauseparam *ecmd)
{
	struct sky2_port *sky2 = netdev_priv(dev);
	int err = 0;

	sky2->autoneg = ecmd->autoneg;
	sky2->tx_pause = ecmd->tx_pause != 0;
	sky2->rx_pause = ecmd->rx_pause != 0;

2795
	sky2_phy_reinit(sky2);
2796 2797 2798 2799

	return err;
}

2800 2801 2802 2803 2804 2805 2806 2807 2808 2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 2838 2839
static int sky2_get_coalesce(struct net_device *dev,
			     struct ethtool_coalesce *ecmd)
{
	struct sky2_port *sky2 = netdev_priv(dev);
	struct sky2_hw *hw = sky2->hw;

	if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP)
		ecmd->tx_coalesce_usecs = 0;
	else {
		u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI);
		ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
	}
	ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH);

	if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP)
		ecmd->rx_coalesce_usecs = 0;
	else {
		u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI);
		ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
	}
	ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM);

	if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP)
		ecmd->rx_coalesce_usecs_irq = 0;
	else {
		u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI);
		ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);
	}

	ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM);

	return 0;
}

/* Note: this affect both ports */
static int sky2_set_coalesce(struct net_device *dev,
			     struct ethtool_coalesce *ecmd)
{
	struct sky2_port *sky2 = netdev_priv(dev);
	struct sky2_hw *hw = sky2->hw;
2840
	const u32 tmax = sky2_clk2us(hw, 0x0ffffff);
2841

2842 2843 2844
	if (ecmd->tx_coalesce_usecs > tmax ||
	    ecmd->rx_coalesce_usecs > tmax ||
	    ecmd->rx_coalesce_usecs_irq > tmax)
2845 2846
		return -EINVAL;

2847
	if (ecmd->tx_max_coalesced_frames >= TX_RING_SIZE-1)
2848
		return -EINVAL;
2849
	if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
2850
		return -EINVAL;
2851
	if (ecmd->rx_max_coalesced_frames_irq >RX_MAX_PENDING)
2852 2853 2854 2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874
		return -EINVAL;

	if (ecmd->tx_coalesce_usecs == 0)
		sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
	else {
		sky2_write32(hw, STAT_TX_TIMER_INI,
			     sky2_us2clk(hw, ecmd->tx_coalesce_usecs));
		sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
	}
	sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames);

	if (ecmd->rx_coalesce_usecs == 0)
		sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
	else {
		sky2_write32(hw, STAT_LEV_TIMER_INI,
			     sky2_us2clk(hw, ecmd->rx_coalesce_usecs));
		sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
	}
	sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);

	if (ecmd->rx_coalesce_usecs_irq == 0)
		sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
	else {
2875
		sky2_write32(hw, STAT_ISR_TIMER_INI,
2876 2877 2878 2879 2880 2881 2882
			     sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq));
		sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
	}
	sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
	return 0;
}

S
Stephen Hemminger 已提交
2883 2884 2885 2886 2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900 2901 2902 2903 2904 2905 2906 2907 2908 2909 2910 2911 2912 2913 2914 2915 2916
static void sky2_get_ringparam(struct net_device *dev,
			       struct ethtool_ringparam *ering)
{
	struct sky2_port *sky2 = netdev_priv(dev);

	ering->rx_max_pending = RX_MAX_PENDING;
	ering->rx_mini_max_pending = 0;
	ering->rx_jumbo_max_pending = 0;
	ering->tx_max_pending = TX_RING_SIZE - 1;

	ering->rx_pending = sky2->rx_pending;
	ering->rx_mini_pending = 0;
	ering->rx_jumbo_pending = 0;
	ering->tx_pending = sky2->tx_pending;
}

static int sky2_set_ringparam(struct net_device *dev,
			      struct ethtool_ringparam *ering)
{
	struct sky2_port *sky2 = netdev_priv(dev);
	int err = 0;

	if (ering->rx_pending > RX_MAX_PENDING ||
	    ering->rx_pending < 8 ||
	    ering->tx_pending < MAX_SKB_TX_LE ||
	    ering->tx_pending > TX_RING_SIZE - 1)
		return -EINVAL;

	if (netif_running(dev))
		sky2_down(dev);

	sky2->rx_pending = ering->rx_pending;
	sky2->tx_pending = ering->tx_pending;

2917
	if (netif_running(dev)) {
S
Stephen Hemminger 已提交
2918
		err = sky2_up(dev);
2919 2920
		if (err)
			dev_close(dev);
2921 2922
		else
			sky2_set_multicast(dev);
2923
	}
S
Stephen Hemminger 已提交
2924 2925 2926 2927 2928 2929

	return err;
}

static int sky2_get_regs_len(struct net_device *dev)
{
2930
	return 0x4000;
S
Stephen Hemminger 已提交
2931 2932 2933 2934
}

/*
 * Returns copy of control register region
2935
 * Note: access to the RAM address register set will cause timeouts.
S
Stephen Hemminger 已提交
2936 2937 2938 2939 2940 2941 2942
 */
static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
			  void *p)
{
	const struct sky2_port *sky2 = netdev_priv(dev);
	const void __iomem *io = sky2->hw->regs;

2943
	BUG_ON(regs->len < B3_RI_WTO_R1);
S
Stephen Hemminger 已提交
2944
	regs->version = 1;
2945
	memset(p, 0, regs->len);
S
Stephen Hemminger 已提交
2946

2947 2948 2949 2950 2951
	memcpy_fromio(p, io, B3_RAM_ADDR);

	memcpy_fromio(p + B3_RI_WTO_R1,
		      io + B3_RI_WTO_R1,
		      regs->len - B3_RI_WTO_R1);
S
Stephen Hemminger 已提交
2952
}
2953 2954

static struct ethtool_ops sky2_ethtool_ops = {
S
Stephen Hemminger 已提交
2955 2956 2957 2958 2959
	.get_settings = sky2_get_settings,
	.set_settings = sky2_set_settings,
	.get_drvinfo = sky2_get_drvinfo,
	.get_msglevel = sky2_get_msglevel,
	.set_msglevel = sky2_set_msglevel,
2960
	.nway_reset   = sky2_nway_reset,
S
Stephen Hemminger 已提交
2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972
	.get_regs_len = sky2_get_regs_len,
	.get_regs = sky2_get_regs,
	.get_link = ethtool_op_get_link,
	.get_sg = ethtool_op_get_sg,
	.set_sg = ethtool_op_set_sg,
	.get_tx_csum = ethtool_op_get_tx_csum,
	.set_tx_csum = ethtool_op_set_tx_csum,
	.get_tso = ethtool_op_get_tso,
	.set_tso = ethtool_op_set_tso,
	.get_rx_csum = sky2_get_rx_csum,
	.set_rx_csum = sky2_set_rx_csum,
	.get_strings = sky2_get_strings,
2973 2974
	.get_coalesce = sky2_get_coalesce,
	.set_coalesce = sky2_set_coalesce,
S
Stephen Hemminger 已提交
2975 2976
	.get_ringparam = sky2_get_ringparam,
	.set_ringparam = sky2_set_ringparam,
2977 2978
	.get_pauseparam = sky2_get_pauseparam,
	.set_pauseparam = sky2_set_pauseparam,
S
Stephen Hemminger 已提交
2979
	.phys_id = sky2_phys_id,
2980 2981
	.get_stats_count = sky2_get_stats_count,
	.get_ethtool_stats = sky2_get_ethtool_stats,
2982
	.get_perm_addr	= ethtool_op_get_perm_addr,
2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998
};

/* Initialize network device */
static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
						     unsigned port, int highmem)
{
	struct sky2_port *sky2;
	struct net_device *dev = alloc_etherdev(sizeof(*sky2));

	if (!dev) {
		printk(KERN_ERR "sky2 etherdev alloc failed");
		return NULL;
	}

	SET_MODULE_OWNER(dev);
	SET_NETDEV_DEV(dev, &hw->pdev->dev);
2999
	dev->irq = hw->pdev->irq;
3000 3001
	dev->open = sky2_up;
	dev->stop = sky2_down;
3002
	dev->do_ioctl = sky2_ioctl;
3003 3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024 3025
	dev->hard_start_xmit = sky2_xmit_frame;
	dev->get_stats = sky2_get_stats;
	dev->set_multicast_list = sky2_set_multicast;
	dev->set_mac_address = sky2_set_mac_address;
	dev->change_mtu = sky2_change_mtu;
	SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops);
	dev->tx_timeout = sky2_tx_timeout;
	dev->watchdog_timeo = TX_WATCHDOG;
	if (port == 0)
		dev->poll = sky2_poll;
	dev->weight = NAPI_WEIGHT;
#ifdef CONFIG_NET_POLL_CONTROLLER
	dev->poll_controller = sky2_netpoll;
#endif

	sky2 = netdev_priv(dev);
	sky2->netdev = dev;
	sky2->hw = hw;
	sky2->msg_enable = netif_msg_init(debug, default_msg);

	spin_lock_init(&sky2->tx_lock);
	/* Auto speed and flow control */
	sky2->autoneg = AUTONEG_ENABLE;
3026
	sky2->tx_pause = 1;
3027 3028 3029 3030
	sky2->rx_pause = 1;
	sky2->duplex = -1;
	sky2->speed = -1;
	sky2->advertising = sky2_supported_modes(hw);
3031

3032
	/* Receive checksum disabled for Yukon XL
3033 3034 3035 3036 3037
	 * because of observed problems with incorrect
	 * values when multiple packets are received in one interrupt
	 */
	sky2->rx_csum = (hw->chip_id != CHIP_ID_YUKON_XL);

3038
	spin_lock_init(&sky2->phy_lock);
S
Stephen Hemminger 已提交
3039
	sky2->tx_pending = TX_DEF_PENDING;
3040
	sky2->rx_pending = RX_DEF_PENDING;
3041
	sky2->rx_bufsize = sky2_buf_size(ETH_DATA_LEN);
3042 3043 3044 3045 3046

	hw->dev[port] = dev;

	sky2->port = port;

3047 3048 3049
	dev->features |= NETIF_F_LLTX;
	if (hw->chip_id != CHIP_ID_YUKON_EC_U)
		dev->features |= NETIF_F_TSO;
3050 3051
	if (highmem)
		dev->features |= NETIF_F_HIGHDMA;
S
Stephen Hemminger 已提交
3052
	dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
3053

3054 3055 3056 3057 3058 3059
#ifdef SKY2_VLAN_TAG_USED
	dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
	dev->vlan_rx_register = sky2_vlan_rx_register;
	dev->vlan_rx_kill_vid = sky2_vlan_rx_kill_vid;
#endif

3060
	/* read the mac address */
S
Stephen Hemminger 已提交
3061
	memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
3062
	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
3063 3064 3065 3066 3067 3068 3069 3070

	/* device is off until link detection */
	netif_carrier_off(dev);
	netif_stop_queue(dev);

	return dev;
}

3071
static void __devinit sky2_show_addr(struct net_device *dev)
3072 3073 3074 3075 3076 3077 3078 3079 3080 3081
{
	const struct sky2_port *sky2 = netdev_priv(dev);

	if (netif_msg_probe(sky2))
		printk(KERN_INFO PFX "%s: addr %02x:%02x:%02x:%02x:%02x:%02x\n",
		       dev->name,
		       dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
		       dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
}

3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099 3100 3101 3102 3103 3104 3105 3106 3107 3108 3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128 3129 3130 3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141
/* Handle software interrupt used during MSI test */
static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id,
					    struct pt_regs *regs)
{
	struct sky2_hw *hw = dev_id;
	u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);

	if (status == 0)
		return IRQ_NONE;

	if (status & Y2_IS_IRQ_SW) {
		hw->msi_detected = 1;
		wake_up(&hw->msi_wait);
		sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
	}
	sky2_write32(hw, B0_Y2_SP_ICR, 2);

	return IRQ_HANDLED;
}

/* Test interrupt path by forcing a a software IRQ */
static int __devinit sky2_test_msi(struct sky2_hw *hw)
{
	struct pci_dev *pdev = hw->pdev;
	int err;

	sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);

	err = request_irq(pdev->irq, sky2_test_intr, SA_SHIRQ, DRV_NAME, hw);
	if (err) {
		printk(KERN_ERR PFX "%s: cannot assign irq %d\n",
		       pci_name(pdev), pdev->irq);
		return err;
	}

	init_waitqueue_head (&hw->msi_wait);

	sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
	wmb();

	wait_event_timeout(hw->msi_wait, hw->msi_detected, HZ/10);

	if (!hw->msi_detected) {
		/* MSI test failed, go back to INTx mode */
		printk(KERN_WARNING PFX "%s: No interrupt was generated using MSI, "
		       "switching to INTx mode. Please report this failure to "
		       "the PCI maintainer and include system chipset information.\n",
		       pci_name(pdev));

		err = -EOPNOTSUPP;
		sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
	}

	sky2_write32(hw, B0_IMSK, 0);

	free_irq(pdev->irq, hw);

	return err;
}

3142 3143 3144
static int __devinit sky2_probe(struct pci_dev *pdev,
				const struct pci_device_id *ent)
{
S
Stephen Hemminger 已提交
3145
	struct net_device *dev, *dev1 = NULL;
3146
	struct sky2_hw *hw;
3147
	int err, pm_cap, using_dac = 0;
3148

S
Stephen Hemminger 已提交
3149 3150
	err = pci_enable_device(pdev);
	if (err) {
3151 3152 3153 3154 3155
		printk(KERN_ERR PFX "%s cannot enable PCI device\n",
		       pci_name(pdev));
		goto err_out;
	}

S
Stephen Hemminger 已提交
3156 3157
	err = pci_request_regions(pdev, DRV_NAME);
	if (err) {
3158 3159
		printk(KERN_ERR PFX "%s cannot obtain PCI resources\n",
		       pci_name(pdev));
S
Stephen Hemminger 已提交
3160
		goto err_out;
3161 3162 3163 3164
	}

	pci_set_master(pdev);

3165 3166 3167 3168 3169 3170 3171 3172 3173
	/* Find power-management capability. */
	pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
	if (pm_cap == 0) {
		printk(KERN_ERR PFX "Cannot find PowerManagement capability, "
		       "aborting.\n");
		err = -EIO;
		goto err_out_free_regions;
	}

3174 3175 3176 3177 3178 3179 3180 3181 3182
	if (sizeof(dma_addr_t) > sizeof(u32) &&
	    !(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
		using_dac = 1;
		err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
		if (err < 0) {
			printk(KERN_ERR PFX "%s unable to obtain 64 bit DMA "
			       "for consistent allocations\n", pci_name(pdev));
			goto err_out_free_regions;
		}
3183

3184
	} else {
3185 3186 3187 3188 3189 3190 3191
		err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
		if (err) {
			printk(KERN_ERR PFX "%s no usable DMA configuration\n",
			       pci_name(pdev));
			goto err_out_free_regions;
		}
	}
3192

3193
	err = -ENOMEM;
S
Stephen Hemminger 已提交
3194
	hw = kzalloc(sizeof(*hw), GFP_KERNEL);
3195 3196 3197 3198 3199 3200 3201 3202 3203 3204 3205 3206 3207 3208
	if (!hw) {
		printk(KERN_ERR PFX "%s: cannot allocate hardware struct\n",
		       pci_name(pdev));
		goto err_out_free_regions;
	}

	hw->pdev = pdev;

	hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
	if (!hw->regs) {
		printk(KERN_ERR PFX "%s: cannot map device registers\n",
		       pci_name(pdev));
		goto err_out_free_hw;
	}
3209
	hw->pm_cap = pm_cap;
3210

3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221
#ifdef __BIG_ENDIAN
	/* byte swap descriptors in hardware */
	{
		u32 reg;

		reg = sky2_pci_read32(hw, PCI_DEV_REG2);
		reg |= PCI_REV_DESC;
		sky2_pci_write32(hw, PCI_DEV_REG2, reg);
	}
#endif

3222 3223 3224 3225 3226 3227
	/* ring for status responses */
	hw->st_le = pci_alloc_consistent(hw->pdev, STATUS_LE_BYTES,
					 &hw->st_dma);
	if (!hw->st_le)
		goto err_out_iounmap;

3228 3229
	err = sky2_reset(hw);
	if (err)
S
Stephen Hemminger 已提交
3230
		goto err_out_iounmap;
3231

3232 3233
	printk(KERN_INFO PFX "v%s addr 0x%lx irq %d Yukon-%s (0x%x) rev %d\n",
	       DRV_VERSION, pci_resource_start(pdev, 0), pdev->irq,
3234
	       yukon2_name[hw->chip_id - CHIP_ID_YUKON_XL],
S
Stephen Hemminger 已提交
3235
	       hw->chip_id, hw->chip_rev);
3236

S
Stephen Hemminger 已提交
3237 3238
	dev = sky2_init_netdev(hw, 0, using_dac);
	if (!dev)
3239 3240
		goto err_out_free_pci;

S
Stephen Hemminger 已提交
3241 3242
	err = register_netdev(dev);
	if (err) {
3243 3244 3245 3246 3247 3248 3249 3250 3251 3252 3253 3254
		printk(KERN_ERR PFX "%s: cannot register net device\n",
		       pci_name(pdev));
		goto err_out_free_netdev;
	}

	sky2_show_addr(dev);

	if (hw->ports > 1 && (dev1 = sky2_init_netdev(hw, 1, using_dac))) {
		if (register_netdev(dev1) == 0)
			sky2_show_addr(dev1);
		else {
			/* Failure to register second port need not be fatal */
S
Stephen Hemminger 已提交
3255 3256
			printk(KERN_WARNING PFX
			       "register of second port failed\n");
3257 3258 3259 3260 3261
			hw->dev[1] = NULL;
			free_netdev(dev1);
		}
	}

3262 3263 3264 3265 3266 3267 3268 3269 3270
	if (!disable_msi && pci_enable_msi(pdev) == 0) {
		err = sky2_test_msi(hw);
		if (err == -EOPNOTSUPP)
 			pci_disable_msi(pdev);
		else if (err)
			goto err_out_unregister;
 	}

	err = request_irq(pdev->irq,  sky2_intr, SA_SHIRQ, DRV_NAME, hw);
S
Stephen Hemminger 已提交
3271 3272 3273 3274 3275 3276
	if (err) {
		printk(KERN_ERR PFX "%s: cannot assign irq %d\n",
		       pci_name(pdev), pdev->irq);
		goto err_out_unregister;
	}

3277
	sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
S
Stephen Hemminger 已提交
3278 3279 3280

	pci_set_drvdata(pdev, hw);

3281 3282
	return 0;

S
Stephen Hemminger 已提交
3283
err_out_unregister:
3284
	pci_disable_msi(pdev);
S
Stephen Hemminger 已提交
3285 3286 3287 3288 3289
	if (dev1) {
		unregister_netdev(dev1);
		free_netdev(dev1);
	}
	unregister_netdev(dev);
3290 3291 3292
err_out_free_netdev:
	free_netdev(dev);
err_out_free_pci:
S
Stephen Hemminger 已提交
3293
	sky2_write8(hw, B0_CTST, CS_RST_SET);
3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307
	pci_free_consistent(hw->pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
err_out_iounmap:
	iounmap(hw->regs);
err_out_free_hw:
	kfree(hw);
err_out_free_regions:
	pci_release_regions(pdev);
	pci_disable_device(pdev);
err_out:
	return err;
}

static void __devexit sky2_remove(struct pci_dev *pdev)
{
S
Stephen Hemminger 已提交
3308
	struct sky2_hw *hw = pci_get_drvdata(pdev);
3309 3310
	struct net_device *dev0, *dev1;

S
Stephen Hemminger 已提交
3311
	if (!hw)
3312 3313 3314
		return;

	dev0 = hw->dev[0];
S
Stephen Hemminger 已提交
3315 3316 3317
	dev1 = hw->dev[1];
	if (dev1)
		unregister_netdev(dev1);
3318 3319
	unregister_netdev(dev0);

S
Stephen Hemminger 已提交
3320
	sky2_write32(hw, B0_IMSK, 0);
3321
	sky2_set_power_state(hw, PCI_D3hot);
3322
	sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
S
Stephen Hemminger 已提交
3323
	sky2_write8(hw, B0_CTST, CS_RST_SET);
3324
	sky2_read8(hw, B0_CTST);
3325 3326

	free_irq(pdev->irq, hw);
3327
	pci_disable_msi(pdev);
S
Stephen Hemminger 已提交
3328
	pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
3329 3330
	pci_release_regions(pdev);
	pci_disable_device(pdev);
S
Stephen Hemminger 已提交
3331

3332 3333 3334 3335 3336
	if (dev1)
		free_netdev(dev1);
	free_netdev(dev0);
	iounmap(hw->regs);
	kfree(hw);
3337

3338 3339 3340 3341 3342 3343
	pci_set_drvdata(pdev, NULL);
}

#ifdef CONFIG_PM
static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
{
S
Stephen Hemminger 已提交
3344
	struct sky2_hw *hw = pci_get_drvdata(pdev);
3345
	int i;
3346 3347 3348 3349 3350

	for (i = 0; i < 2; i++) {
		struct net_device *dev = hw->dev[i];

		if (dev) {
3351 3352 3353 3354
			if (!netif_running(dev))
				continue;

			sky2_down(dev);
3355 3356 3357 3358
			netif_device_detach(dev);
		}
	}

3359
	return sky2_set_power_state(hw, pci_choose_state(pdev, state));
3360 3361 3362 3363
}

static int sky2_resume(struct pci_dev *pdev)
{
S
Stephen Hemminger 已提交
3364
	struct sky2_hw *hw = pci_get_drvdata(pdev);
3365
	int i, err;
3366 3367 3368

	pci_restore_state(pdev);
	pci_enable_wake(pdev, PCI_D0, 0);
3369 3370 3371
	err = sky2_set_power_state(hw, PCI_D0);
	if (err)
		goto out;
3372

3373 3374 3375
	err = sky2_reset(hw);
	if (err)
		goto out;
3376 3377 3378

	for (i = 0; i < 2; i++) {
		struct net_device *dev = hw->dev[i];
3379 3380 3381 3382 3383 3384 3385 3386
		if (dev && netif_running(dev)) {
			netif_device_attach(dev);
			err = sky2_up(dev);
			if (err) {
				printk(KERN_ERR PFX "%s: could not up: %d\n",
				       dev->name, err);
				dev_close(dev);
				break;
3387
			}
3388 3389
		}
	}
3390 3391
out:
	return err;
3392 3393 3394 3395
}
#endif

static struct pci_driver sky2_driver = {
S
Stephen Hemminger 已提交
3396 3397 3398 3399
	.name = DRV_NAME,
	.id_table = sky2_id_table,
	.probe = sky2_probe,
	.remove = __devexit_p(sky2_remove),
3400
#ifdef CONFIG_PM
S
Stephen Hemminger 已提交
3401 3402
	.suspend = sky2_suspend,
	.resume = sky2_resume,
3403 3404 3405 3406 3407
#endif
};

static int __init sky2_init_module(void)
{
3408
	return pci_register_driver(&sky2_driver);
3409 3410 3411 3412 3413 3414 3415 3416 3417 3418 3419 3420 3421
}

static void __exit sky2_cleanup_module(void)
{
	pci_unregister_driver(&sky2_driver);
}

module_init(sky2_init_module);
module_exit(sky2_cleanup_module);

MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver");
MODULE_AUTHOR("Stephen Hemminger <shemminger@osdl.org>");
MODULE_LICENSE("GPL");
3422
MODULE_VERSION(DRV_VERSION);