RISC-V is a free and open ISA enabling a new era of processor innovation through open standard collaboration. This project ported RT-Thread on QEMU RISCV64 VIRT machine.
## 2. 编译说明
## 1. Compiling
Download the cross compiler tool chain, it is recommended to use the sifive tool chain.
首先可以下载交叉编译工具链,建议采用sifive的工具链进行编译。
```
https://www.sifive.com/software
```
选择对应的平台即可。
这里推荐在Ubuntu上进行开发工作。
Select the fitting platform, we recommend Ubuntu.
解压工具链到指定的目录。
Unzip the tool chain to the specified directory.
```
export RTT_EXEC_PATH=~/gcc/bin
```
进入到`rt-thread/bsp/qemu-riscv-virt64`目录进行输入
Enter `rt-thread/bsp/qemu-riscv-virt64` directory and input
```
scons
```
可以看到正常生成`rtthread.elf`与`rtthread.bin`文件。
## 3. 执行
`rtthread.elf` and `rtthread .bin` files are generated.
本工程提供了riscv64的两种可配置运行模式,默认运行在M-Mode下。
## 2. Execution
*M-Mode*
The project provides two configurable operating modes for riscv64, defaults to run under M-Mode.
首先安装`qemu-system-riscv64`。
***M-Mode***
Firstly, install the `qemu-system-riscv64`.
```
sudo apt install qemu-system-misc
```
直接输入
Then enter
```
./qemu-nographic.sh
```
可以看到程序运行
You'll see Project start running
```
heap: [0x80035804 - 0x86435804]
...
...
@@ -54,39 +59,45 @@ Hello RISC-V!
msh />
```
*S-Mode*
***S-Mode***
如果运行在S-Mode下，那么需要通过menuconfig选择配置
When running in S-Mode, configuration is via menuconfig
