未验证 提交 84e18bb2 编写于 作者: S stevetong459 提交者: GitHub

fix the startup files of apm32f1 (#5725)

* fix the startup files of apm32f1

* delete ARM folder for apm32f1
上级 ad90cf59
......@@ -353,20 +353,20 @@
<state>$PROJ_DIR$\..\..\..\components\finsh</state>
<state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
<state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
<state>$PROJ_DIR$\..\..\..\components\libc\posix\io\stdio</state>
<state>$PROJ_DIR$\..\libraries\Drivers</state>
<state>$PROJ_DIR$\..\libraries\Drivers\config</state>
<state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
<state>$PROJ_DIR$\..\..\..\examples\utest\testcases\kernel</state>
<state>$PROJ_DIR$\.</state>
<state>$PROJ_DIR$\..\libraries\APM32F10x_Library\Device\Geehy\APM32F10x\Include</state>
<state>$PROJ_DIR$\applications</state>
<state>$PROJ_DIR$\..\libraries\APM32F10x_Library\APM32F10x_StdPeriphDriver\inc</state>
<state>$PROJ_DIR$\board</state>
<state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
<state>$PROJ_DIR$\..\..\..\components\libc\compilers\common</state>
<state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
<state>$PROJ_DIR$\..\libraries\APM32F10x_Library\CMSIS\Include</state>
<state>$PROJ_DIR$\..\..\..\include</state>
<state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\nogcc</state>
<state>$PROJ_DIR$\board</state>
</option>
<option>
<name>CCStdIncCheck</name>
......@@ -1430,20 +1430,20 @@
<state>$PROJ_DIR$\..\..\..\components\finsh</state>
<state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
<state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
<state>$PROJ_DIR$\..\..\..\components\libc\posix\io\stdio</state>
<state>$PROJ_DIR$\..\libraries\Drivers</state>
<state>$PROJ_DIR$\..\libraries\Drivers\config</state>
<state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
<state>$PROJ_DIR$\..\..\..\examples\utest\testcases\kernel</state>
<state>$PROJ_DIR$\.</state>
<state>$PROJ_DIR$\..\libraries\APM32F10x_Library\Device\Geehy\APM32F10x\Include</state>
<state>$PROJ_DIR$\applications</state>
<state>$PROJ_DIR$\..\libraries\APM32F10x_Library\APM32F10x_StdPeriphDriver\inc</state>
<state>$PROJ_DIR$\board</state>
<state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
<state>$PROJ_DIR$\..\..\..\components\libc\compilers\common</state>
<state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
<state>$PROJ_DIR$\..\libraries\APM32F10x_Library\CMSIS\Include</state>
<state>$PROJ_DIR$\..\..\..\include</state>
<state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\nogcc</state>
<state>$PROJ_DIR$\board</state>
</option>
<option>
<name>CCStdIncCheck</name>
......@@ -2169,44 +2169,44 @@
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\common\stdlib.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscalls.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_close.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_write.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_mem.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_lseek.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_remove.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\environ.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\environ.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_open.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_close.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_mem.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_read.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_remove.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_lseek.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_read.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_open.c</name>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscalls.c</name>
</file>
</group>
<group>
<name>CPU</name>
<file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\cpuport.c</name>
</file>
......@@ -2217,31 +2217,31 @@
<group>
<name>DeviceDrivers</name>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\misc\pin.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\workqueue.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\serial\serial.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\dataqueue.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\waitqueue.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\ringbuffer.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\workqueue.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\ringblk_buf.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\completion.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\pipe.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\dataqueue.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\waitqueue.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\pipe.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\ringblk_buf.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\misc\pin.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\src\ringbuffer.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\serial\serial.c</name>
</file>
</group>
<group>
......@@ -2277,43 +2277,43 @@
<group>
<name>Kernel</name>
<file>
<name>$PROJ_DIR$\..\..\..\src\scheduler.c</name>
<name>$PROJ_DIR$\..\..\..\src\kservice.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\mem.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\components.c</name>
<name>$PROJ_DIR$\..\..\..\src\clock.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\mempool.c</name>
<name>$PROJ_DIR$\..\..\..\src\components.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\kservice.c</name>
<name>$PROJ_DIR$\..\..\..\src\timer.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\ipc.c</name>
<name>$PROJ_DIR$\..\..\..\src\scheduler.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\clock.c</name>
<name>$PROJ_DIR$\..\..\..\src\mempool.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\object.c</name>
<name>$PROJ_DIR$\..\..\..\src\idle.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\timer.c</name>
<name>$PROJ_DIR$\..\..\..\src\object.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\irq.c</name>
<name>$PROJ_DIR$\..\..\..\src\thread.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\idle.c</name>
<name>$PROJ_DIR$\..\..\..\src\ipc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\device.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\thread.c</name>
<name>$PROJ_DIR$\..\..\..\src\irq.c</name>
</file>
</group>
<group>
......@@ -2340,7 +2340,4 @@
<group>
<name>POSIX</name>
</group>
<group>
<name>utestcases</name>
</group>
</project>
......@@ -335,7 +335,7 @@
<MiscControls />
<Define>USE_STDPERIPH_DRIVER, APM32F10X_HD, __RTTHREAD__, RT_USING_ARM_LIBC, __CLK_TCK=RT_TICK_PER_SECOND</Define>
<Undefine />
<IncludePath>applications;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\nogcc;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m3;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\Drivers;..\libraries\Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\APM32F10x_Library\Device\Geehy\APM32F10x\Include;..\libraries\APM32F10x_Library\APM32F10x_StdPeriphDriver\inc;..\libraries\APM32F10x_Library\CMSIS\Include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\ipc;..\..\..\examples\utest\testcases\kernel</IncludePath>
<IncludePath>applications;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\extension;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m3;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\Drivers;..\libraries\Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\APM32F10x_Library\Device\Geehy\APM32F10x\Include;..\libraries\APM32F10x_Library\APM32F10x_StdPeriphDriver\inc;..\libraries\APM32F10x_Library\CMSIS\Include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
</VariousControls>
</Cads>
<Aads>
......@@ -390,9 +390,9 @@
<GroupName>Compiler</GroupName>
<Files>
<File>
<FileName>libc_syms.c</FileName>
<FileName>syscalls.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\armlibc\libc_syms.c</FilePath>
<FilePath>..\..\..\components\libc\compilers\armlibc\syscalls.c</FilePath>
</File>
</Files>
<Files>
......@@ -402,13 +402,6 @@
<FilePath>..\..\..\components\libc\compilers\armlibc\syscall_mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>syscalls.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\armlibc\syscalls.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>time.c</FileName>
......@@ -428,23 +421,23 @@
<GroupName>CPU</GroupName>
<Files>
<File>
<FileName>showmem.c</FileName>
<FileName>backtrace.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
<FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>backtrace.c</FileName>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
<FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>div0.c</FileName>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
<FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
</Files>
<Files>
......@@ -466,77 +459,70 @@
<GroupName>DeviceDrivers</GroupName>
<Files>
<File>
<FileName>pin.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>serial.c</FileName>
<FileName>waitqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
<FilePath>..\..\..\components\drivers\ipc\waitqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ringbuffer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath>
<FilePath>..\..\..\components\drivers\ipc\ringbuffer.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>pipe.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\pipe.c</FilePath>
<FilePath>..\..\..\components\drivers\ipc\pipe.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ringblk_buf.c</FileName>
<FileName>completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath>
<FilePath>..\..\..\components\drivers\ipc\completion.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>workqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath>
<FilePath>..\..\..\components\drivers\ipc\workqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dataqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath>
<FilePath>..\..\..\components\drivers\ipc\dataqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>waitqueue.c</FileName>
<FileName>ringblk_buf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath>
<FilePath>..\..\..\components\drivers\ipc\ringblk_buf.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>completion.c</FileName>
<FileName>pin.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\completion.c</FilePath>
<FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers</GroupName>
<Files>
<File>
<FileName>board.c</FileName>
<FileName>serial.c</FileName>
<FileType>1</FileType>
<FilePath>board\board.c</FilePath>
<FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers</GroupName>
<Files>
<File>
<FileName>startup_apm32f10x_hd.s</FileName>
......@@ -544,6 +530,13 @@
<FilePath>..\libraries\APM32F10x_Library\Device\Geehy\APM32F10x\Source\arm\startup_apm32f10x_hd.s</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>board.c</FileName>
<FileType>1</FileType>
<FilePath>board\board.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>drv_gpio.c</FileName>
......@@ -594,65 +587,65 @@
<GroupName>Kernel</GroupName>
<Files>
<File>
<FileName>thread.c</FileName>
<FileName>components.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\thread.c</FilePath>
<FilePath>..\..\..\src\components.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>mempool.c</FileName>
<FileName>timer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\mempool.c</FilePath>
<FilePath>..\..\..\src\timer.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>timer.c</FileName>
<FileName>mempool.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\timer.c</FilePath>
<FilePath>..\..\..\src\mempool.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>object.c</FileName>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\object.c</FilePath>
<FilePath>..\..\..\src\device.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>clock.c</FileName>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\clock.c</FilePath>
<FilePath>..\..\..\src\idle.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>scheduler.c</FileName>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\scheduler.c</FilePath>
<FilePath>..\..\..\src\irq.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ipc.c</FileName>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\ipc.c</FilePath>
<FilePath>..\..\..\src\mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>mem.c</FileName>
<FileName>scheduler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\mem.c</FilePath>
<FilePath>..\..\..\src\scheduler.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>device.c</FileName>
<FileName>clock.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\device.c</FilePath>
<FilePath>..\..\..\src\clock.c</FilePath>
</File>
</Files>
<Files>
......@@ -664,23 +657,23 @@
</Files>
<Files>
<File>
<FileName>irq.c</FileName>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\irq.c</FilePath>
<FilePath>..\..\..\src\thread.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>components.c</FileName>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\components.c</FilePath>
<FilePath>..\..\..\src\ipc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>idle.c</FileName>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\idle.c</FilePath>
<FilePath>..\..\..\src\object.c</FilePath>
</File>
</Files>
</Group>
......
;/*!
; * @file startup_apm32f10x_hd.s
; *
; * @brief CMSIS Cortex-M3 based Core Device Startup File for Device startup_apm32f10x_hd
; *
; * @version V1.0.2
; *
; * @date 2022-01-05
; *
; * @attention
; *
; * Copyright (C) 2020-2022 Geehy Semiconductor
; *
; * You may not use this file except in compliance with the
; * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
; *
; * The program is only for reference, which is distributed in the hope
; * that it will be usefull and instructional for customers to develop
; * their software. Unless required by applicable law or agreed to in
; * writing, the program is distributed on an "AS IS" BASIS, WITHOUT
; * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
; * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
; * and limitations under the License.
; */
;
<h> Stack Configuration
;
<o> Stack Size(in Bytes) < 0x0 - 0xFFFFFFFF: 8 >
;
< / h >
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN = 3
Stack_Mem SPACE Stack_Size
__initial_sp
;
<h> Heap Configuration
;
<o> Heap Size(in Bytes) < 0x0 - 0xFFFFFFFF: 8 >
;
< / h >
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN = 3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
;
Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ;
Top of Stack
DCD Reset_Handler ;
Reset Handler
DCD NMI_Handler ;
NMI Handler
DCD HardFault_Handler ;
Hard Fault Handler
DCD MemManage_Handler ;
MPU Fault Handler
DCD BusFault_Handler ;
Bus Fault Handler
DCD UsageFault_Handler ;
Usage Fault Handler
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD SVC_Handler ;
SVCall Handler
DCD DebugMon_Handler ;
Debug Monitor Handler
DCD 0 ;
Reserved
DCD PendSV_Handler ;
PendSV Handler
DCD SysTick_Handler ;
SysTick Handler
;
External Interrupts
DCD WWDT_IRQHandler ;
Window Watchdog
DCD PVD_IRQHandler ;
PVD through EINT Line detect
DCD TAMPER_IRQHandler ;
Tamper
DCD RTC_IRQHandler ;
RTC
DCD FLASH_IRQHandler ;
Flash
DCD RCM_IRQHandler ;
RCM
DCD EINT0_IRQHandler ;
EINT Line 0
DCD EINT1_IRQHandler ;
EINT Line 1
DCD EINT2_IRQHandler ;
EINT Line 2
DCD EINT3_IRQHandler ;
EINT Line 3
DCD EINT4_IRQHandler ;
EINT Line 4
DCD DMA1_Channel1_IRQHandler ;
DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ;
DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ;
DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ;
DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ;
DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ;
DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ;
DMA1 Channel 7
DCD ADC1_2_IRQHandler ;
ADC1 &ADC2
DCD USBD1_HP_CAN1_TX_IRQHandler ;
USBD1 High Priority or CAN1 TX
DCD USBD1_LP_CAN1_RX0_IRQHandler ;
USBD1 Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ;
CAN1 RX1
DCD CAN1_SCE_IRQHandler ;
CAN1 SCE
DCD EINT9_5_IRQHandler ;
EINT Line 9..5
DCD TMR1_BRK_IRQHandler ;
TMR1 Break
DCD TMR1_UP_IRQHandler ;
TMR1 Update
DCD TMR1_TRG_COM_IRQHandler ;
TMR1 Trigger and Commutation
DCD TMR1_CC_IRQHandler ;
TMR1 Capture Compare
DCD TMR2_IRQHandler ;
TMR2
DCD TMR3_IRQHandler ;
TMR3
DCD TMR4_IRQHandler ;
TMR4
DCD I2C1_EV_IRQHandler ;
I2C1 Event
DCD I2C1_ER_IRQHandler ;
I2C1 Error
DCD I2C2_EV_IRQHandler ;
I2C2 Event
DCD I2C2_ER_IRQHandler ;
I2C2 Error
DCD SPI1_IRQHandler ;
SPI1
DCD SPI2_IRQHandler ;
SPI2
DCD USART1_IRQHandler ;
USART1
DCD USART2_IRQHandler ;
USART2
DCD USART3_IRQHandler ;
USART3
DCD EINT15_10_IRQHandler ;
EINT Line 15..10
DCD RTCAlarm_IRQHandler ;
RTC Alarm through EINT Line
DCD USBDWakeUp_IRQHandler ;
USBD Wakeup from suspend
DCD TMR8_BRK_IRQHandler ;
TMR8 Break
DCD TMR8_UP_IRQHandler ;
TMR8 Update
DCD TMR8_TRG_COM_IRQHandler ;
TMR8 Trigger and Commutation
DCD TMR8_CC_IRQHandler ;
TMR8 Capture Compare
DCD ADC3_IRQHandler ;
ADC3
DCD EMMC_IRQHandler ;
EMMC
DCD SDIO_IRQHandler ;
SDIO
DCD TMR5_IRQHandler ;
TMR5
DCD SPI3_IRQHandler ;
SPI3
DCD UART4_IRQHandler ;
UART4
DCD UART5_IRQHandler ;
UART5
DCD TMR6_IRQHandler ;
TMR6
DCD TMR7_IRQHandler ;
TMR7
DCD DMA2_Channel1_IRQHandler ;
DMA2 Channel1
DCD DMA2_Channel2_IRQHandler ;
DMA2 Channel2
DCD DMA2_Channel3_IRQHandler ;
DMA2 Channel3
DCD DMA2_Channel4_5_IRQHandler ;
DMA2 Channel4 &Channel5
DCD 0 ;
Reserved
DCD USBD2_HP_CAN2_TX_IRQHandler ;
USBD2 High Priority or CAN2 TX
DCD USBD2_LP_CAN2_RX0_IRQHandler ;
USBD2 Low Priority or CAN2 RX0
DCD CAN2_RX1_IRQHandler ;
CAN2 RX1
DCD CAN2_SCE_IRQHandler ;
CAN2 SCE
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA | .text |, CODE, READONLY
;
Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, = SystemInit
BLX R0
LDR R0, = __main
BX R0
ENDP
;
Dummy Exception Handlers(infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDT_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCM_IRQHandler [WEAK]
EXPORT EINT0_IRQHandler [WEAK]
EXPORT EINT1_IRQHandler [WEAK]
EXPORT EINT2_IRQHandler [WEAK]
EXPORT EINT3_IRQHandler [WEAK]
EXPORT EINT4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USBD1_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USBD1_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EINT9_5_IRQHandler [WEAK]
EXPORT TMR1_BRK_IRQHandler [WEAK]
EXPORT TMR1_UP_IRQHandler [WEAK]
EXPORT TMR1_TRG_COM_IRQHandler [WEAK]
EXPORT TMR1_CC_IRQHandler [WEAK]
EXPORT TMR2_IRQHandler [WEAK]
EXPORT TMR3_IRQHandler [WEAK]
EXPORT TMR4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EINT15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBDWakeUp_IRQHandler [WEAK]
EXPORT TMR8_BRK_IRQHandler [WEAK]
EXPORT TMR8_UP_IRQHandler [WEAK]
EXPORT TMR8_TRG_COM_IRQHandler [WEAK]
EXPORT TMR8_CC_IRQHandler [WEAK]
EXPORT ADC3_IRQHandler [WEAK]
EXPORT EMMC_IRQHandler [WEAK]
EXPORT SDIO_IRQHandler [WEAK]
EXPORT TMR5_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT UART5_IRQHandler [WEAK]
EXPORT TMR6_IRQHandler [WEAK]
EXPORT TMR7_IRQHandler [WEAK]
EXPORT DMA2_Channel1_IRQHandler [WEAK]
EXPORT DMA2_Channel2_IRQHandler [WEAK]
EXPORT DMA2_Channel3_IRQHandler [WEAK]
EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
EXPORT USBD2_HP_CAN2_TX_IRQHandler [WEAK]
EXPORT USBD2_LP_CAN2_RX0_IRQHandler [WEAK]
EXPORT CAN2_RX1_IRQHandler [WEAK]
EXPORT CAN2_SCE_IRQHandler [WEAK]
WWDT_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCM_IRQHandler
EINT0_IRQHandler
EINT1_IRQHandler
EINT2_IRQHandler
EINT3_IRQHandler
EINT4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USBD1_HP_CAN1_TX_IRQHandler
USBD1_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EINT9_5_IRQHandler
TMR1_BRK_IRQHandler
TMR1_UP_IRQHandler
TMR1_TRG_COM_IRQHandler
TMR1_CC_IRQHandler
TMR2_IRQHandler
TMR3_IRQHandler
TMR4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EINT15_10_IRQHandler
RTCAlarm_IRQHandler
USBDWakeUp_IRQHandler
TMR8_BRK_IRQHandler
TMR8_UP_IRQHandler
TMR8_TRG_COM_IRQHandler
TMR8_CC_IRQHandler
ADC3_IRQHandler
EMMC_IRQHandler
SDIO_IRQHandler
TMR5_IRQHandler
SPI3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
TMR6_IRQHandler
TMR7_IRQHandler
DMA2_Channel1_IRQHandler
DMA2_Channel2_IRQHandler
DMA2_Channel3_IRQHandler
DMA2_Channel4_5_IRQHandler
USBD2_HP_CAN2_TX_IRQHandler
USBD2_LP_CAN2_RX0_IRQHandler
CAN2_RX1_IRQHandler
CAN2_SCE_IRQHandler
B .
ENDP
ALIGN
;
*******************************************************************************
;
User Stack and Heap initialization
;
*******************************************************************************
IF :
DEF:
__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, = (Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;
*******************************END OF FILE ************************************
;/*!
; * @file startup_apm32f10x_md.s
; *
; * @brief CMSIS Cortex-M3 based Core Device Startup File for Device startup_apm32f10x_md
; *
; * @version V1.0.2
; *
; * @date 2022-01-05
; *
; * @attention
; *
; * Copyright (C) 2020-2022 Geehy Semiconductor
; *
; * You may not use this file except in compliance with the
; * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
; *
; * The program is only for reference, which is distributed in the hope
; * that it will be usefull and instructional for customers to develop
; * their software. Unless required by applicable law or agreed to in
; * writing, the program is distributed on an "AS IS" BASIS, WITHOUT
; * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
; * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
; * and limitations under the License.
; */
;
<h> Stack Configuration
;
<o> Stack Size(in Bytes) < 0x0 - 0xFFFFFFFF: 8 >
;
< / h >
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN = 3
Stack_Mem SPACE Stack_Size
__initial_sp
;
<h> Heap Configuration
;
<o> Heap Size(in Bytes) < 0x0 - 0xFFFFFFFF: 8 >
;
< / h >
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN = 3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
;
Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ;
Top of Stack
DCD Reset_Handler ;
Reset Handler
DCD NMI_Handler ;
NMI Handler
DCD HardFault_Handler ;
Hard Fault Handler
DCD MemManage_Handler ;
MPU Fault Handler
DCD BusFault_Handler ;
Bus Fault Handler
DCD UsageFault_Handler ;
Usage Fault Handler
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD 0 ;
Reserved
DCD SVC_Handler ;
SVCall Handler
DCD DebugMon_Handler ;
Debug Monitor Handler
DCD 0 ;
Reserved
DCD PendSV_Handler ;
PendSV Handler
DCD SysTick_Handler ;
SysTick Handler
;
External Interrupts
DCD WWDT_IRQHandler ;
Window Watchdog
DCD PVD_IRQHandler ;
PVD through EINT Line detect
DCD TAMPER_IRQHandler ;
Tamper
DCD RTC_IRQHandler ;
RTC
DCD FLASH_IRQHandler ;
Flash
DCD RCM_IRQHandler ;
RCM
DCD EINT0_IRQHandler ;
EINT Line 0
DCD EINT1_IRQHandler ;
EINT Line 1
DCD EINT2_IRQHandler ;
EINT Line 2
DCD EINT3_IRQHandler ;
EINT Line 3
DCD EINT4_IRQHandler ;
EINT Line 4
DCD DMA1_Channel1_IRQHandler ;
DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ;
DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ;
DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ;
DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ;
DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ;
DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ;
DMA1 Channel 7
DCD ADC1_2_IRQHandler ;
ADC1_2
DCD USBD1_HP_CAN1_TX_IRQHandler ;
USBD1 High Priority or CAN1 TX
DCD USBD1_LP_CAN1_RX0_IRQHandler ;
USBD1 Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ;
CAN1 RX1
DCD CAN1_SCE_IRQHandler ;
CAN1 SCE
DCD EINT9_5_IRQHandler ;
EINT Line 9..5
DCD TMR1_BRK_IRQHandler ;
TMR1 Break
DCD TMR1_UP_IRQHandler ;
TMR1 Update
DCD TMR1_TRG_COM_IRQHandler ;
TMR1 Trigger and Commutation
DCD TMR1_CC_IRQHandler ;
TMR1 Capture Compare
DCD TMR2_IRQHandler ;
TMR2
DCD TMR3_IRQHandler ;
TMR3
DCD TMR4_IRQHandler ;
TMR4
DCD I2C1_EV_IRQHandler ;
I2C1 Event
DCD I2C1_ER_IRQHandler ;
I2C1 Error
DCD I2C2_EV_IRQHandler ;
I2C2 Event
DCD I2C2_ER_IRQHandler ;
I2C2 Error
DCD SPI1_IRQHandler ;
SPI1
DCD SPI2_IRQHandler ;
SPI2
DCD USART1_IRQHandler ;
USART1
DCD USART2_IRQHandler ;
USART2
DCD USART3_IRQHandler ;
USART3
DCD EINT15_10_IRQHandler ;
EINT Line 15..10
DCD RTCAlarm_IRQHandler ;
RTC Alarm through EINT Line
DCD USBDWakeUp_IRQHandler ;
USBD Wakeup from suspend
DCD FPU_IRQHandler ;
FPU
DCD QSPI_IRQHandler ;
QSPI
DCD USBD2_HP_IRQHandler ;
USBD2 High Priority
DCD USBD2_LP_IRQHandler ;
USBD2 Low Priority
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA | .text |, CODE, READONLY
;
Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, = SystemInit
BLX R0
LDR R0, = __main
BX R0
ENDP
;
Dummy Exception Handlers(infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDT_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCM_IRQHandler [WEAK]
EXPORT EINT0_IRQHandler [WEAK]
EXPORT EINT1_IRQHandler [WEAK]
EXPORT EINT2_IRQHandler [WEAK]
EXPORT EINT3_IRQHandler [WEAK]
EXPORT EINT4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USBD1_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USBD1_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EINT9_5_IRQHandler [WEAK]
EXPORT TMR1_BRK_IRQHandler [WEAK]
EXPORT TMR1_UP_IRQHandler [WEAK]
EXPORT TMR1_TRG_COM_IRQHandler [WEAK]
EXPORT TMR1_CC_IRQHandler [WEAK]
EXPORT TMR2_IRQHandler [WEAK]
EXPORT TMR3_IRQHandler [WEAK]
EXPORT TMR4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EINT15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBDWakeUp_IRQHandler [WEAK]
EXPORT FPU_IRQHandler [WEAK]
EXPORT QSPI_IRQHandler [WEAK]
EXPORT USBD2_HP_IRQHandler [WEAK]
EXPORT USBD2_LP_IRQHandler [WEAK]
WWDT_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCM_IRQHandler
EINT0_IRQHandler
EINT1_IRQHandler
EINT2_IRQHandler
EINT3_IRQHandler
EINT4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USBD1_HP_CAN1_TX_IRQHandler
USBD1_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EINT9_5_IRQHandler
TMR1_BRK_IRQHandler
TMR1_UP_IRQHandler
TMR1_TRG_COM_IRQHandler
TMR1_CC_IRQHandler
TMR2_IRQHandler
TMR3_IRQHandler
TMR4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EINT15_10_IRQHandler
RTCAlarm_IRQHandler
USBDWakeUp_IRQHandler
FPU_IRQHandler
QSPI_IRQHandler
USBD2_HP_IRQHandler
USBD2_LP_IRQHandler
B .
ENDP
ALIGN
;
*******************************************************************************
;
User Stack and Heap initialization
;
*******************************************************************************
IF :
DEF:
__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, = (Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;
*******************************END OF FILE ************************************
;/*!
; * @file startup_apm32f10x_hd.s
; *
; * @brief CMSIS Cortex-M3 based Core Device Startup File for Device startup_apm32f10x_hd
; *
; * @version V1.0.2
; *
; * @date 2022-01-05
; *
; * @attention
; *
; * Copyright (C) 2020-2022 Geehy Semiconductor
; *
; * You may not use this file except in compliance with the
; * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
; *
; * The program is only for reference, which is distributed in the hope
; * that it will be usefull and instructional for customers to develop
; * their software. Unless required by applicable law or agreed to in
; * writing, the program is distributed on an "AS IS" BASIS, WITHOUT
; * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
; * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
; * and limitations under the License.
; */
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDT_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EINT Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCM_IRQHandler ; RCM
DCD EINT0_IRQHandler ; EINT Line 0
DCD EINT1_IRQHandler ; EINT Line 1
DCD EINT2_IRQHandler ; EINT Line 2
DCD EINT3_IRQHandler ; EINT Line 3
DCD EINT4_IRQHandler ; EINT Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1 & ADC2
DCD USBD1_HP_CAN1_TX_IRQHandler ; USBD1 High Priority or CAN1 TX
DCD USBD1_LP_CAN1_RX0_IRQHandler ; USBD1 Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EINT9_5_IRQHandler ; EINT Line 9..5
DCD TMR1_BRK_IRQHandler ; TMR1 Break
DCD TMR1_UP_IRQHandler ; TMR1 Update
DCD TMR1_TRG_COM_IRQHandler ; TMR1 Trigger and Commutation
DCD TMR1_CC_IRQHandler ; TMR1 Capture Compare
DCD TMR2_IRQHandler ; TMR2
DCD TMR3_IRQHandler ; TMR3
DCD TMR4_IRQHandler ; TMR4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EINT15_10_IRQHandler ; EINT Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EINT Line
DCD USBDWakeUp_IRQHandler ; USBD Wakeup from suspend
DCD TMR8_BRK_IRQHandler ; TMR8 Break
DCD TMR8_UP_IRQHandler ; TMR8 Update
DCD TMR8_TRG_COM_IRQHandler ; TMR8 Trigger and Commutation
DCD TMR8_CC_IRQHandler ; TMR8 Capture Compare
DCD ADC3_IRQHandler ; ADC3
DCD EMMC_IRQHandler ; EMMC
DCD SDIO_IRQHandler ; SDIO
DCD TMR5_IRQHandler ; TMR5
DCD SPI3_IRQHandler ; SPI3
DCD UART4_IRQHandler ; UART4
DCD UART5_IRQHandler ; UART5
DCD TMR6_IRQHandler ; TMR6
DCD TMR7_IRQHandler ; TMR7
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
DCD 0 ; Reserved
DCD USBD2_HP_CAN2_TX_IRQHandler ; USBD2 High Priority or CAN2 TX
DCD USBD2_LP_CAN2_RX0_IRQHandler ; USBD2 Low Priority or CAN2 RX0
DCD CAN2_RX1_IRQHandler ; CAN2 RX1
DCD CAN2_SCE_IRQHandler ; CAN2 SCE
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDT_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCM_IRQHandler [WEAK]
EXPORT EINT0_IRQHandler [WEAK]
EXPORT EINT1_IRQHandler [WEAK]
EXPORT EINT2_IRQHandler [WEAK]
EXPORT EINT3_IRQHandler [WEAK]
EXPORT EINT4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USBD1_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USBD1_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EINT9_5_IRQHandler [WEAK]
EXPORT TMR1_BRK_IRQHandler [WEAK]
EXPORT TMR1_UP_IRQHandler [WEAK]
EXPORT TMR1_TRG_COM_IRQHandler [WEAK]
EXPORT TMR1_CC_IRQHandler [WEAK]
EXPORT TMR2_IRQHandler [WEAK]
EXPORT TMR3_IRQHandler [WEAK]
EXPORT TMR4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EINT15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBDWakeUp_IRQHandler [WEAK]
EXPORT TMR8_BRK_IRQHandler [WEAK]
EXPORT TMR8_UP_IRQHandler [WEAK]
EXPORT TMR8_TRG_COM_IRQHandler [WEAK]
EXPORT TMR8_CC_IRQHandler [WEAK]
EXPORT ADC3_IRQHandler [WEAK]
EXPORT EMMC_IRQHandler [WEAK]
EXPORT SDIO_IRQHandler [WEAK]
EXPORT TMR5_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT UART5_IRQHandler [WEAK]
EXPORT TMR6_IRQHandler [WEAK]
EXPORT TMR7_IRQHandler [WEAK]
EXPORT DMA2_Channel1_IRQHandler [WEAK]
EXPORT DMA2_Channel2_IRQHandler [WEAK]
EXPORT DMA2_Channel3_IRQHandler [WEAK]
EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
EXPORT USBD2_HP_CAN2_TX_IRQHandler [WEAK]
EXPORT USBD2_LP_CAN2_RX0_IRQHandler [WEAK]
EXPORT CAN2_RX1_IRQHandler [WEAK]
EXPORT CAN2_SCE_IRQHandler [WEAK]
WWDT_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCM_IRQHandler
EINT0_IRQHandler
EINT1_IRQHandler
EINT2_IRQHandler
EINT3_IRQHandler
EINT4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USBD1_HP_CAN1_TX_IRQHandler
USBD1_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EINT9_5_IRQHandler
TMR1_BRK_IRQHandler
TMR1_UP_IRQHandler
TMR1_TRG_COM_IRQHandler
TMR1_CC_IRQHandler
TMR2_IRQHandler
TMR3_IRQHandler
TMR4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EINT15_10_IRQHandler
RTCAlarm_IRQHandler
USBDWakeUp_IRQHandler
TMR8_BRK_IRQHandler
TMR8_UP_IRQHandler
TMR8_TRG_COM_IRQHandler
TMR8_CC_IRQHandler
ADC3_IRQHandler
EMMC_IRQHandler
SDIO_IRQHandler
TMR5_IRQHandler
SPI3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
TMR6_IRQHandler
TMR7_IRQHandler
DMA2_Channel1_IRQHandler
DMA2_Channel2_IRQHandler
DMA2_Channel3_IRQHandler
DMA2_Channel4_5_IRQHandler
USBD2_HP_CAN2_TX_IRQHandler
USBD2_LP_CAN2_RX0_IRQHandler
CAN2_RX1_IRQHandler
CAN2_SCE_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, = (Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;*******************************END OF FILE************************************
;/*!
; * @file startup_apm32f10x_md.s
; *
; * @brief CMSIS Cortex-M3 based Core Device Startup File for Device startup_apm32f10x_md
; *
; * @version V1.0.2
; *
; * @date 2022-01-05
; *
; * @attention
; *
; * Copyright (C) 2020-2022 Geehy Semiconductor
; *
; * You may not use this file except in compliance with the
; * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
; *
; * The program is only for reference, which is distributed in the hope
; * that it will be usefull and instructional for customers to develop
; * their software. Unless required by applicable law or agreed to in
; * writing, the program is distributed on an "AS IS" BASIS, WITHOUT
; * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
; * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
; * and limitations under the License.
; */
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDT_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EINT Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCM_IRQHandler ; RCM
DCD EINT0_IRQHandler ; EINT Line 0
DCD EINT1_IRQHandler ; EINT Line 1
DCD EINT2_IRQHandler ; EINT Line 2
DCD EINT3_IRQHandler ; EINT Line 3
DCD EINT4_IRQHandler ; EINT Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1_2
DCD USBD1_HP_CAN1_TX_IRQHandler ; USBD1 High Priority or CAN1 TX
DCD USBD1_LP_CAN1_RX0_IRQHandler ; USBD1 Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EINT9_5_IRQHandler ; EINT Line 9..5
DCD TMR1_BRK_IRQHandler ; TMR1 Break
DCD TMR1_UP_IRQHandler ; TMR1 Update
DCD TMR1_TRG_COM_IRQHandler ; TMR1 Trigger and Commutation
DCD TMR1_CC_IRQHandler ; TMR1 Capture Compare
DCD TMR2_IRQHandler ; TMR2
DCD TMR3_IRQHandler ; TMR3
DCD TMR4_IRQHandler ; TMR4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EINT15_10_IRQHandler ; EINT Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EINT Line
DCD USBDWakeUp_IRQHandler ; USBD Wakeup from suspend
DCD FPU_IRQHandler ; FPU
DCD QSPI_IRQHandler ; QSPI
DCD USBD2_HP_IRQHandler ; USBD2 High Priority
DCD USBD2_LP_IRQHandler ; USBD2 Low Priority
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDT_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCM_IRQHandler [WEAK]
EXPORT EINT0_IRQHandler [WEAK]
EXPORT EINT1_IRQHandler [WEAK]
EXPORT EINT2_IRQHandler [WEAK]
EXPORT EINT3_IRQHandler [WEAK]
EXPORT EINT4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USBD1_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USBD1_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EINT9_5_IRQHandler [WEAK]
EXPORT TMR1_BRK_IRQHandler [WEAK]
EXPORT TMR1_UP_IRQHandler [WEAK]
EXPORT TMR1_TRG_COM_IRQHandler [WEAK]
EXPORT TMR1_CC_IRQHandler [WEAK]
EXPORT TMR2_IRQHandler [WEAK]
EXPORT TMR3_IRQHandler [WEAK]
EXPORT TMR4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EINT15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBDWakeUp_IRQHandler [WEAK]
EXPORT FPU_IRQHandler [WEAK]
EXPORT QSPI_IRQHandler [WEAK]
EXPORT USBD2_HP_IRQHandler [WEAK]
EXPORT USBD2_LP_IRQHandler [WEAK]
WWDT_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCM_IRQHandler
EINT0_IRQHandler
EINT1_IRQHandler
EINT2_IRQHandler
EINT3_IRQHandler
EINT4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USBD1_HP_CAN1_TX_IRQHandler
USBD1_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EINT9_5_IRQHandler
TMR1_BRK_IRQHandler
TMR1_UP_IRQHandler
TMR1_TRG_COM_IRQHandler
TMR1_CC_IRQHandler
TMR2_IRQHandler
TMR3_IRQHandler
TMR4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EINT15_10_IRQHandler
RTCAlarm_IRQHandler
USBDWakeUp_IRQHandler
FPU_IRQHandler
QSPI_IRQHandler
USBD2_HP_IRQHandler
USBD2_LP_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, = (Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;*******************************END OF FILE************************************
......@@ -91,7 +91,7 @@ void rt_hw_us_delay(rt_uint32_t us)
}
/**
* This function will initial STM32 board.
* This function will config the board for initialization.
*/
RT_WEAK void rt_hw_board_init()
{
......
import os
import sys
import shutil
cwd_path = os.getcwd()
sys.path.append(os.path.join(os.path.dirname(cwd_path), 'rt-thread', 'tools'))
# BSP dist function
def dist_do_building(BSP_ROOT, dist_dir):
from mkdist import bsp_copy_files
import rtconfig
print("=> copy apm32 bsp library")
library_dir = os.path.join(dist_dir, 'libraries')
library_path = os.path.join(os.path.dirname(BSP_ROOT), 'libraries')
bsp_copy_files(os.path.join(library_path, rtconfig.BSP_LIBRARY_TYPE),
os.path.join(library_dir, rtconfig.BSP_LIBRARY_TYPE))
print("=> copy bsp drivers")
bsp_copy_files(os.path.join(library_path, 'Drivers'), os.path.join(library_dir, 'Drivers'))
shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig'))
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