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提交 3ab2d4fb 编写于 作者: T thread-liu
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Merge branch 'master' of https://github.com/RT-Thread/rt-thread into step4-ev1

上级 a06f1fa6 42088b01
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Showing with 1285 addition and 915 deletion
.github/workflows/action.yml
浏览文件 @ 3ab2d4fb
......@@ -24,6 +24,7 @@ on:
jobs:
build:
runs-on: ubuntu-latest
name: ${{ matrix.legs.RTT_BSP }}
strategy:
fail-fast: false
matrix:
......
bsp/ls2kdev/.config
浏览文件 @ 3ab2d4fb
......@@ -52,6 +52,7 @@ CONFIG_RT_USING_MEMPOOL=y
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_USERHEAP is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y
......@@ -150,6 +151,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
......@@ -159,7 +161,12 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
CONFIG_RT_USING_SPI=y
# CONFIG_RT_USING_QSPI is not set
# CONFIG_RT_USING_SPI_MSD is not set
# CONFIG_RT_USING_SFUD is not set
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
......@@ -183,6 +190,7 @@ CONFIG_RT_USING_LIBC=y
CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_MMAP is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_GETLINE is not set
# CONFIG_RT_USING_POSIX_AIO is not set
# CONFIG_RT_USING_MODULE is not set
......@@ -375,6 +383,8 @@ CONFIG_RT_LWIP_USING_PING=y
# CONFIG_PKG_USING_AGILE_TELNET is not set
# CONFIG_PKG_USING_NMEALIB is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PDULIB is not set
# CONFIG_PKG_USING_BTSTACK is not set
#
# security packages
......@@ -453,6 +463,7 @@ CONFIG_PKG_LWEXT4_VER="latest"
# CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
# CONFIG_PKG_USING_PPOOL is not set
#
# peripheral libraries and drivers
......@@ -505,6 +516,7 @@ CONFIG_PKG_LWEXT4_VER="latest"
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
# CONFIG_PKG_USING_LD3320 is not set
# CONFIG_PKG_USING_WK2124 is not set
# CONFIG_PKG_USING_LY68L6400 is not set
#
# miscellaneous packages
......@@ -542,4 +554,8 @@ CONFIG_PKG_LWEXT4_VER="latest"
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
# CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
CONFIG_SOC_LS2K1000=y
bsp/ls2kdev/README.md
浏览文件 @ 3ab2d4fb
......@@ -97,7 +97,7 @@ msh >
```
title TFTPBOOT
kernel tftfp://10.1.1.118/rtthread.elf
kernel tftp://10.1.1.118/rtthread.elf
args console=tty root=/dev/sda2
initrd (wd0,0)/initrd.img
```
......@@ -114,11 +114,12 @@ title TFTPBOOT
| 驱动 | 支持情况 | 备注 |
| ------ | ---- | :------: |
| UART | 支持 | UART0|
| UART | 支持 | UART0\UART4,波特率可调 |
| GPIO | 支持 | - |
| PWM | 支持 | - |
| GMAC | 支持 | 网卡驱动 |
| RTC | 支持 | - |
| SPI | 支持 | - |
## 6. 联系人信息
......@@ -127,4 +128,4 @@ title TFTPBOOT
[1]: http://ftp.loongnix.org/loongsonpi/pi_2/doc
[2]: https://pan.baidu.com/s/17dbdOE4NAJ-qEW7drVRq2w
[3]: http://ftp.loongnix.org/embedd/ls2k/
[4]: https://github.com/BernardXiong
[4]: https://github.com/BernardXiong
\ No newline at end of file
bsp/ls2kdev/applications/main.c
浏览文件 @ 3ab2d4fb
......@@ -10,8 +10,8 @@
#include <rtthread.h>
int main(int argc, char** argv)
{
int main(int argc, char **argv)
{
rt_kprintf("Hi, this is RT-Thread!!\n");
return 0;
}
bsp/ls2kdev/drivers/board.c
浏览文件 @ 3ab2d4fb
......@@ -67,7 +67,7 @@ void rt_hw_timer_handler(void)
*/
void rt_hw_timer_init(void)
{
write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
write_c0_compare(CPU_HZ / 2 / RT_TICK_PER_SECOND);
write_c0_count(0);
mips_unmask_cpu_irq(7);
}
......@@ -90,16 +90,16 @@ void rt_hw_board_init(void)
/* init hardware UART device */
rt_hw_uart_init();
/* set console device */
rt_console_set_device("uart");
rt_console_set_device("uart0");
#endif
#ifdef RT_USING_HEAP
rt_system_heap_init((void*)RT_HW_HEAP_BEGIN, (void*)RT_HW_HEAP_END);
rt_system_heap_init((void *)RT_HW_HEAP_BEGIN, (void *)RT_HW_HEAP_END);
#endif
/* init operating system timer */
rt_hw_timer_init();
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
......
bsp/ls2kdev/drivers/clk.c
浏览文件 @ 3ab2d4fb
......@@ -14,7 +14,8 @@
#include <rtthread.h>
#include "ls2k1000.h"
struct loongson_pll {
struct loongson_pll
{
rt_uint64_t PLL_SYS_0;
rt_uint64_t PLL_SYS_1;
rt_uint64_t PLL_DDR_0;
......
bsp/ls2kdev/drivers/drv_gpio.c
浏览文件 @ 3ab2d4fb
......@@ -25,7 +25,8 @@ static void loongson_pin_mode(struct rt_device *device, rt_base_t pin, rt_base_t
gpio = (void *)device->user_data;
m = (rt_uint64_t)1 << pin;
switch (mode) {
switch (mode)
{
case PIN_MODE_OUTPUT:
gpio->GPIO0_OEN &= ~m;
break;
......@@ -52,7 +53,8 @@ static void loongson_pin_write(struct rt_device *device, rt_base_t pin, rt_base_
struct loongson_gpio *gpio;
rt_uint64_t m;
if (pin < 0 || pin >= 60) {
if (pin < 0 || pin >= 60)
{
rt_kprintf("error\n");
return;
}
......@@ -90,11 +92,11 @@ static rt_err_t loongson_pin_attach_irq(struct rt_device *device, rt_int32_t pin
gpio = (void *)device->user_data;
if(pin < 4)
if (pin < 4)
{
index = pin;
}
else if(pin < 32)
else if (pin < 32)
{
index = 5;
}
......@@ -102,7 +104,7 @@ static rt_err_t loongson_pin_attach_irq(struct rt_device *device, rt_int32_t pin
{
index = 6;
}
_g_gpio_irq_tbl[index].irq_cb[pin] = hdr;
_g_gpio_irq_tbl[index].irq_arg[pin] = args;
_g_gpio_irq_tbl[index].irq_type[pin] = mode;
......@@ -120,11 +122,11 @@ static rt_err_t loongson_pin_detach_irq(struct rt_device *device, rt_int32_t pin
gpio = (void *)device->user_data;
rt_uint8_t index;
if(pin < 4)
if (pin < 4)
{
index = pin;
}
else if(pin < 32)
else if (pin < 32)
{
index = 5;
}
......@@ -146,11 +148,11 @@ static rt_err_t loongson_pin_irq_enable(struct rt_device *device, rt_base_t pin,
gpio = (void *)device->user_data;
rt_uint8_t index;
if(pin < 4)
if (pin < 4)
{
index = pin;
}
else if(pin < 32)
else if (pin < 32)
{
index = 5;
}
......@@ -173,23 +175,23 @@ static void gpio_irq_handler(int irq, void *param)
rt_uint32_t value;
rt_uint32_t tmpvalue;
if(irq == LS2K_GPIO0_INT_IRQ)
if (irq == LS2K_GPIO0_INT_IRQ)
{
pin = 0;
}
else if(irq == LS2K_GPIO1_INT_IRQ)
else if (irq == LS2K_GPIO1_INT_IRQ)
{
pin = 1;
}
else if(irq == LS2K_GPIO2_INT_IRQ)
else if (irq == LS2K_GPIO2_INT_IRQ)
{
pin = 2;
}
else if(irq == LS2K_GPIO3_INT_IRQ)
else if (irq == LS2K_GPIO3_INT_IRQ)
{
pin = 3;
}
else if(irq == LS2K_GPIO_INTLO_IRQ)
else if (irq == LS2K_GPIO_INTLO_IRQ)
{
pin = 4;
}
......@@ -197,12 +199,12 @@ static void gpio_irq_handler(int irq, void *param)
{
pin = 32;
}
while (value)
{
if ((value & 0x1) && (irq_def->irq_cb[pin] != RT_NULL))
{
if(irq_def->state[pin])
if (irq_def->state[pin])
{
irq_def->irq_cb[pin](irq_def->irq_arg[pin]);
}
......@@ -212,7 +214,8 @@ static void gpio_irq_handler(int irq, void *param)
}
}
static struct rt_pin_ops loongson_pin_ops = {
static struct rt_pin_ops loongson_pin_ops =
{
.pin_mode = loongson_pin_mode,
.pin_write = loongson_pin_write,
.pin_read = loongson_pin_read,
......
bsp/ls2kdev/drivers/drv_pwm.c
浏览文件 @ 3ab2d4fb
......@@ -28,7 +28,8 @@
#define CTRL_INVERT (1UL<<9)
#define CTRL_DZONE (1UL<<10)
struct loongson_pwm {
struct loongson_pwm
{
rt_uint32_t __PAD0;
rt_uint32_t low_buffer;
rt_uint32_t full_buffer;
......@@ -91,7 +92,8 @@ static rt_err_t loongson_pwm_ioctl(struct rt_device_pwm *device, int cmd, void *
cfg = (void *)arg;
switch (cmd) {
switch (cmd)
{
case PWM_CMD_ENABLE:
rc = loongson_pwm_enable(device, cfg->channel);
break;
......@@ -111,18 +113,21 @@ static rt_err_t loongson_pwm_ioctl(struct rt_device_pwm *device, int cmd, void *
return rc;
}
struct rt_pwm_ops loongson_pwm_ops = {
struct rt_pwm_ops loongson_pwm_ops =
{
.control = loongson_pwm_ioctl,
};
struct rt_device_pwm loongson_pwm = {
struct rt_device_pwm loongson_pwm =
{
.ops = &loongson_pwm_ops,
};
int loongson_pwm_init(void)
{
int rc = RT_EOK;
static rt_uint32_t *priv[] = {
static rt_uint32_t *priv[] =
{
(void *)PWM0_BASE,
(void *)PWM1_BASE,
(void *)PWM2_BASE,
......
bsp/ls2kdev/drivers/drv_rtc.c
浏览文件 @ 3ab2d4fb
......@@ -19,7 +19,8 @@
#ifdef RT_USING_RTC
struct loongson_rtc {
struct loongson_rtc
{
rt_uint32_t sys_toytrim;
rt_uint32_t sys_toywrite0;
rt_uint32_t sys_toywrite1;
......@@ -45,7 +46,8 @@ struct loongson_rtc {
#define __BF(number, n, m) __RBF((number>>m), (n-m+1))
#define BF(number, n, m) (m<n ? __BF(number, n, m) : __BF(number, m, n))
struct rtctime {
struct rtctime
{
rt_uint32_t sys_toyread0;
rt_uint32_t sys_toyread1;
rt_uint32_t sys_rtcread0;
......@@ -106,7 +108,7 @@ static rt_err_t rt_rtc_open(rt_device_t dev, rt_uint16_t oflag)
return RT_EOK;
}
static rt_size_t rt_rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
static rt_size_t rt_rtc_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{
return 0;
}
......@@ -133,7 +135,8 @@ static rt_err_t rt_rtc_ioctl(rt_device_t dev, int cmd, void *args)
rtctm.sys_rtcread0 = hw_rtc->sys_rtcread0;
tmptime = *localrtctime(&rtctm);
switch (cmd) {
switch (cmd)
{
case RT_DEVICE_CTRL_RTC_GET_TIME:
*t = mktime(&tmptime);
break;
......@@ -164,7 +167,8 @@ static rt_err_t rt_rtc_ioctl(rt_device_t dev, int cmd, void *args)
int rt_hw_rtc_init(void)
{
static struct rt_device rtc = {
static struct rt_device rtc =
{
.type = RT_Device_Class_RTC,
.init = RT_NULL,
.open = rt_rtc_open,
......
bsp/ls2kdev/drivers/drv_spi.c 0 → 100644
浏览文件 @ 3ab2d4fb
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-10-28 0xcccccccccccc Initial Version
*/
/**
* @addtogroup ls2k
*/
/*@{*/
#include <stdio.h>
#include <stdlib.h>
#include <ctype.h>
#include <rtthread.h>
#include <drivers/spi.h>
#include "drv_spi.h"
#ifdef RT_USING_SPI
static void spi_init(uint8_t spre_spr, uint8_t copl, uint8_t cpha)
{
SET_SPI(SPSR, 0xc0 | (spre_spr & 0b00000011));
SET_SPI(PARAM, 0x40);
SET_SPI(PARAM2, 0x01);
SET_SPI(SPER, (spre_spr & 0b00001100) >> 2);
SET_SPI(SPCR, 0x50 | copl << 3 | cpha << 2);
SET_SPI(SOFTCS, 0xff);
}
static void spi_set_csn(uint8_t val)
{
SET_SPI(SOFTCS, val);
}
#ifdef RT_USING_SPI_GPIOCS
#include <drivers/pin.h>
#endif
static void spi_set_cs(unsigned char cs, int new_status)
{
if (cs < 4)
{
unsigned char val = 0;
val = GET_SPI(SOFTCS);
val |= 0x01 << cs ; // csen=1
if (new_status) // cs = 1
{
val |= (0x10 << cs); // csn=1
}
else // cs = 0
{
val &= ~(0x10 << cs); // csn=0
}
SET_SPI(SOFTCS, val);
return ;
}
#ifdef RT_USING_SPI_GPIOCS
else
{
rt_pin_mode(cs, PIN_MODE_OUTPUT); // with RT_USING_SPI_GPIOCS feature enabled, gpio will be used as csn pin.
rt_pin_write(cs, new_status);
}
#endif
}
static uint8_t spi_write_for_response(uint8_t data)
{
uint8_t val;
SET_SPI(TXFIFO, data);
while ((GET_SPI(SPSR))&RFEMPTY); //wait for echo
val = GET_SPI(RXFIFO);
return val;
}
static int cmd_spi_init(int argc, char *argv[])
{
uint8_t spre_spr, cpol, cpha;
switch (argc)
{
case 2:
spre_spr = strtoul(argv[1], NULL, 0);
spi_init(spre_spr, 0, 0);
break;
case 4:
spre_spr = strtoul(argv[1], NULL, 0);
cpol = strtoul(argv[2], NULL, 0);
cpha = strtoul(argv[3], NULL, 0);
spi_init(spre_spr, 0, 0);
break;
default:
printf("\nusage : cmd_spi_init spre_spr <cpol> <cpha>\n(cmd_spi_init 0x4 0x0 0x0)\n0x4:div8 0xb:div4096\n");
break;
}
}
MSH_CMD_EXPORT(cmd_spi_init, cmd_spi_init);
static int cmd_spi_set_csn(int argc, char *argv[])
{
uint8_t val, csn;
switch (argc)
{
case 3:
csn = strtoul(argv[1], NULL, 0);
val = strtoul(argv[2], NULL, 0);
spi_set_cs(csn, val);
break;
default:
printf("usage:cmd_spi_set_csn csn val\n(0xbf for csn1 enable,0xff for csn1 disable)\n");
break;
}
}
MSH_CMD_EXPORT(cmd_spi_set_csn, cmd_spi_set_csn);
static int cmd_spi_write(int argc, char *argv[])
{
uint8_t data, resp;
switch (argc)
{
case 2:
data = strtoul(argv[1], NULL, 0);
resp = spi_write_for_response(data);
printf("resp:%2X\n", resp);
break;
default:
printf("usage:cmd_spi_write data\n");
break;
}
}
MSH_CMD_EXPORT(cmd_spi_write, cmd_spi_write);
static rt_err_t configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration);
static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message *message);
const static unsigned char SPI_DIV_TABLE[] = {0b0000, 0b0001, 0b0100, 0b0010, 0b0011, 0b0101, 0b0110, 0b0111, 0b1000, 0b1001, 0b1010, 0b1011};
// 2 4 8 16 32 64 128 256 512 1024 2048 4096
static rt_err_t configure(struct rt_spi_device *device,
struct rt_spi_configuration *configuration)
{
unsigned char cpol = 0;
unsigned char cpha = 0;
RT_ASSERT(NULL != device);
RT_ASSERT(NULL != configuration);
// baudrate
if (configuration->mode & RT_SPI_CPOL) // cpol
{
cpol = 1;
}
else
{
cpol = 0;
}
if (configuration->mode & RT_SPI_CPHA) // cpha
{
cpha = 1;
}
else
{
cpha = 0;
}
float spi_max_speed = ((float)APB_MAX_SPEED) / (8.0 / (float)APB_FREQSCALE);
uint64_t div = (uint64_t)(spi_max_speed / (float)configuration->max_hz);
int ctr = 0;
while (div != 1 && ctr < 12)
{
ctr++;
div = div >> 1;
}
spi_init(SPI_DIV_TABLE[ctr], cpol, cpha);
return RT_EOK;
}
static rt_uint32_t xfer(struct rt_spi_device *device,
struct rt_spi_message *message)
{
unsigned char cs = 0;
rt_uint32_t size = 0;
const rt_uint8_t *send_ptr = NULL;
rt_uint8_t *recv_ptr = NULL;
rt_uint8_t data = 0;
RT_ASSERT(NULL != device);
RT_ASSERT(NULL != message);
cs = (unsigned char)(device->parent.user_data);
size = message->length;
if (message->cs_take)
{
spi_set_cs(cs, 0);
}
// send data
send_ptr = message->send_buf;
recv_ptr = message->recv_buf;
while (size--)
{
data = 0xFF;
if (NULL != send_ptr)
{
data = *send_ptr++;
}
if (NULL != recv_ptr)
{
*recv_ptr++ = spi_write_for_response(data);
}
else
{
spi_write_for_response(data);
}
}
// release cs
if (message->cs_release)
{
spi_set_cs(cs, 1);
}
return message->length;
}
static struct rt_spi_ops loongson_spi_ops =
{
.configure = configure,
.xfer = xfer
};
static struct rt_spi_bus loongson_spi;
static int loongson_spi_init()
{
//rt_kprintf("spi_init\n");
return rt_spi_bus_register(&loongson_spi, "spi", &loongson_spi_ops);
}
INIT_BOARD_EXPORT(loongson_spi_init);
#endif
/*@}*/
bsp/ls2kdev/drivers/drv_spi.h 0 → 100644
浏览文件 @ 3ab2d4fb
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-10-28 0xcccccccccccc Initial Version
*/
/**
* @addtogroup ls2k
*/
/*@{*/
#ifndef LS2K_DRV_SPI_H
#define LS2K_DRV_SPI_H
#include <rtthread.h>
#include <rthw.h>
// kseg1 byte operation
#define KSEG1_STORE8(addr,val) *(volatile char *)(0xffffffffa0000000 | addr) = val
#define KSEG1_LOAD8(addr) *(volatile char *)(0xffffffffa0000000 | addr)
// clock configurations
#define APB_MAX_SPEED 125000000U
#define APB_FREQSCALE (((KSEG1_LOAD8(0xffffffffbfe104d2)>>4)&0x7)+1)
// base addrs
#define SPI_BASE 0x1fff0220
#define PMON_ADDR 0xa1000000
#define FLASH_ADDR 0x000000
// bit bias
#define SPCR 0x0
#define SPSR 0x1
#define FIFO 0x2
#define TXFIFO 0x2
#define RXFIFO 0x2
#define SPER 0x3
#define PARAM 0x4
#define SOFTCS 0x5
#define PARAM2 0x6
#define RFEMPTY 1
// SPI controller operaion macros
#define SET_SPI(addr,val) KSEG1_STORE8(SPI_BASE+addr,val)
#define GET_SPI(addr) KSEG1_LOAD8(SPI_BASE+addr)
#endif
/*@}*/
bsp/ls2kdev/drivers/drv_uart.c
浏览文件 @ 3ab2d4fb
......@@ -6,37 +6,57 @@
* Change Logs:
* Date Author Notes
* 2020-04-05 bigmagic Initial version
* 2020-10-28 ma Buadrate & Multi-Port support
*/
/**
* @addtogroup ls2k
*/
/*@{*/
#include <rtthread.h>
#include <rtdevice.h>
#include <rthw.h>
#include "drv_uart.h"
#define TRUE 1
#define FALSE 0
const struct serial_configure config_uart0 = {
BAUD_RATE_115200, /* 921600 bits/s */
DATA_BITS_8, /* 8 databits */
STOP_BITS_1, /* 1 stopbit */
PARITY_NONE, /* No parity */
BIT_ORDER_LSB, /* LSB first sent */
NRZ_NORMAL, /* Normal mode */
RT_SERIAL_RB_BUFSZ, /* Buffer size */
0
};
struct rt_uart_ls2k
{
void *base;
rt_uint32_t IRQ;
};
static rt_err_t ls2k_uart_set_buad(struct rt_serial_device *serial, struct serial_configure *cfg)
{
struct rt_uart_ls2k *uart_dev = RT_NULL;
rt_err_t ret = RT_EOK;
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
uint64_t brtc = (125000000U) / (16 * (cfg->baud_rate));
UART_LCR(uart_dev->base) = 0x80; // Activate buadcfg
UART_LSB(uart_dev->base) = brtc & 0xff;
UART_MSB(uart_dev->base) = brtc >> 8;
if (((((short)UART_MSB(uart_dev->base)) << 8) | UART_LSB(uart_dev->base)) != brtc) ret = RT_ERROR;
UART_LCR(uart_dev->base) = CFCR_8BITS; // Back to normal
UART_MCR(uart_dev->base) = MCR_IENABLE/* | MCR_DTR | MCR_RTS*/;
UART_IER(uart_dev->base) = 0;
}
static rt_err_t ls2k_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
struct rt_uart_ls2k *uart_dev = RT_NULL;
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
ls2k_uart_set_buad(serial, cfg);
uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
HWREG8(0xffffffffbfe10428) = 0x1f; // Enable Multi-Port Support, by default it's 0x11 ,which means UART0 & UART4 Controller is in single port mode.
UART_IER(uart_dev->base) = 0; /* clear interrupt */
UART_FCR(uart_dev->base) = 0xc1; /* reset UART Rx/Tx */
/* set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
......@@ -44,40 +64,30 @@ static rt_err_t ls2k_uart_configure(struct rt_serial_device *serial, struct seri
UART_MCR(uart_dev->base) = 0x3;
UART_LSR(uart_dev->base) = 0x60;
UART_MSR(uart_dev->base) = 0xb0;
return RT_EOK;
}
static rt_err_t ls2k_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct rt_uart_ls2k *uart_dev = RT_NULL;
RT_ASSERT(serial != RT_NULL);
uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT: /* Disable RX IRQ */
rt_hw_interrupt_mask(uart_dev->IRQ);
break;
case RT_DEVICE_CTRL_SET_INT: /* Enable RX IRQ */
rt_hw_interrupt_umask(uart_dev->IRQ);
UART_IER(uart_dev->base) |= (IER_IRxE|IER_ILE);
UART_IER(uart_dev->base) |= (IER_IRxE | IER_ILE);
break;
default:
break;
}
return RT_EOK;
}
static rt_bool_t uart_is_transmit_empty(struct rt_uart_ls2k *uart_dev)
{
unsigned char status = UART_LSR(uart_dev->base);
if (status & (UARTLSR_TE | UARTLSR_TFE))
{
return TRUE;
......@@ -87,50 +97,35 @@ static rt_bool_t uart_is_transmit_empty(struct rt_uart_ls2k *uart_dev)
return FALSE;
}
}
static int ls2k_uart_putc(struct rt_serial_device *serial, char c)
{
struct rt_uart_ls2k *uart_dev = RT_NULL;
RT_ASSERT(serial != RT_NULL);
uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
while (FALSE == uart_is_transmit_empty(uart_dev))
;
UART_DAT(uart_dev->base) = c;
return 1;
}
static int ls2k_uart_getc(struct rt_serial_device *serial)
{
struct rt_uart_ls2k *uart_dev = RT_NULL;
RT_ASSERT(serial != RT_NULL);
uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
if (LSR_RXRDY & UART_LSR(uart_dev->base))
{
return UART_DAT(uart_dev->base);
}
return -1;
}
/* UART interrupt handler */
static void uart_irq_handler(int vector, void *param)
{
struct rt_serial_device *serial = (struct rt_serial_device *)param;
struct rt_uart_ls2k *uart_dev = RT_NULL;
RT_ASSERT(serial != RT_NULL);
uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
unsigned char iir = UART_IIR(uart_dev->base);
/* Find out interrupt reason */
if ((IIR_RXTOUT & iir) || (IIR_RXRDY & iir))
{
......@@ -138,9 +133,7 @@ static void uart_irq_handler(int vector, void *param)
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
rt_interrupt_leave();
}
}
static const struct rt_uart_ops ls2k_uart_ops =
{
ls2k_uart_configure,
......@@ -148,31 +141,41 @@ static const struct rt_uart_ops ls2k_uart_ops =
ls2k_uart_putc,
ls2k_uart_getc,
};
struct rt_uart_ls2k uart_dev0 =
{
(void *)UARTx_BASE(0),
LS2K_UART_0_1_2_3_IRQ,
};
struct rt_serial_device serial;
struct rt_uart_ls2k uart_dev4 =
{
(void *)UARTx_BASE(4),
LS2K_UART_4_5_6_7_IRQ,
};
struct rt_serial_device serial, serial4;
void rt_hw_uart_init(void)
{
struct rt_uart_ls2k *uart;
struct rt_uart_ls2k *uart, *uart4;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
uart = &uart_dev0;
uart4 = &uart_dev4;
serial.ops = &ls2k_uart_ops;
serial.config = config;
rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial, "UART");
serial.config = config_uart0;
serial4.ops = &ls2k_uart_ops;
serial4.config = config;
rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial, "UART0");
rt_hw_interrupt_install(uart4->IRQ, uart_irq_handler, &serial4, "UART4");
/* register UART device */
rt_hw_serial_register(&serial,
"uart",
"uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
rt_hw_serial_register(&serial4,
"uart4",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
&uart_dev4);
}
/*@}*/
bsp/ls2kdev/drivers/interrupt.c
浏览文件 @ 3ab2d4fb
......@@ -58,24 +58,24 @@ static void liointc_init(void)
//set irq mode
void liointc_set_irq_mode(int irq, int mode)
{
if(irq < 32)
if (irq < 32)
{
if(mode == PIN_IRQ_MODE_RISING)
if (mode == PIN_IRQ_MODE_RISING)
{
HWREG32(LIOINTC0_BASE + LIOINTC_REG_INTC_POL) |= (0x0 << (irq));
HWREG32(LIOINTC0_BASE + LIOINTC_REG_INTC_EDGE) |= (0x1 << (irq));
}
else if(mode == PIN_IRQ_MODE_FALLING)
else if (mode == PIN_IRQ_MODE_FALLING)
{
HWREG32(LIOINTC0_BASE + LIOINTC_REG_INTC_POL) |= (0x1 << (irq));
HWREG32(LIOINTC0_BASE + LIOINTC_REG_INTC_EDGE) |= (0x1 << (irq));
}
else if(mode == PIN_IRQ_MODE_HIGH_LEVEL)
else if (mode == PIN_IRQ_MODE_HIGH_LEVEL)
{
HWREG32(LIOINTC0_BASE + LIOINTC_REG_INTC_POL) |= (0x1 << (irq));
HWREG32(LIOINTC0_BASE + LIOINTC_REG_INTC_EDGE) |= (0x0 << (irq));
}
else if(mode == PIN_IRQ_MODE_LOW_LEVEL)
else if (mode == PIN_IRQ_MODE_LOW_LEVEL)
{
HWREG32(LIOINTC0_BASE + LIOINTC_REG_INTC_POL) |= (0x0 << (irq));
HWREG32(LIOINTC0_BASE + LIOINTC_REG_INTC_EDGE) |= (0x0 << (irq));
......@@ -88,22 +88,22 @@ void liointc_set_irq_mode(int irq, int mode)
}
else
{
if(mode == PIN_IRQ_MODE_RISING)
if (mode == PIN_IRQ_MODE_RISING)
{
HWREG32(LIOINTC1_BASE + LIOINTC_REG_INTC_POL) |= (0x0 << (irq - 32));
HWREG32(LIOINTC1_BASE + LIOINTC_REG_INTC_EDGE) |= (0x1 << (irq - 32));
}
else if(mode == PIN_IRQ_MODE_FALLING)
else if (mode == PIN_IRQ_MODE_FALLING)
{
HWREG32(LIOINTC1_BASE + LIOINTC_REG_INTC_POL) |= (0x1 << (irq - 32));
HWREG32(LIOINTC1_BASE + LIOINTC_REG_INTC_EDGE) |= (0x1 << (irq - 32));
}
else if(mode == PIN_IRQ_MODE_HIGH_LEVEL)
else if (mode == PIN_IRQ_MODE_HIGH_LEVEL)
{
HWREG32(LIOINTC1_BASE + LIOINTC_REG_INTC_POL) |= (0x1 << (irq - 32));
HWREG32(LIOINTC1_BASE + LIOINTC_REG_INTC_EDGE) |= (0x0 << (irq - 32));
}
else if(mode == PIN_IRQ_MODE_LOW_LEVEL)
else if (mode == PIN_IRQ_MODE_LOW_LEVEL)
{
HWREG32(LIOINTC1_BASE + LIOINTC_REG_INTC_POL) |= (0x0 << (irq - 32));
HWREG32(LIOINTC1_BASE + LIOINTC_REG_INTC_EDGE) |= (0x0 << (irq - 32));
......@@ -166,7 +166,7 @@ void rt_hw_interrupt_init(void)
}
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
void *param, const char *name)
void *param, const char *name)
{
rt_isr_handler_t old_handler = RT_NULL;
......@@ -181,7 +181,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
irq_handle_table[vector].param = param;
}
if(vector <= 32)
if (vector <= 32)
{
mips_unmask_cpu_irq(2);
}
......@@ -189,7 +189,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
{
mips_unmask_cpu_irq(3);
}
return old_handler;
}
......@@ -213,11 +213,11 @@ void rt_do_mips_cpu_irq(rt_uint32_t ip)
void rt_hw_interrupt_umask(int irq)
{
if(irq < LIOINTC0_IRQBASE + 32)
if (irq < LIOINTC0_IRQBASE + 32)
{
HWREG32(LIOINTC0_BASE + LIOINTC_REG_INTC_ENABLE) = (1 << irq);
}
else if(irq < LIOINTC1_IRQBASE + 32)
else if (irq < LIOINTC1_IRQBASE + 32)
{
HWREG32(LIOINTC1_BASE + LIOINTC_REG_INTC_ENABLE) = (1 << (irq - 32));
}
......@@ -225,11 +225,11 @@ void rt_hw_interrupt_umask(int irq)
void rt_hw_interrupt_mask(int irq)
{
if(irq < LIOINTC0_IRQBASE + 32)
if (irq < LIOINTC0_IRQBASE + 32)
{
HWREG32(LIOINTC0_BASE + LIOINTC_REG_INTC_DISABLE) = (1 << irq);
}
else if(irq < LIOINTC1_IRQBASE + 32)
else if (irq < LIOINTC1_IRQBASE + 32)
{
HWREG32(LIOINTC1_BASE + LIOINTC_REG_INTC_DISABLE) = (1 << (irq - 32));
}
......
bsp/ls2kdev/drivers/net/mii.c
浏览文件 @ 3ab2d4fb
......@@ -9,7 +9,7 @@
*/
#include "mii.h"
static inline unsigned int mii_nway_result (unsigned int negotiated)
static inline unsigned int mii_nway_result(unsigned int negotiated)
{
unsigned int ret;
......@@ -32,7 +32,8 @@ static int mii_check_gmii_support(struct mii_if_info *mii)
int reg;
reg = mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR);
if (reg & BMSR_ESTATEN) {
if (reg & BMSR_ESTATEN)
{
reg = mii->mdio_read(mii->dev, mii->phy_id, MII_ESTATUS);
if (reg & (ESTATUS_1000_TFULL | ESTATUS_1000_THALF))
return 1;
......@@ -43,7 +44,7 @@ static int mii_check_gmii_support(struct mii_if_info *mii)
static int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd)
{
struct synopGMACNetworkAdapter * dev = mii->dev;
struct synopGMACNetworkAdapter *dev = mii->dev;
u32 advert, bmcr, lpa, nego;
u32 advert2 = 0, bmcr2 = 0, lpa2 = 0;
......@@ -53,7 +54,7 @@ static int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd)
SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
if (mii->supports_gmii)
ecmd->supported |= SUPPORTED_1000baseT_Half |
SUPPORTED_1000baseT_Full;
SUPPORTED_1000baseT_Full;
/* only supports twisted-pair */
ecmd->port = PORT_MII;
......@@ -84,36 +85,43 @@ static int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd)
bmcr = mii->mdio_read(dev, mii->phy_id, MII_BMCR);
lpa = mii->mdio_read(dev, mii->phy_id, MII_LPA);
if (mii->supports_gmii) {
if (mii->supports_gmii)
{
bmcr2 = mii->mdio_read(dev, mii->phy_id, MII_CTRL1000);
lpa2 = mii->mdio_read(dev, mii->phy_id, MII_STAT1000);
}
if (bmcr & BMCR_ANENABLE) {
if (bmcr & BMCR_ANENABLE)
{
ecmd->advertising |= ADVERTISED_Autoneg;
ecmd->autoneg = AUTONEG_ENABLE;
nego = mii_nway_result(advert & lpa);
if ((bmcr2 & (ADVERTISE_1000HALF | ADVERTISE_1000FULL)) &
(lpa2 >> 2))
if ((bmcr2 & (ADVERTISE_1000HALF | ADVERTISE_1000FULL)) &
(lpa2 >> 2))
ecmd->speed = SPEED_1000;
else if (nego == LPA_100FULL || nego == LPA_100HALF)
ecmd->speed = SPEED_100;
else
ecmd->speed = SPEED_10;
if ((lpa2 & LPA_1000FULL) || nego == LPA_100FULL ||
nego == LPA_10FULL) {
nego == LPA_10FULL)
{
ecmd->duplex = DUPLEX_FULL;
mii->full_duplex = 1;
} else {
}
else
{
ecmd->duplex = DUPLEX_HALF;
mii->full_duplex = 0;
}
} else {
}
else
{
ecmd->autoneg = AUTONEG_DISABLE;
ecmd->speed = ((bmcr & BMCR_SPEED1000 &&
(bmcr & BMCR_SPEED100) == 0) ? SPEED_1000 :
(bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10);
ecmd->speed = ((bmcr & BMCR_SPEED1000 &&
(bmcr & BMCR_SPEED100) == 0) ? SPEED_1000 :
(bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10);
ecmd->duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
}
......@@ -122,7 +130,7 @@ static int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd)
return 0;
}
static int mii_link_ok (struct mii_if_info *mii)
static int mii_link_ok(struct mii_if_info *mii)
{
/* first, a dummy read, needed to latch some MII phys */
mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR);
......
bsp/ls2kdev/drivers/net/synopGMAC.c
浏览文件 @ 3ab2d4fb
......@@ -119,7 +119,7 @@ s32 synopGMAC_setup_tx_desc_queue(synopGMACdevice *gmacdev, u32 no_of_desc, u32
gmacdev->TxDescCount = 0;
first_desc = (DmaDesc *)plat_alloc_consistent_dmaable_memory(gmacdev, sizeof(DmaDesc) * (no_of_desc), &dma_addr);
if (first_desc == NULL)
{
rt_kprintf("Error in Tx Descriptors memory allocation\n");
......@@ -300,7 +300,7 @@ static rt_err_t eth_init(rt_device_t device)
{
struct eth_device *eth_device = (struct eth_device *)device;
RT_ASSERT(eth_device != RT_NULL);
s32 ijk;
s32 status = 0;
u64 dma_addr;
......@@ -490,7 +490,7 @@ rt_err_t rt_eth_tx(rt_device_t device, struct pbuf *p)
dma_addr = plat_dma_map_single(gmacdev, (void *)pbuf, p->tot_len);
status = synopGMAC_set_tx_qptr(gmacdev, dma_addr, p->tot_len, pbuf, 0, 0, 0, offload_needed, &index, dpr);
if (status < 0)
{
rt_kprintf("%s No More Free Tx Descriptors\n", __FUNCTION__);
......@@ -501,7 +501,7 @@ rt_err_t rt_eth_tx(rt_device_t device, struct pbuf *p)
}
synopGMAC_resume_dma_tx(gmacdev);
s32 desc_index;
u64 data1, data2;
......@@ -598,48 +598,48 @@ struct pbuf *rt_eth_rx(rt_device_t device)
}
/*Handle the Receive Descriptors*/
desc_index = synopGMAC_get_rx_qptr(gmacdev, &status, &dma_addr1, NULL, &data1, &dma_addr2, NULL, &data2);
desc_index = synopGMAC_get_rx_qptr(gmacdev, &status, &dma_addr1, NULL, &data1, &dma_addr2, NULL, &data2);
if (((u32)desc_index >= RECEIVE_DESC_SIZE) && (desc_index != -1))
{
rt_kprintf("host receive descriptor address pointer = 0x%08x\n", synopGMACReadReg(gmacdev->DmaBase, DmaRxCurrDesc));
rt_kprintf("host receive buffer = 0x%08x\n", synopGMACReadReg(gmacdev->DmaBase, DmaRxCurrAddr));
rt_kprintf("desc_index error!!!!,tick = %d\n", rt_tick_get());
while (1);
}
if(((u32)desc_index >= RECEIVE_DESC_SIZE) && (desc_index != -1))
if (desc_index >= 0 && data1 != 0)
{
DEBUG_MES("Received Data at Rx Descriptor %d for skb 0x%08x whose status is %08x\n", desc_index, dma_addr1, status);
if (synopGMAC_is_rx_desc_valid(status) || SYNOP_PHY_LOOPBACK)
{
rt_kprintf("host receive descriptor address pointer = 0x%08x\n",synopGMACReadReg(gmacdev->DmaBase,DmaRxCurrDesc));
rt_kprintf("host receive buffer = 0x%08x\n",synopGMACReadReg(gmacdev->DmaBase,DmaRxCurrAddr));
rt_kprintf("desc_index error!!!!,tick = %d\n",rt_tick_get());
while(1);
dma_addr1 = plat_dma_map_single(gmacdev, (void *)data1, RX_BUF_SIZE);
len = synopGMAC_get_rx_desc_frame_length(status) - 4; //Not interested in Ethernet CRC bytes
pbuf = pbuf_alloc(PBUF_LINK, len, PBUF_RAM);
if (pbuf == 0) rt_kprintf("===error in pbuf_alloc\n");
rt_memcpy(pbuf->payload, (char *)data1, len);
DEBUG_MES("==get pkg len: %d\n", len);
}
if (desc_index >= 0 && data1 != 0)
else
{
rt_kprintf("s: %08x\n", status);
adapter->synopGMACNetStats.rx_errors++;
adapter->synopGMACNetStats.collisions += synopGMAC_is_rx_frame_collision(status);
adapter->synopGMACNetStats.rx_crc_errors += synopGMAC_is_rx_crc(status);
adapter->synopGMACNetStats.rx_frame_errors += synopGMAC_is_frame_dribbling_errors(status);
adapter->synopGMACNetStats.rx_length_errors += synopGMAC_is_rx_frame_length_errors(status);
}
desc_index = synopGMAC_set_rx_qptr(gmacdev, dma_addr1, RX_BUF_SIZE, (u64)data1, 0, 0, 0);
if (desc_index < 0)
{
DEBUG_MES("Received Data at Rx Descriptor %d for skb 0x%08x whose status is %08x\n", desc_index, dma_addr1, status);
if (synopGMAC_is_rx_desc_valid(status) || SYNOP_PHY_LOOPBACK)
{
dma_addr1 = plat_dma_map_single(gmacdev, (void *)data1, RX_BUF_SIZE);
len = synopGMAC_get_rx_desc_frame_length(status)-4; //Not interested in Ethernet CRC bytes
pbuf = pbuf_alloc(PBUF_LINK, len, PBUF_RAM);
if (pbuf == 0) rt_kprintf("===error in pbuf_alloc\n");
rt_memcpy(pbuf->payload, (char *)data1, len);
DEBUG_MES("==get pkg len: %d\n", len);
}
else
{
rt_kprintf("s: %08x\n", status);
adapter->synopGMACNetStats.rx_errors++;
adapter->synopGMACNetStats.collisions += synopGMAC_is_rx_frame_collision(status);
adapter->synopGMACNetStats.rx_crc_errors += synopGMAC_is_rx_crc(status);
adapter->synopGMACNetStats.rx_frame_errors += synopGMAC_is_frame_dribbling_errors(status);
adapter->synopGMACNetStats.rx_length_errors += synopGMAC_is_rx_frame_length_errors(status);
}
desc_index = synopGMAC_set_rx_qptr(gmacdev, dma_addr1, RX_BUF_SIZE, (u64)data1, 0, 0, 0);
if (desc_index < 0)
{
#if SYNOP_RX_DEBUG
rt_kprintf("Cannot set Rx Descriptor for data1 %08x\n", (u32)data1);
rt_kprintf("Cannot set Rx Descriptor for data1 %08x\n", (u32)data1);
#endif
plat_free_memory((void *)data1);
}
plat_free_memory((void *)data1);
}
}
rt_sem_release(&sem_lock);
DEBUG_MES("%s : before return \n", __FUNCTION__);
return pbuf;
......@@ -930,7 +930,7 @@ int rt_hw_eth_init(void)
rt_kprintf("Error in Memory Allocataion, Founction : %s \n", __FUNCTION__);
}
memset((char *)synopGMACadapter, 0, sizeof(struct synopGMACNetworkAdapter));
synopGMACadapter->synopGMACdev = NULL;
synopGMACadapter->synopGMACdev = (synopGMACdevice *) plat_alloc_memory(sizeof(synopGMACdevice));
......@@ -940,13 +940,13 @@ int rt_hw_eth_init(void)
}
memset((char *)synopGMACadapter->synopGMACdev, 0, sizeof(synopGMACdevice));
/*
* Attach the device to MAC struct This will configure all the required base addresses
* such as Mac base, configuration base, phy base address(out of 32 possible phys)
* */
synopGMAC_attach(synopGMACadapter->synopGMACdev, (gmac_base + MACBASE), gmac_base + DMABASE, DEFAULT_PHY_BASE, mac_addr0);
init_phy(synopGMACadapter->synopGMACdev);
synopGMAC_reset(synopGMACadapter->synopGMACdev);
......@@ -980,7 +980,7 @@ int rt_hw_eth_init(void)
eth_dev.parent.eth_tx = rt_eth_tx;
eth_dev.parent.eth_rx = rt_eth_rx;
eth_device_init(&(eth_dev.parent), "e0");
eth_device_linkchange(&eth_dev.parent, RT_TRUE); //linkup the e0 for lwip to check
return 0;
......
bsp/ls2kdev/drivers/net/synopGMAC_plat.c
浏览文件 @ 3ab2d4fb
......@@ -33,49 +33,52 @@ void flush_cache(unsigned long start_addr, unsigned long size)
}
//convert virtual address to physical address
dma_addr_t __attribute__((weak)) gmac_dmamap(unsigned long va,u32 size)
dma_addr_t __attribute__((weak)) gmac_dmamap(unsigned long va, u32 size)
{
return VA_TO_PA (va);
return VA_TO_PA(va);
//return UNCACHED_TO_PHYS(va);
}
/**
* This is a wrapper function for Memory allocation routine. In linux Kernel
* This is a wrapper function for Memory allocation routine. In linux Kernel
* it it kmalloc function
* @param[in] bytes in bytes to allocate
*/
void *plat_alloc_memory(u32 bytes)
void *plat_alloc_memory(u32 bytes)
{
//return (void*)malloc((size_t)bytes, M_DEVBUF, M_DONTWAIT);
void *buf = (void*)rt_malloc((u32)bytes);
void *buf = (void *)rt_malloc((u32)bytes);
flush_cache((unsigned long)buf, bytes);
return buf;
}
/**
* This is a wrapper function for consistent dma-able Memory allocation routine.
* This is a wrapper function for consistent dma-able Memory allocation routine.
* In linux Kernel, it depends on pci dev structure
* @param[in] bytes in bytes to allocate
*/
//allocate a space aligned to 16-byte boundary without cache
void *plat_alloc_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, u32 *addr)
void *plat_alloc_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, u32 *addr)
{
void *buf;
buf = (void*)rt_malloc((u32)(size + 16));
buf = (void *)rt_malloc((u32)(size + 16));
//CPU_IOFlushDCache( buf,size, SYNC_W);
unsigned long i = (unsigned long)buf;
// rt_kprintf("size = %d\n", size);
// rt_kprintf("bufaddr = %p\n", buf);
// rt_kprintf("i%%16 == %d\n", i%16);
if(i % 16 == 8){
if (i % 16 == 8)
{
i += 8;
}
else if(i % 16 == 4){
else if (i % 16 == 4)
{
i += 12;
}
else if(i % 16 == 12){
else if (i % 16 == 12)
{
i += 4;
}
......@@ -91,26 +94,26 @@ void *plat_alloc_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, u3
* In linux Kernel, it depends on pci dev structure
* @param[in] bytes in bytes to allocate
*/
//void plat_free_consistent_dmaable_memory(void * addr)
void plat_free_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, void * addr,u64 dma_addr)
//void plat_free_consistent_dmaable_memory(void * addr)
void plat_free_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, void *addr, u64 dma_addr)
{
rt_free((void*)PHYS_TO_CACHED(UNCACHED_TO_PHYS(addr)));
rt_free((void *)PHYS_TO_CACHED(UNCACHED_TO_PHYS(addr)));
return;
}
/**
* This is a wrapper function for Memory free routine. In linux Kernel
* This is a wrapper function for Memory free routine. In linux Kernel
* it it kfree function
* @param[in] buffer pointer to be freed
*/
void plat_free_memory(void *buffer)
void plat_free_memory(void *buffer)
{
rt_free(buffer);
return ;
}
//convert virtual address to physical address and flush cache
dma_addr_t plat_dma_map_single(void *hwdev,void *ptr,u32 size)
dma_addr_t plat_dma_map_single(void *hwdev, void *ptr, u32 size)
{
unsigned long addr = (unsigned long) ptr;
//CPU_IOFlushDCache(addr,size, direction);
......@@ -119,8 +122,8 @@ dma_addr_t plat_dma_map_single(void *hwdev,void *ptr,u32 size)
}
/**
* This is a wrapper function for platform dependent delay
* Take care while passing the argument to this function
* This is a wrapper function for platform dependent delay
* Take care while passing the argument to this function
* @param[in] buffer pointer to be freed
*/
void plat_delay(u32 delay)
......
bsp/ls2kdev/rtconfig.h
浏览文件 @ 3ab2d4fb
......@@ -99,6 +99,7 @@
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
#define RT_USING_SPI
/* Using USB */
......
components/drivers/Kconfig
浏览文件 @ 3ab2d4fb
......@@ -97,7 +97,7 @@ if RT_USING_I2C
default y
if RT_USING_I2C_BITOPS
config RT_I2C_BITOPS_DEBUG
config RT_I2C_BITOPS_DEBUG
bool "Use simulate I2C debug message"
default n
endif
......
components/drivers/audio/audio_pipe.c
浏览文件 @ 3ab2d4fb
......@@ -9,6 +9,7 @@
*/
#include <rthw.h>
#include <rtdevice.h>
#include "audio_pipe.h"
static void _rt_pipe_resume_writer(struct rt_audio_pipe *pipe)
......
components/drivers/i2c/i2c-bit-ops.c
浏览文件 @ 3ab2d4fb
......@@ -375,8 +375,6 @@ static rt_size_t i2c_bit_xfer(struct rt_i2c_bus_device *bus,
rt_int32_t i, ret;
rt_uint16_t ignore_nack;
LOG_D("send start condition");
i2c_start(ops);
for (i = 0; i < num; i++)
{
msg = &msgs[i];
......@@ -387,6 +385,11 @@ static rt_size_t i2c_bit_xfer(struct rt_i2c_bus_device *bus,
{
i2c_restart(ops);
}
else
{
LOG_D("send start condition");
i2c_start(ops);
}
ret = i2c_bit_send_address(bus, msg);
if ((ret != RT_EOK) && !ignore_nack)
{
......@@ -423,8 +426,11 @@ static rt_size_t i2c_bit_xfer(struct rt_i2c_bus_device *bus,
ret = i;
out:
LOG_D("send stop condition");
i2c_stop(ops);
if (!(msg->flags & RT_I2C_NO_STOP))
{
LOG_D("send stop condition");
i2c_stop(ops);
}
return ret;
}
......
components/drivers/include/drivers/i2c.h
浏览文件 @ 3ab2d4fb
......@@ -23,6 +23,7 @@ extern "C" {
#define RT_I2C_NO_START (1u << 4)
#define RT_I2C_IGNORE_NACK (1u << 5)
#define RT_I2C_NO_READ_ACK (1u << 6) /* when I2C reading, we do not ACK */
#define RT_I2C_NO_STOP (1u << 7)
struct rt_i2c_msg
{
......@@ -83,6 +84,17 @@ rt_size_t rt_i2c_master_recv(struct rt_i2c_bus_device *bus,
rt_uint16_t flags,
rt_uint8_t *buf,
rt_uint32_t count);
rt_inline rt_err_t rt_i2c_bus_lock(struct rt_i2c_bus_device *bus, rt_tick_t timeout)
{
return rt_mutex_take(&bus->lock, timeout);
}
rt_inline rt_err_t rt_i2c_bus_unlock(struct rt_i2c_bus_device *bus)
{
return rt_mutex_release(&bus->lock);
}
int rt_i2c_core_init(void);
#ifdef __cplusplus
......
components/net/netdev/src/netdev.c
浏览文件 @ 3ab2d4fb
......@@ -887,7 +887,7 @@ static void netdev_list_if(void)
rt_kprintf("%02x ", netdev->hwaddr[index]);
}
}
else if (netdev->hwaddr_len == NETDEV_IFCONFIG_IEMI_MAX_LEN)
else if (netdev->hwaddr_len == NETDEV_IFCONFIG_IMEI_MAX_LEN)
{
rt_kprintf("IMEI: ");
for (index = 0; index < netdev->hwaddr_len; index++)
......
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