lib_u32k.c 8.4 KB
Newer Older
F
FuChao 已提交
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317
/**
  ******************************************************************************
  * @file    lib_u32k.c 
  * @author  Application Team
  * @version V4.5.0
  * @date    2019-05-14
  * @brief   UART 32K library.
  ******************************************************************************
  * @attention
  *
  ******************************************************************************
  */
#include "lib_u32k.h"

#define U32K_STS_Msk            (0x7UL)
#define U32K_CTRL0_RSTValue     (0UL)
#define U32K_CTRL1_RSTValue     (0UL)
#define U32K_PHASE_RSTValue     (0x4B00UL)

/**
  * @brief  Initializes the U32Kx peripheral registers to their default reset 
            values.
  * @param  U32Kx: U32K0~U32K1
  * @retval None
  */
void U32K_DeInit(U32K_TypeDef *U32Kx)
{
  /* Check parameters */
  assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  
  /* Disable U32K */
  U32Kx->CTRL0 &= ~U32K_CTRL0_EN;
  /* clear interrupt status */
  U32Kx->STS = U32K_STS_Msk;
  /* write default reset values */
  U32Kx->CTRL0 = U32K_CTRL0_RSTValue;
  U32Kx->CTRL1 = U32K_CTRL1_RSTValue;
  U32Kx->PHASE = U32K_PHASE_RSTValue;
}
                    
/**
  * @brief  U32K initialization.
  * @param  U32Kx:
                U32K0~U32K1
            InitStruct: U32K configuration
                Debsel:
                    U32K_DEBSEL_0
                    U32K_DEBSEL_1
                    U32K_DEBSEL_2
                    U32K_DEBSEL_3
                Parity:
                    U32K_PARITY_EVEN
                    U32K_PARITY_ODD
                    U32K_PARITY_0
                    U32K_PARITY_1
                    U32K_PARITY_NONE
                WordLen:
                    U32K_WORDLEN_8B
                    U32K_WORDLEN_9B
                FirstBit:
                    U32K_FIRSTBIT_LSB
                    U32K_FIRSTBIT_MSB
                AutoCal:
                    U32K_AUTOCAL_ON
                    U32K_AUTOCAL_OFF
                LineSel:
                    U32K_LINE_RX0
                    U32K_LINE_RX1
                    U32K_LINE_RX2
                    U32K_LINE_RX3
                Baudrate: Baudrate value
  * @retval None
  */
void U32K_Init(U32K_TypeDef *U32Kx, U32K_InitType *InitStruct)
{
  uint32_t tmp_reg1, tmp_reg2;
  
  /* Check parameters */
  assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  assert_parameters(IS_U32K_DEBSEL(InitStruct->Debsel));
  assert_parameters(IS_U32K_PARITY(InitStruct->Parity));
  assert_parameters(IS_U32K_WORDLEN(InitStruct->WordLen));
  assert_parameters(IS_U32K_FIRSTBIT(InitStruct->FirstBit));
  assert_parameters(IS_U32K_AUTOCAL(InitStruct->AutoCal));
  assert_parameters(IS_U32K_LINE(InitStruct->LineSel));
  assert_parameters(IS_U32K_BAUDRATE(InitStruct->Baudrate));
    
  tmp_reg1 = U32Kx->CTRL0;
  tmp_reg1 &= ~(U32K_CTRL0_DEBSEL\
               |U32K_CTRL0_PMODE\
               |U32K_CTRL0_MODE\
               |U32K_CTRL0_MSB\
               |U32K_CTRL0_ACOFF);
  tmp_reg1 |= (InitStruct->Debsel\
              |InitStruct->Parity\
              |InitStruct->WordLen\
              |InitStruct->FirstBit\
              |InitStruct->AutoCal);
  U32Kx->CTRL0 = tmp_reg1;
  if ((RTC->PSCA & RTC_PSCA_PSCA) == RTC_PSCA_PSCA_0) //RTCCLK 32768Hz
    U32Kx->PHASE = 65536*InitStruct->Baudrate/32768;
  else if ((RTC->PSCA & RTC_PSCA_PSCA) == RTC_PSCA_PSCA_1) //RTCCLK 8192Hz
    U32Kx->PHASE = 65536*InitStruct->Baudrate/8192;
  else
    assert_parameters(0);
    
  tmp_reg2 = U32Kx->CTRL1;
  tmp_reg2 &= ~(U32K_CTRL1_RXSEL);
  tmp_reg2 |= (InitStruct->LineSel);
  U32Kx->CTRL1 = tmp_reg2;
}

/**
  * @brief  Fills each U32K_InitType member with its default value.
  * @param  InitStruct: pointer to an U32K_InitType structure which will be initialized.
  * @retval None
  */
void U32K_StructInit(U32K_InitType *InitStruct)
{
  /*-------------- Reset U32K init structure parameters values ---------------*/
  /* Initialize the AutoCal member */
  InitStruct->AutoCal = U32K_AUTOCAL_ON;
  /* Initialize the Baudrate member */
  InitStruct->Baudrate = 9600;
  /* Initialize the Debsel member */
  InitStruct->Debsel = U32K_DEBSEL_0;
  /* Initialize the FirstBit member */
  InitStruct->FirstBit = U32K_FIRSTBIT_LSB;
  /* Initialize the LineSel member */
  InitStruct->LineSel = U32K_LINE_RX0;  
  /* Initialize the Parity member */
  InitStruct->Parity = U32K_PARITY_NONE;
  /* Initialize the Parity member */
  InitStruct->WordLen = U32K_WORDLEN_8B;
}

/**
  * @brief  U32K interrupt configuration.
  * @param  U32Kx:
                U32K0~U32K1
            INTMask: can use the | operator
                U32K_INT_RXOV
                U32K_INT_RXPE
                U32K_INT_RX 
            NewState:
                ENABLE
                DISABLE
  * @retval None
  */
void U32K_INTConfig(U32K_TypeDef *U32Kx, uint32_t INTMask, uint8_t NewState)
{
  uint32_t tmp;
  
  /* Check parameters */
  assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  assert_parameters(IS_U32K_INT(INTMask));
  assert_parameters(IS_FUNCTIONAL_STATE(NewState));
    
  tmp = U32Kx->CTRL1;
  tmp &= ~INTMask;
  if (NewState == ENABLE)
  {
    tmp |= INTMask;
  }
  U32Kx->CTRL1 = tmp;
}

/**
  * @brief  Get interrupt flag status.
  * @param  U32Kx:
                U32K0~U32K1
            INTMask:
                U32K_INTSTS_RXOV
                U32K_INTSTS_RXPE
                U32K_INTSTS_RX 
  * @retval Flag status
  */
uint8_t U32K_GetINTStatus(U32K_TypeDef *U32Kx, uint32_t INTMask)
{
  /* Check parameters */
  assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  assert_parameters(IS_U32K_INTFLAGR(INTMask));
  
  if (U32Kx->STS&INTMask)
    return 1;
  else
    return 0;
}

/**
  * @brief  Clear flag status.
  * @param  U32Kx:
                U32K0~U32K1
            INTMask: can use the | operator
                U32K_INTSTS_RXOV
                U32K_INTSTS_RXPE
                U32K_INTSTS_RX 
  * @retval None
  */
void U32K_ClearINTStatus(U32K_TypeDef *U32Kx, uint32_t INTMask)
{
  /* Check parameters */
  assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  assert_parameters(IS_U32K_INTFLAGC(INTMask));
  
  U32Kx->STS = INTMask;
}

/**
  * @brief  Read receive data register.
  * @param  U32Kx:
                U32K0~U32K1
  * @retval Receive data value
  */
uint8_t U32K_ReceiveData(U32K_TypeDef *U32Kx)
{
  /* Check parameters */
  assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  
  return (U32Kx->DATA);
}

/**
  * @brief  U32K Baudrate control.
  * @param  U32Kx: U32K0~U32K1
            BaudRate: Baudrate value
  * @retval None
  */
void U32K_BaudrateConfig(U32K_TypeDef *U32Kx, uint32_t BaudRate)
{
  /* Check parameters */
  assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  assert_parameters(IS_U32K_BAUDRATE(BaudRate));
  
  if ((RTC->PSCA & RTC_PSCA_PSCA) == RTC_PSCA_PSCA_0) //RTCCLK 32768Hz
    U32Kx->PHASE = 65536*BaudRate/32768;
  else if ((RTC->PSCA & RTC_PSCA_PSCA) == RTC_PSCA_PSCA_1) //RTCCLK 8192Hz
    U32Kx->PHASE = 65536*BaudRate/8192;
  else
    assert_parameters(0);
}

/**
  * @brief  U32K controlller enable.
  * @param  U32Kx:
                U32K0~U32K1
            NewState:
                ENABLE
                DISABLE
  * @retval None
  */
void U32K_Cmd(U32K_TypeDef *U32Kx, uint32_t NewState)
{
  uint32_t tmp;
  
  /* Check parameters */
  assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  assert_parameters(IS_FUNCTIONAL_STATE(NewState));
  
  tmp = U32Kx->CTRL0;
  tmp &= ~(U32K_CTRL0_EN);
  if (NewState == ENABLE)
  {
    tmp |= U32K_CTRL0_EN;
  }
  U32Kx->CTRL0 = tmp;
}

/**
  * @brief  U32K receive line selection.
  * @param  U32Kx:
                U32K0~U32K1
            Line:
                U32K_LINE_RX0
                U32K_LINE_RX1 
                U32K_LINE_RX2 
                U32K_LINE_RX3 
  * @retval None
  */
void U32K_LineConfig(U32K_TypeDef *U32Kx, uint32_t Line)
{
  uint32_t tmp;
  
  /* Check parameters */
  assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  assert_parameters(IS_U32K_LINE(Line));  
    
  tmp = U32Kx->CTRL1;
  tmp &= ~U32K_CTRL1_RXSEL;
  tmp |= Line;
  U32Kx->CTRL1 = tmp;
}

/**
  * @brief  Wake-up mode configure.
  * @param  U32Kx:
                U32K0~U32K1
            WKUMode:
                U32K_WKUMOD_RX
                U32K_WKUMOD_PC
  * @retval None
  */
void U32K_WKUModeConfig(U32K_TypeDef *U32Kx, uint32_t WKUMode)
{
  uint32_t tmp;
  
  /* Check parameters */
  assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  assert_parameters(IS_U32K_WKUMODE(WKUMode));
  
  tmp = U32Kx->CTRL0;
  tmp &= ~U32K_CTRL0_WKUMODE;
  tmp |= WKUMode;
  U32Kx->CTRL0 = tmp;
}

/*********************************** END OF FILE ******************************/