asm9260t.ini

//------------------------------------------------
// SDRAM initialization script for the ASM9260T
//------------------------------------------------

FUNC void __setup_PLL()
{
	printf( "Enabling PLL for CPU\n");

	// outl(1<<2, REG_SET(HW_AHBCLKCTRL0));
	_WDWORD(0x80040024, 0x00000004);
	// outl(1<<8, REG_SET(HW_AHBCLKCTRL1));
	_WDWORD(0x80040034, 0x00000100);
	// outl(3<<9, REG_SET(HW_AHBCLKCTRL0));
	_WDWORD(0x80040024, 0x00000600);
	// outl(inl(HW_PDRUNCFG)&0xFFFFFFFA, HW_PDRUNCFG);
	_WDWORD(0x80040238, 0x00000770);
	// outl(2, HW_CPUCLKDIV);
	_WDWORD(0x8004017C, 0x00000002);
	// outl(2, HW_SYSAHBCLKDIV);
	_WDWORD(0x80040180, 0x00000002);
	// outl(480, HW_SYSPLLCTRL);
	_WDWORD(0x80040100, 0x000001E0);
	_sleep_(500);
	// outl(1, HW_MAINCLKSEL);
	_WDWORD(0x80040120, 0x00000001);
	// outl(0, HW_MAINCLKUEN);
	_WDWORD(0x80040124, 0x00000000);
	// outl(1, HW_MAINCLKUEN);
	_WDWORD(0x80040124, 0x00000001);
}


FUNC void __setup_SDRAM()
{
	printf( "Enabling on-chip SDRAM\n");

	// outl((1<<6), REG_SET(HW_AHBCLKCTRL0));
	_WDWORD(0x80040024, 0x00000040);
	// outl(0x00001188, HW_EMI_SCONR);
	_WDWORD(0x80700000, 0x00001188);
	// outl(0x000a0500, HW_EMI_CTRL);
	_WDWORD(0x8004034c, 0x000a0500);
	// outl(0x20000000, HW_EMI_SCSLR2_LOW);
	_WDWORD(0x8070001c, 0x20000000);
	// outl(0x0000000c, HW_EMI_SMSKR2);
	_WDWORD(0x8070005c, 0x0000000c);
	// outl(0x024996d9, HW_EMI_STMG0R);
	_WDWORD(0x80700004, 0x024996d9);
	// outl(0x00542b4f, HW_EMI_SMTMGR_SET0);
	_WDWORD(0x80700094, 0x00542b4f);
	// outl(0x00003288, HW_EMI_SCTLR);
	_WDWORD(0x8070000c, 0x00003288);
}

printf( "------- Prepare for debug ASM9260T -------");
__setup_PLL();
__setup_SDRAM();
DEBUG_CLOCK = 2000000;
LOAD Objects\\template.axf INCREMENTAL
PC = 0x20000000;
g,main