- 29 9月, 2016 12 次提交
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由 Diego Biurrun 提交于
ptrdiff_t is the correct type for array strides and similar.
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由 Diego Biurrun 提交于
ptrdiff_t is the correct type for array strides and similar.
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由 Diego Biurrun 提交于
This avoids SIMD-optimized functions having to sign-extend their stride argument manually to be able to do pointer arithmetic.
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由 Diego Biurrun 提交于
ptrdiff_t is the correct type for array strides and similar.
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由 Diego Biurrun 提交于
ptrdiff_t is the correct type for array strides and similar.
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由 Diego Biurrun 提交于
ptrdiff_t is the correct type for array strides and similar. Also rename all such parameters to "stride" for consistency.
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由 Diego Biurrun 提交于
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由 Diego Biurrun 提交于
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由 Mark Thompson 提交于
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由 Mark Thompson 提交于
While outwardly bizarre, this change makes the behaviour consistent with other VAAPI encoders which sync to the encode /input/ picture in order to wait for /output/ from the encoder. It is not harmful on i965 (because synchronisation already happens in vaRenderPicture(), so it has no effect there), and it allows the encoder to work on mesa/gallium which assumes this behaviour.
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由 Mark Thompson 提交于
This improves behaviour with drivers which do not support packed headers, such as AMD VCE on mesa/gallium.
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由 Mark Thompson 提交于
This allows better checking of capabilities and will make it easier to add more functionality later. It also commonises some duplicated code around rate control setup and adds more comments explaining the internals.
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- 28 9月, 2016 12 次提交
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由 Anton Khirnov 提交于
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由 Anton Khirnov 提交于
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由 Anton Khirnov 提交于
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由 Anton Khirnov 提交于
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由 Anton Khirnov 提交于
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由 Anton Khirnov 提交于
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由 Anton Khirnov 提交于
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由 Luca Barbato 提交于
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由 Luca Barbato 提交于
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由 Luca Barbato 提交于
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由 Luca Barbato 提交于
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由 Luca Barbato 提交于
It is used to select functions that work with 9-15bits.
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- 27 9月, 2016 2 次提交
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由 Luca Barbato 提交于
Make sure the scaling functions for the 9-15bits are used for 9-15bits bit depths correctly.
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由 Vittorio Giovara 提交于
Follow a 420, 422, 444 order instead of a random one. This simplifies double-checking additions of new formats. Signed-off-by: NDiego Biurrun <diego@biurrun.de>
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- 25 9月, 2016 4 次提交
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由 Yogender Gupta 提交于
Signed-off-by: NLuca Barbato <lu_zero@gentoo.org> Signed-off-by: NDiego Biurrun <diego@biurrun.de>
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由 Yogender Gupta 提交于
Signed-off-by: NLuca Barbato <lu_zero@gentoo.org> Signed-off-by: NDiego Biurrun <diego@biurrun.de>
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由 Yogender Gupta 提交于
Signed-off-by: NLuca Barbato <lu_zero@gentoo.org> Signed-off-by: NDiego Biurrun <diego@biurrun.de> Signed-off-by: NLuca Barbato <lu_zero@gentoo.org>
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由 Luca Barbato 提交于
And use a macro to reduce the boilerplate. Signed-off-by: NLuca Barbato <lu_zero@gentoo.org> Signed-off-by: NDiego Biurrun <diego@biurrun.de> Signed-off-by: NLuca Barbato <lu_zero@gentoo.org>
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- 22 9月, 2016 7 次提交
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由 Anton Khirnov 提交于
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由 Anton Khirnov 提交于
This will make the x86 asm simpler. ARM conversion by Martin Storsjö <martin@martin.st> and Janne Grunau <janne-libav@jannau.net>
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由 Anton Khirnov 提交于
The x86 version processes 16 floats per iteration, so len must be a multiple of 16.
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由 Anton Khirnov 提交于
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由 Anton Khirnov 提交于
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由 Anton Khirnov 提交于
It has no effect, since the code is supposed to operate the same way for any bit depth.
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由 Yogender Kumar Gupta 提交于
Signed-off-by: NAnton Khirnov <anton@khirnov.net>
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- 20 9月, 2016 2 次提交
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由 Anton Khirnov 提交于
Also change shl to add, since it can be faster on some CPUs. CC: libav-stable@libav.org
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由 Anton Khirnov 提交于
This version, which is the only one doing two processing cycles per loop iteration, computes the load/store indices incorrectly for the second cycle. CC: libav-stable@libav.org
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- 19 9月, 2016 1 次提交
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由 Alexandra Hájková 提交于
Signed-off-by: NLuca Barbato <lu_zero@gentoo.org>
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