This should allow using more complex allocators than simple malloc
wrappers.

Needed to declare 32-byte long constants
Signed-off-by: NJames Almer <jamrial@gmail.com>
Signed-off-by: NLuca Barbato <lu_zero@gentoo.org>

Some debuggers/profilers use this metadata to determine which function a
given instruction is in; without it they get can confused by local labels
(if you haven't stripped those). On the other hand, some tools are still
confused even with this metadata. e.g. this fixes `gdb`, but not `perf`.

Currently only implemented for ELF.
Signed-off-by: NAnton Khirnov <anton@khirnov.net>

The REP_RET workaround is only needed on old AMD cpus, and the labels clutter
up the symbol table and confuse debugging/profiling tools, so use EQU to
create SHN_ABS symbols instead of creating local labels. Furthermore, skip
the workaround completely in functions that definitely won't run on such cpus.

Note that EQU is just creating a local label when using nasm instead of yasm.
This is probably a bug, but at least it doesn't break anything.
Signed-off-by: NAnton Khirnov <anton@khirnov.net>

cpuflags is never undefined any more, it's set to 0 instead.

Also fix an incorrect comment.
Signed-off-by: NAnton Khirnov <anton@khirnov.net>

Signed-off-by: NAnton Khirnov <anton@khirnov.net>

When allocating stack space with a larger alignment than the known stack
alignment a temporary register is used for storing the stack pointer.
Ensure that this isn't one of the registers used for passing arguments.
Signed-off-by: NAnton Khirnov <anton@khirnov.net>

 * Correctly handle FMA instructions with memory operands.
 * Print a warning if FMA instructions are used without the correct cpuflag.
 * Simplify the instantiation code.
 * Clarify documentation.

Only the last operand in FMA3 instructions can be a memory operand. When
converting FMA4 instructions to FMA3 instructions we can utilize the fact
that multiply is a commutative operation and reorder operands if necessary
to ensure that a memory operand is used only as the last operand.
Signed-off-by: NAnton Khirnov <anton@khirnov.net>

Signed-off-by: NAnton Khirnov <anton@khirnov.net>

Makes it possible to use them in arithmetic expressions.
Signed-off-by: NAnton Khirnov <anton@khirnov.net>

The parameters in the docs are currently swapped.

Signed-off-by: NVittorio Giovara <vittorio.giovara@gmail.com>

This fixes builds with --disable-vfp.

Checking for the armv6 cpu flag is incorrect, since vfpv2 isn't
armv6 specific.
Signed-off-by: NMartin Storsjö <martin@martin.st>

The vector mode was deprecated in ARMv7-A/VFPv3 and various cpu
implementations do not support it in hardware. Vector mode code will
depending the OS either be emulated in software or result in an illegal
instruction on cpus which does not support it. This was not really
problem in practice since NEON implementations of the same functions are
preferred. It will however become a problem for checkasm which tests
every cpu flag separately.

Since this is a cpu feature newer cpu do not support anymore the
behaviour of this flag differs from the other flags. It can be only
activated by runtime cpu feature selection.

The ISB (instruction synchronization barrier) might be too heavy for
START/STOPTIMER use but should be more accurate in checkasm where the
timing overhead is subtracted.

Include macros.h explicitly in common.h so that external code using
FFALIGN does not break. It was already implicitly included through
version.h. Include macros.h in lls.h and internal.h for FFALIGN.
lls.h was including common.h only for FFALIGN and internal.h was
missing the include for FFALIGN. `make checkheaders` did not catch it
because it's an internal header.

Signed-off-by: NMartin Storsjö <martin@martin.st>

Signed-off-by: NMartin Storsjö <martin@martin.st>

av_dict_set() could return an error, so forward it appropriately.
Signed-off-by: NVittorio Giovara <vittorio.giovara@gmail.com>

They're short enough that inlining them actually reduces code size due to
all the overhead associated with making a function call.
Signed-off-by: NAnton Khirnov <anton@khirnov.net>

These field are difficult to interpret, and are provided by a single
encoder (mpegvideoenc). In general they do not belong to a structure
containing raw data only, so remove them from AVFrame.

Mpegvideoenc now uses a private field in Picture for its internal
computations.
Signed-off-by: NVittorio Giovara <vittorio.giovara@gmail.com>

MIPS R6 supports unaligned memory access and does not have
the load/store-left/right family of instructions.

Signed-off-by: Vicente Olivert Riera <Vincent.Riera at imgtec.com>
Signed-off-by: Luca Barbato <lu_zero at gentoo.org>
Signed-off-by: NLuca Barbato <lu_zero@gentoo.org>

Appeared in ITU-T Rec H.265 10/2014.
Signed-off-by: NVittorio Giovara <vittorio.giovara@gmail.com>

Signed-off-by: NLuca Barbato <lu_zero@gentoo.org>

Ensure that the components are ordered consistently, ie. always
RGB(A) and YUV(A). This allows to identify a specific plane on a given
pixel format without hard-coding knowledge of the plane order.
Signed-off-by: NLuca Barbato <lu_zero@gentoo.org>

The new fields can be accessed directly and are more intelligible.
Signed-off-by: NVittorio Giovara <vittorio.giovara@gmail.com>

There is no practical benefit in having this structure elements
bit packed given the size of the structure and its usage.
Change types from uint16_t (packed) to plain int in order to simplify
modifying the structure and accessing its fields.
Signed-off-by: NVittorio Giovara <vittorio.giovara@gmail.com>

Signed-off-by: NVittorio Giovara <vittorio.giovara@gmail.com>

Signed-off-by: NVittorio Giovara <vittorio.giovara@gmail.com>