arm: make ff_mlp_filter_channel_arm and ff_mlp_rematrix_channel_arm position independent

No significant difference in used cpu cycles on a cortex-a9.

libavcodec/arm/mlpdsp_armv5te.S

@@ -338,22 +338,23 @@ T       orr     AC0, AC0, AC1
 .endm
 
 .macro switch_on_fir_taps  mask_minus1, shift_0, shift_8, iir_taps
-A       ldr     pc, [pc, a3, lsl #2] // firorder is in range 0-(8-iir_taps)
+A       ldr     CO0, [pc, a3, lsl #2]   // firorder is in range 0-(8-iir_taps)
+A       add     pc,  pc,  CO0
 T       tbh     [pc, a3, lsl #1]
 0:
-A       .word   0, 70f, 71f, 72f, 73f, 74f
+A       .word   (70f - 0b) - 4, (71f - 0b) - 4, (72f - 0b) - 4, (73f - 0b) - 4, (74f - 0b) - 4
 T       .hword  (70f - 0b) / 2, (71f - 0b) / 2, (72f - 0b) / 2, (73f - 0b) / 2, (74f - 0b) / 2
  .if \iir_taps <= 3
-A       .word   75f
+A       .word   (75f - 0b) - 4
 T       .hword  (75f - 0b) / 2
   .if \iir_taps <= 2
-A       .word   76f
+A       .word   (76f - 0b) - 4
 T       .hword  (76f - 0b) / 2
    .if \iir_taps <= 1
-A       .word   77f
+A       .word   (77f - 0b) - 4
 T       .hword  (77f - 0b) / 2
     .if \iir_taps == 0
-A       .word   78f
+A       .word   (78f - 0b) - 4
 T       .hword  (78f - 0b) / 2
     .endif
    .endif
@@ -379,10 +380,11 @@ T       .hword  (78f - 0b) / 2
 .endm
 
 .macro switch_on_iir_taps  mask_minus1, shift_0, shift_8
-A       ldr     pc, [pc, a4, lsl #2] // irorder is in range 0-4
+A       ldr     CO0, [pc, a4, lsl #2]   // irorder is in range 0-4
+A       add     pc,  pc,  CO0
 T       tbh     [pc, a4, lsl #1]
 0:
-A       .word   0, 60f, 61f, 62f, 63f, 64f
+A       .word   (60f - 0b) - 4, (61f - 0b) - 4, (62f - 0b) - 4, (63f - 0b) - 4, (64f - 0b) - 4
 T       .hword  (60f - 0b) / 2, (61f - 0b) / 2, (62f - 0b) / 2, (63f - 0b) / 2, (64f - 0b) / 2
 60:     switch_on_fir_taps  \mask_minus1, \shift_0, \shift_8, 0
 61:     switch_on_fir_taps  \mask_minus1, \shift_0, \shift_8, 1
@@ -604,10 +606,11 @@ function ff_mlp_rematrix_channel_arm, export=1
         cmp     v5, #1
         beq     11f
         blo     10f
-A       ldr     pc, [pc, v5, lsl #2]
+A       ldr     v5,  [pc,  v5,  lsl #2]
+A       add     pc,  pc,  v5
 T       tbh     [pc, v5, lsl #1]
 0:
-A       .word   0, 0, 0, 12f, 13f, 14f, 15f, 16f, 17f, 18f, 19f, 20f, 21f, 22f, 23f, 24f, 25f
+A       .word   0, 0, (12f - 0b) - 4, (13f - 0b) - 4, (14f - 0b) - 4, (15f - 0b) - 4, (16f - 0b) - 4, (17f - 0b) - 4, (18f - 0b) - 4, (19f - 0b) - 4, (20f - 0b) - 4, (21f - 0b) - 4, (22f - 0b) - 4, (23f - 0b) - 4, (24f - 0b) - 4, (25f - 0b) - 4
 T       .hword  0, 0, (12f - 0b) / 2, (13f - 0b) / 2, (14f - 0b) / 2, (15f - 0b) / 2
 T       .hword  (16f - 0b) / 2, (17f - 0b) / 2, (18f - 0b) / 2, (19f - 0b) / 2
 T       .hword  (20f - 0b) / 2, (21f - 0b) / 2, (22f - 0b) / 2, (23f - 0b) / 2, (24f - 0b) / 2, (25f - 0b) / 2