1. 28 1月, 2008 32 次提交
  2. 26 1月, 2008 8 次提交
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      ARM kprobes: let's enable it · 5de865b4
      Nicolas Pitre 提交于
      Signed-off-by: NNicolas Pitre <nico@marvell.com>
      5de865b4
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      ARM kprobes: special hook for the kprobes breakpoint handler · 79696910
      Nicolas Pitre 提交于
      The kprobes code is already able to cope with reentrant probes, so its
      handler must be called outside of the region protected by undef_lock.
      
      If ever this lock is released when handlers are called then this commit
      could be reverted.
      Signed-off-by: NNicolas Pitre <nico@marvell.com>
      79696910
    • N
    • N
      ARM kprobes: don't let a single-stepped stmdb corrupt the exception stack · d30a0c8b
      Nicolas Pitre 提交于
      If kprobes installs a breakpoint on a "stmdb sp!, {...}" instruction,
      and then single-step it by simulation from the exception context, it will
      corrupt the saved regs on the stack from the previous context.
      
      To avoid this, let's add an optional parameter to the svc_entry macro
      allowing for a hole to be created on the stack before saving the
      interrupted context, and use it in the undef_svc handler when kprobes
      is enabled.
      Signed-off-by: NNicolas Pitre <nico@marvell.com>
      d30a0c8b
    • N
      25ce1dd7
    • A
      ARM kprobes: core code · 24ba613c
      Abhishek Sagar 提交于
      This is a full implementation of Kprobes including Jprobes and
      Kretprobes support.
      
      This ARM implementation does not follow the usual kprobes double-
      exception model. The traditional model is where the initial kprobes
      breakpoint calls kprobe_handler(), which returns from exception to
      execute the instruction in its original context, then immediately
      re-enters after a second breakpoint (or single-stepping exception)
      into post_kprobe_handler(), each time the probe is hit..  The ARM
      implementation only executes one kprobes exception per hit, so no
      post_kprobe_handler() phase. All side-effects from the kprobe'd
      instruction are resolved before returning from the initial exception.
      As a result, all instructions are _always_ effectively boosted
      regardless of the type of instruction, and even regardless of whether
      or not there is a post-handler for the probe.
      Signed-off-by: NAbhishek Sagar <sagar.abhishek@gmail.com>
      Signed-off-by: NQuentin Barnes <qbarnes@gmail.com>
      Signed-off-by: NNicolas Pitre <nico@marvell.com>
      24ba613c
    • Q
      ARM kprobes: instruction single-stepping support · 35aa1df4
      Quentin Barnes 提交于
      This is the code implementing instruction single-stepping for kprobes
      on ARM.
      
      To get around the limitation of no Next-PC and no hardware single-
      stepping, all kprobe'd instructions are split into three camps:
      simulation, emulation, and rejected. "Simulated" instructions are
      those instructions which behavior is reproduced by straight C code.
      "Emulated" instructions are ones that are copied, slightly altered
      and executed directly in the instruction slot to reproduce their
      behavior.  "Rejected" instructions are ones that could be simulated,
      but work hasn't been put into simulating them. These instructions
      should be very rare, if not unencountered, in the kernel. If ever
      needed, code could be added to simulate them.
      
      One might wonder why this and the ptrace singlestep facility are not
      sharing some code.  Both approaches are fundamentally different because
      the ptrace code regains control after the stepped instruction by installing
      a breakpoint after the instruction itself, and possibly at the location
      where the instruction might be branching to, instead of simulating or
      emulating the target instruction.
      
      The ptrace approach isn't suitable for kprobes because the breakpoints
      would have to be moved back, and the icache flushed, everytime the
      probe is hit to let normal code execution resume, which would have a
      significant performance impact. It is also racy on SMP since another
      CPU could, with the right timing, sail through the probe point without
      being caught.  Because ptrace single-stepping always result in a
      different process to be scheduled, the concern for performance is much
      less significant.
      
      On the other hand, the kprobes approach isn't (currently) suitable for
      ptrace because it has no provision for proper user space memory
      protection and translation, and even if that was implemented, the gain
      wouldn't be worth the added complexity in the ptrace path compared to
      the current approach.
      
      So, until kprobes does support user space, both kprobes and ptrace are
      best kept independent and separate.
      Signed-off-by: NQuentin Barnes <qbarnes@gmail.com>
      Signed-off-by: NAbhishek Sagar <sagar.abhishek@gmail.com>
      Signed-off-by: NNicolas Pitre <nico@marvell.com>
      35aa1df4
    • A
      [ARM] 4765/1: [AT91] AT91CAP9A-DK board support · 86640cae
      Andrew Victor 提交于
      Add support for the Atmel AT91CAP9A-DK Evaluation Kit board.
      Signed-off-by: NStelian Pop <stelian@popies.net>
      Signed-off-by: NAndrew Victor <linux@maxim.org.za>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      86640cae