- 19 1月, 2011 1 次提交
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由 Gabor Juhos 提交于
The Atheros AR71XX/AR724X/AR913X SoCs have a built-in SPI controller. This patch implements a driver for that. Signed-off-by: NGabor Juhos <juhosg@openwrt.org> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: spi-devel-general@lists.sourceforge.net Acked-by: NGrant Likely <grant.likely@secretlab.ca> Cc: linux-mips@linux-mips.org Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Cc: Kathy Giori <Kathy.Giori@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1960/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 24 12月, 2010 1 次提交
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由 Feng Tang 提交于
dw_spi driver in upstream only supports PIO mode, and this patch will support it to cowork with the Designware dma controller used on Intel Moorestown platform, at the same time it provides a general framework to support dw_spi core to cowork with dma controllers on other platforms It has been tested with a Option GTM501L 3G modem and Infenion 60x60 modem. To use DMA mode, DMA controller 2 of Moorestown has to be enabled Also change the dma interface suggested by Linus Walleij. Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NFeng Tang <feng.tang@intel.com> [Typo fix and renames to match intel_mid_dma renaming] Signed-off-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 01 12月, 2010 1 次提交
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Sodaville's SPI controller is very much the same as in PXA25x. The difference: - The RX/TX FIFO is only 4 words deep instead of 16 - No DMA support - The SPI controller offers a CS functionality Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
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- 10 11月, 2010 2 次提交
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由 Grant Likely 提交于
Now that the of_platform_bus_type has been merged with the platform bus type, a single platform driver can handle both OF and non-OF use cases. This patch merges the OF support into the platform driver. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Tested-by: NMichal Simek <monstr@monstr.eu>
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由 Grant Likely 提交于
This patch merges the platform driver support into the main body of xilinx_spi.c in preparation for merging the OF and non-OF support code. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Tested-by: NMichal Simek <monstr@monstr.eu>
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- 22 10月, 2010 1 次提交
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由 Erik Gilling 提交于
v2 changes: from Thierry Reding: * add "select TEGRA_SYSTEM_DMA" to Kconfig from Grant Likely: * add oneline description to header * inline references to DRIVER_NAME * inline references to BUSY_TIMEOUT * open coded bytes_per_word() * spi_readl/writel -> spi_tegra_readl/writel * move transfer validation to spi_tegra_transfer * don't request_mem_region iomem as platform bus does that for us * __exit -> __devexit v3 changes: from Russell King: * put request_mem_region back int from Grant Likely: * remove #undef DEBUG * add SLINK_ to register bit defines * remove unused bytes_per_word * make spi_tegra_readl/writel static linine * various refactoring for clarity * mark err if BSY bit is not cleared after 1000 retries * move spinlock to protect setting of RDY bit * subsys_initcall -> module_init v3 changes: from Grant Likely: * update spi_tegra to use PTR_ERRless dma API v4 changes: from Grant Likely: * remove empty spi_tegra_cleanup fucntion * allow device ids of -1 Signed-off-by: NErik Gilling <konkers@android.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Cc: Thierry Reding <thierry.reding@avionic-design.de> Cc: Russell King <linux@arm.linux.org.uk> spi: tegra: cleanups from upstream review Change-Id: Icecf7e64efcb39de072a15234ba1faa4bad40d25 Signed-off-by: NErik Gilling <konkers@android.com>
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- 13 10月, 2010 4 次提交
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由 Mingkai Hu 提交于
Add eSPI controller support based on the library code spi_fsl_lib.c. The eSPI controller is newer controller 85xx/Pxxx devices supported. There're some differences comparing to the SPI controller: 1. Has different register map and different bit definition So leave the code operated the register to the driver code, not the common code. 2. Support 4 dedicated chip selects The software can't controll the chip selects directly, The SPCOM[CS] field is used to select which chip selects is used, and the SPCOM[TRANLEN] field is set to tell the controller how long the CS signal need to be asserted. So the driver doesn't need the chipselect related function when transfering data, just set corresponding register fields to controll the chipseclect. 3. Different Transmit/Receive FIFO access register behavior For SPI controller, the Tx/Rx FIFO access register can hold only one character regardless of the character length, but for eSPI controller, the register can hold 4 or 2 characters according to the character lengths. Access the Tx/Rx FIFO access register of the eSPI controller will shift out/in 4/2 characters one time. For SPI subsystem, the command and data are put into different transfers, so we need to combine all the transfers to one transfer in order to pass the transfer to eSPI controller. 4. The max transaction length limitation The max transaction length one time is limitted by the SPCOM[TRANSLEN] field which is 0xFFFF. When used mkfs.ext2 command to create ext2 filesystem on the flash, the read length will exceed the max value of the SPCOM[TRANSLEN] field. Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Mingkai Hu 提交于
Refactor the common code in file spi_fsl_spi.c to spi_fsl_lib.c used by SPI/eSPI controller driver as a library, and leave the QE/CPM SPI controller code in the SPI controller driver spi_fsl_spi.c. Because the register map of the SPI controller and eSPI controller is so different, also leave the code operated the register to the driver code, not the common code. Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Mingkai Hu 提交于
This will pave the way to refactor out the common code which can be used by the eSPI controller driver, and rename the SPI controller dirver to the file spi_fsl_spi.c. Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 matt mooney 提交于
Replace EXTRA_CFLAGS with ccflags-y. Signed-off-by: Nmatt mooney <mfm@muteddisk.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 09 10月, 2010 1 次提交
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由 Masayuki Ohtake 提交于
Topcliff PCH is the platform controller hub that is going to be used in Intel's upcoming general embedded platform. All IO peripherals in Topcliff PCH are actually devices sitting on AMBA bus. This patch adds a driver for the SPI bus integrated into the Topcliff device. Signed-off-by: NMasayuki Ohtake <masa-korg@dsn.okisemi.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 25 5月, 2010 2 次提交
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由 Anatolij Gustschin 提交于
Signed-off-by: NJohn Rigby <jcrigby@gmail.com> Signed-off-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Mika Westerberg 提交于
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller found in EP93xx chips. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 21 1月, 2010 3 次提交
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由 Jean-Hugues Deschenes 提交于
Adds a memory-mapped I/O dw_spi platform device. Signed-off-by: NJean-Hugues Deschenes <jean-hugues.deschenes@octasic.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Steven King 提交于
Add support for the QSPI controller found some on Freescale/Motorola Coldfire MCUs. Full duplex, active high cs, spi modes 0-3 and word sizes 8-16 bits are supported. The hardware drives the MISO, MOSI and SCLK lines, but the chip selects are managed via GPIO and must be configured by the board code. The QSPI controller has an 80 byte buffer which allows us to transfer up to 16 words at a time. For transfers longer than 16 words, we split the buffer in half so we can update in one half while the controller is operating on the other half. Interrupt latencies then ultimately limits our sustained thru-put to something less than half the maximum speed supported by the part. Signed-off-by: NSteven King <sfking@fdwdc.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Sandeep Paulraj 提交于
This patch adds support for a SPI master driver for the DaVinci series of SOCs Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com> Signed-off-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NPhilby John <pjohn@in.mvista.com> Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 17 12月, 2009 3 次提交
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由 Jassi Brar 提交于
Each SPI controller has exactly one CS line and as such doesn't provide for multi-cs. We implement a workaround to support multi-cs by _not_ configuring the mux'ed CS pin for each SPI controller. The CS mechanism is assumed to be fully machine specific - the driver doesn't even assume some GPIO pin is used to control the CS. The driver selects between DMA and POLLING mode depending upon the xfer size - DMA mode for xfers bigger than FIFO size, POLLING mode otherwise. The driver has been designed to be capable of running SoCs since s3c64xx and till date, for that reason some of the register fields have been passed via, SoC specific, platform data. Signed-off-by: NJassi Brar <jassi.brar@samsung.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Ben Dooks 提交于
Add pseudo-DMA by FIQ to the S3C24XX SPI driver. This allows the driver to get DMA-like performance where there are either no free DMA channels or when doing transfers that required both TX and RX data paths. Since this patch requires the addition of an assembly file to hold the FIQ code, we rename the module (instead of adding a rename of the .c file to this patch). We expect most users are loading this via udev and thus there should be no change to the userland configuration. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NSimtec Linux Team <linux@simtec.co.uk> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Feng Tang 提交于
Driver for the Designware SPI core, it supports multipul interfaces like PCI/APB etc. User can use "dw_apb_ssi_db.pdf" from Synopsys as HW datasheet. [randy.dunlap@oracle.com: fix build] [akpm@linux-foundation.org: build fix] Signed-off-by: NFeng Tang <feng.tang@intel.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 13 12月, 2009 3 次提交
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由 Cory Maccarrone 提交于
This change adds the OMAP SPI 100k driver created by Fabrice Crohas <fcrohas@gmail.com>. This SPI bus is found on OMAP7xx-series smartphones, and for many, the touchscreen is attached to this bus. The lion's share of the work was done by Fabrice on this driver -- I am merely porting it from the Linwizard project on his behalf. Signed-off-by: NCory Maccarrone <darkstar6262@gmail.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Wan ZongShun 提交于
Signed-off-by: NWan ZongShun <mcuos.com@gmail.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Magnus Damm 提交于
This patch is V2 of SPI Master support for the SuperH MSIOF. Full duplex, spi mode 0-3, active high cs, 3-wire and lsb first should all be supported, but the driver has so far only been tested with "mmc_spi". The MSIOF hardware comes with 32-bit FIFOs for receive and transmit, and this driver simply breaks the SPI messages into FIFO-sized chunks. The MSIOF hardware manages the pins for clock, receive and transmit (sck/miso/mosi), but the chip select pin is managed by software and must be configured as a regular GPIO pin by the board code. Performance wise there is still room for improvement, but on a Ecovec board with the built-in sh7724 MSIOF0 this driver gets Mini-sd read speeds of about half a megabyte per second. Future work include better clock setup and merging of 8-bit transfers into 32-bit words to reduce interrupt load and improve throughput. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 09 12月, 2009 2 次提交
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由 Richard Röjfors 提交于
This patch adds in a platform device driver using the xilinx_spi common module. Tested-by: NJohn Linn <John.Linn@xilinx.com> Signed-off-by: NRichard Röjfors <richard.rojfors@mocean-labs.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Richard Röjfors 提交于
This patch splits the xilinx_spi driver into a generic part and a OF driver part. The reason for this is to later add in a platform driver as well. Tested-by: NJohn Linn <John.Linn@xilinx.com> Signed-off-by: NRichard Röjfors <richard.rojfors@mocean-labs.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 05 11月, 2009 1 次提交
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由 Grant Likely 提交于
Adds support for the dedicated SPI device on the Freescale MPC5200(b) SoC. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 02 10月, 2009 1 次提交
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由 Uwe Kleine-König 提交于
This makes the filename match the Kconfig symbol and the driver name. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 23 9月, 2009 4 次提交
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由 dmitry pervushin 提交于
Add SPI driver for Freescale STMP 3xxx-based boards [dbrownell@users.sourceforge.net: cleanup sequence, spi_unregister_master] Signed-off-by: Ndmitry pervushin <dpervushin@embeddedalley.com> Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Cc: Kumar Gala <galak@gate.crashing.org> Cc: Timur Tabi <timur@freescale.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Sascha Hauer 提交于
This driver has been tested on i.MX1/i.MX27/i.MX35 with an AT25 type EEPROM and on i.MX27/i.MX31 with a Freescale MC13783 PMIC. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Tested-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NDavid Brownell <david-b@pacbell.net> Cc: Andrea Paterniani <a.paterniani@swapp-eng.it> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Steven A. Falco 提交于
This adds a SPI driver for the SPI controller found in the IBM/AMCC 4xx PowerPC's. Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NWolfgang Ocker <weo@reccoware.de> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NSteven A. Falco <sfalco@harris.com> Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Sascha Hauer 提交于
This driver is in a non working state at the moment and will be replaced by a bitbang driver which can also handle the newer i.MX variants Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NDavid Brownell <david-b@pacbell.net> Acked-by: NAndrea Paterniani <a.paterniani@swapp-eng.it> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 20 6月, 2009 2 次提交
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由 Anton Vorontsov 提交于
Since we renamed the file, we might want to rename the file internals too. Though we don't bother with changing platform driver name and platform module alias. The stuff is legacy and hopefully we'll remove it soon. Suggested-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Cc: David Brownell <david-b@pacbell.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Anton Vorontsov 提交于
The driver handles MPC83xx, MPC85xx and MPC86xx SPI controllers, so rename the file for clarity. Suggested-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Cc: Kumar Gala <galak@gate.crashing.org> Cc: David Brownell <david-b@pacbell.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 11 6月, 2009 1 次提交
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由 Linus Walleij 提交于
This adds a driver for the ARM PL022 PrimeCell SSP/SPI driver found in the U300 platforms as well as in some ARM reference hardware, and in a modified version on the Nomadik board. Reviewed-by: NAlessandro Rubini <rubini-list@gnudd.com> Reviewed-by: NRussell King <linux@arm.linux.org.uk> Reviewed-by: NBaruch Siach <baruch@tkos.co.il> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 27 1月, 2009 1 次提交
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由 Wolfram Sang 提交于
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NJean Delvare <khali@linux-fr.org>
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- 07 1月, 2009 1 次提交
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由 David Brownell 提交于
Generalize the old at91rm9200 "bootstrap" bitbanging SPI master driver as "spi_gpio", so it works with arbitrary GPIOs and can be configured through platform_data. Such SPI masters support: - any number of bus instances (bus_num is the platform_device.id) - any number of chipselects (one GPIO per spi_device) - all four SPI_MODE values, and SPI_CS_HIGH - i/o word sizes from 1 to 32 bits; - devices configured as with any other spi_master controller When configured using platform_data, this provides relatively low clock rates. On platforms that support inlined GPIO calls, significantly improved transfer speeds are also possible with a semi-custom driver. (It's still painful when accessing flash memory, but less so.) Sanity checked by using this version to replace both native controllers on a board with six different SPI slaves, relying on three different SPI_MODE_* values and both SPI_CS_HIGH settings for correct operation. [akpm@linux-foundation.org: cleanups] Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Acked-by: NMagnus Damm <damm@igel.co.jp> Tested-by: NMagnus Damm <damm@igel.co.jp> Cc: Torgil Svensson <torgil.svensson@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 06 8月, 2008 1 次提交
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由 Shadi Ammouri 提交于
This adds an SPI driver for the SPI controller found in various Marvell Orion ARM SoCs. It currently supports only one slave, which must use SPI mode 0. [dbrownell@users.sourceforge.net: cleanups, meet specs, pass "sparse"] Signed-off-by: NShadi Ammouri <shadi@marvell.com> Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 07 2月, 2008 1 次提交
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由 Magnus Damm 提交于
Add support for SPI over SCI pins. SCI is a very simple serial controller block that can be found on older SuperH processors. In theory it is possible to use the SCI hardware block in syncronous mode, but this version of the driver simply hooks up the bit banging code on the SCI pins. Signed-off-by: NMagnus Damm <damm@igel.co.jp> Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 18 7月, 2007 3 次提交
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由 Atsushi Nemoto 提交于
This is a driver for SPI controller built into TXx9 MIPS SoCs. This driver is derived from arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c. Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Samuel Ortiz 提交于
Add OMAP24XX McSPI (Multichannel SPI) controller driver. This driver is tested very well under OMAP GIT tree with N800 - Nokia Internet Tablet, and some other OMAP2 boards. Recent updates included bugfixes, cleanups, speedups, and better conformance to the current SPI programming interface. This doesn't yet understand the third controller instance on the OMAP 2430. [david-b@pacbell.net: more minor cleanups to the omap2_mcspi driver] Signed-off-by: NJuha Yrjölä <juha.yrjola@solidboot.com> Signed-off-by: NTrilok Soni <soni.trilok@gmail.com> Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Andrei Konovalov 提交于
Simple SPI master driver for Xilinx SPI controller. No support for multiple masters. Not using level 1 drivers from EDK. [akpm@linux-foundation.org: uninlining] Signed-off-by: NYuri Frolov <yfrolov@ru.mvista.com> Signed-off-by: NAndrei Konovalov <akonovalov@ru.mvista.com> Cc: Kumar Gala <galak@gate.crashing.org> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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