1. 30 1月, 2008 1 次提交
  2. 20 10月, 2007 1 次提交
  3. 11 10月, 2007 1 次提交
  4. 23 7月, 2007 1 次提交
    • J
      x86: Replace NSC/Cyrix specific chipset access macros by inlined functions. · f25f64ed
      Juergen Beisert 提交于
      Due to index register access ordering problems, when using macros a line
      like this fails (and does nothing):
      
      	setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
      
      With inlined functions this line will work as expected.
      
      Note about a side effect: Seems on Geode GX1 based systems the
      "suspend on halt power saving feature" was never enabled due to this
      wrong macro expansion. With inlined functions it will be enabled, but
      this will stop the TSC when the CPU runs into a HLT instruction.
      Kernel output something like this:
      	Clocksource tsc unstable (delta = -472746897 ns)
      
      This is the 3rd version of this patch.
      
       - Adding missed arch/i386/kernel/cpu/mtrr/state.c
      	Thanks to Andres Salomon
       - Adding some big fat comments into the new header file
       	Suggested by Andi Kleen
      
      AK: fixed x86-64 compilation
      Signed-off-by: NJuergen Beisert <juergen@kreuzholzen.de>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      f25f64ed
  5. 29 6月, 2007 1 次提交
    • R
      mtrr/cyrix: fix sections · 80581c43
      Randy Dunlap 提交于
      main.c::mtrr_add() or mtrr_del() [exported]
      calls main.c::mtrr_add_page() or mtrr_del_page() or mtrr_restore() [resume]
      calls main.c::set_mtrr()
      calls main.c::ipi_handler()
      calls main.c::mtrr_if->set_all() == which can be cyrix_set_all
      
      WARNING: arch/i386/kernel/built-in.o(.text+0x8657): Section mismatch: reference to .init.data: (between 'cyrix_set_all' and 'centaur_get_free_region')
      WARNING: arch/i386/kernel/built-in.o(.text+0x866b): Section mismatch: reference to .init.data: (between 'cyrix_set_all' and 'centaur_get_free_region')
      WARNING: arch/i386/kernel/built-in.o(.text+0x867e): Section mismatch: reference to .init.data: (between 'cyrix_set_all' and 'centaur_get_free_region')
      WARNING: arch/i386/kernel/built-in.o(.text+0x8684): Section mismatch: reference to .init.data: (between 'cyrix_set_all' and 'centaur_get_free_region')
      WARNING: arch/i386/kernel/built-in.o(.text+0x868a): Section mismatch: reference to .init.data: (between 'cyrix_set_all' and 'centaur_get_free_region')
      Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com>
      Cc: Andi Kleen <ak@suse.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      80581c43
  6. 22 5月, 2007 1 次提交
  7. 07 12月, 2006 1 次提交
    • J
      [PATCH] i386: fix MTRR code · 365bff80
      Jan Beulich 提交于
      Until not so long ago, there were system log messages pointing to
      inconsistent MTRR setup of the video frame buffer caused by the way vesafb
      and X worked. While vesafb was fixed meanwhile, I believe fixing it there
      only hides a shortcoming in the MTRR code itself, in that that code is not
      symmetric with respect to the ordering of attempts to set up two (or more)
      regions where one contains the other. In the current shape, it permits
      only setting up sub-regions of pre-exisiting ones. The patch below makes
      this symmetric.
      
      While working on that I noticed a few more inconsistencies in that code,
      namely
      - use of 'unsigned int' for sizes in many, but not all places (the patch
        is converting this to use 'unsigned long' everywhere, which specifically
        might be necessary for x86-64 once a processor supporting more than 44
        physical address bits would become available)
      - the code to correct inconsistent settings during secondary processor
        startup tried (if necessary) to correct, among other things, the value
        in IA32_MTRR_DEF_TYPE, however the newly computed value would never get
        used (i.e. stored in the respective MSR)
      - the generic range validation code checked that the end of the
        to-be-added range would be above 1MB; the value checked should have been
        the start of the range
      - when contained regions are detected, previously this was allowed only
        when the old region was uncacheable; this can be symmetric (i.e. the new
        region can also be uncacheable) and even further as per Intel's
        documentation write-trough and write-back for either region is also
        compatible with the respective opposite in the other
      Signed-off-by: NJan Beulich <jbeulich@novell.com>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      365bff80
  8. 06 5月, 2005 1 次提交
  9. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4