1. 19 10月, 2006 2 次提交
    • M
      PCI: optionally sort device lists breadth-first · 6b4b78fe
      Matt Domsch 提交于
      Problem:
      New Dell PowerEdge servers have 2 embedded ethernet ports, which are
      labeled NIC1 and NIC2 on the chassis, in the BIOS setup screens, and
      in the printed documentation.  Assuming no other add-in ethernet ports
      in the system, Linux 2.4 kernels name these eth0 and eth1
      respectively.  Many people have come to expect this naming.  Linux 2.6
      kernels name these eth1 and eth0 respectively (backwards from
      expectations).  I also have reports that various Sun and HP servers
      have similar behavior.
      
      
      Root cause:
      Linux 2.4 kernels walk the pci_devices list, which happens to be
      sorted in breadth-first order (or pcbios_find_device order on i386,
      which most often is breadth-first also).  2.6 kernels have both the
      pci_devices list and the pci_bus_type.klist_devices list, the latter
      is what is walked at driver load time to match the pci_id tables; this
      klist happens to be in depth-first order.
      
      On systems where, for physical routing reasons, NIC1 appears on a
      lower bus number than NIC2, but NIC2's bridge is discovered first in
      the depth-first ordering, NIC2 will be discovered before NIC1.  If the
      list were sorted breadth-first, NIC1 would be discovered before NIC2.
      
      A PowerEdge 1955 system has the following topology which easily
      exhibits the difference between depth-first and breadth-first device
      lists.
      
      -[0000:00]-+-00.0  Intel Corporation 5000P Chipset Memory Controller Hub
                 +-02.0-[0000:03-08]--+-00.0-[0000:04-07]--+-00.0-[0000:05-06]----00.0-[0000:06]----00.0  Broadcom Corporation NetXtreme II BCM5708S Gigabit Ethernet (labeled NIC2, 2.4 kernel name eth1, 2.6 kernel name eth0)
                 +-1c.0-[0000:01-02]----00.0-[0000:02]----00.0  Broadcom Corporation NetXtreme II BCM5708S Gigabit Ethernet (labeled NIC1, 2.4 kernel name eth0, 2.6 kernel name eth1)
      
      
      Other factors, such as device driver load order and the presence of
      PCI slots at various points in the bus hierarchy further complicate
      this problem; I'm not trying to solve those here, just restore the
      device order, and thus basic behavior, that 2.4 kernels had.
      
      
      Solution:
      
      The solution can come in multiple steps.
      
      Suggested fix #1: kernel
      Patch below optionally sorts the two device lists into breadth-first
      ordering to maintain compatibility with 2.4 kernels.  It adds two new
      command line options:
        pci=bfsort
        pci=nobfsort
      to force the sort order, or not, as you wish.  It also adds DMI checks
      for the specific Dell systems which exhibit "backwards" ordering, to
      make them "right".
      
      
      Suggested fix #2: udev rules from userland
      Many people also have the expectation that embedded NICs are always
      discovered before add-in NICs (which this patch does not try to do).
      Using the PCI IRQ Routing Table provided by system BIOS, it's easy to
      determine which PCI devices are embedded, or if add-in, which PCI slot
      they're in.  I'm working on a tool that would allow udev to name
      ethernet devices in ascending embedded, slot 1 .. slot N order,
      subsort by PCI bus/dev/fn breadth-first.  It'll be possible to use it
      independent of udev as well for those distributions that don't use
      udev in their installers.
      
      Suggested fix #3: system board routing rules
      One can constrain the system board layout to put NIC1 ahead of NIC2
      regardless of breadth-first or depth-first discovery order.  This adds
      a significant level of complexity to board routing, and may not be
      possible in all instances (witness the above systems from several
      major manufacturers).  I don't want to encourage this particular train
      of thought too far, at the expense of not doing #1 or #2 above.
      
      
      Feedback appreciated.  Patch tested on a Dell PowerEdge 1955 blade
      with 2.6.18.
      
      You'll also note I took some liberty and temporarily break the klist
      abstraction to simplify and speed up the sort algorithm.  I think
      that's both safe and appropriate in this instance.
      Signed-off-by: NMatt Domsch <Matt_Domsch@dell.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      
      6b4b78fe
    • E
      PCI: Turn pci_fixup_video into generic for embedded VGA · b5e4efe7
      eiichiro.oiwa.nm@hitachi.com 提交于
      pci_fixup_video turns into generic code because there are many platforms need this fixup
      for embedded VGA as well as x86. The Video BIOS integrates into System BIOS on a machine
      has embedded VGA although embedded VGA generally don't have PCI ROM. As a result,
      embedded VGA need the way that the sysfs rom points to the Video BIOS of System
      RAM (0xC0000). PCI-to-PCI Bridge Architecture specification describes the condition whether
      or not PCI ROM forwards VGA compatible memory address. fixup_video suits this specification.
      Although the Video ROM generally implements in x86 code regardless of platform, some
      application such as X Window System can run this code by dosemu86. Therefore,
      pci_fixup_video should turn into generic code.
      Signed-off-by: NEiichiro Oiwa <eiichiro.oiwa.nm@hitachi.com>
      Acked-by: NAlan Cox <alan@redhat.com>
      Acked-by: NJesse Barnes <jesse.barnes@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      b5e4efe7
  2. 17 10月, 2006 3 次提交
    • P
      [PATCH] lockdep: annotate i386 apm · 3864c489
      Peter Zijlstra 提交于
      Lockdep doesn't like to enable interrupts when they are enabled already.
      
      BUG: warning at kernel/lockdep.c:1814/trace_hardirqs_on() (Not tainted)
       [<c04051ed>] show_trace_log_lvl+0x58/0x16a
       [<c04057fa>] show_trace+0xd/0x10
       [<c0405913>] dump_stack+0x19/0x1b
       [<c043abfb>] trace_hardirqs_on+0xa2/0x11e
       [<c041463c>] apm_bios_call_simple+0xcd/0xfd
       [<c0415242>] apm+0x92/0x5b1
       [<c0402005>] kernel_thread_helper+0x5/0xb
      DWARF2 unwinder stuck at kernel_thread_helper+0x5/0xb
      Leftover inexact backtrace:
       [<c04057fa>] show_trace+0xd/0x10
       [<c0405913>] dump_stack+0x19/0x1b
       [<c043abfb>] trace_hardirqs_on+0xa2/0x11e
       [<c041463c>] apm_bios_call_simple+0xcd/0xfd
       [<c0415242>] apm+0x92/0x5b1
       [<c0402005>] kernel_thread_helper+0x5/0xb
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Stephen Rothwell <sfr@canb.auug.org.au>
      Cc: Ingo Molnar <mingo@elte.hu>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      3864c489
    • I
      [PATCH] genirq: clean up irq-flow-type naming · a460e745
      Ingo Molnar 提交于
      Introduce desc->name and eliminate the handle_irq_name() hack.  Add
      set_irq_chip_and_handler_name() to set the flow type and name at once.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Acked-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: "Eric W. Biederman" <ebiederm@xmission.com>
      Cc: Matthew Wilcox <willy@debian.org>
      Cc: Kyle McMartin <kyle@mcmartin.ca>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      a460e745
    • J
      [PATCH] i386 Time: Avoid PIT SMP lockups · 3f4a0b91
      john stultz 提交于
      Avoid possible PIT livelock issues seen on SMP systems (and reported by
      Andi), by not allowing it as a clocksource on SMP boxes.
      
      However, since the PIT may no longer be present, we have to properly handle
      the cases where SMP systems have TSC skew and fall back from the TSC.
      Since the PIT isn't there, it would "fall back" to the TSC again.  So this
      changes the jiffies rating to 1, and the TSC-bad rating value to 0.
      
      Thus you will get the following behavior priority on i386 systems:
      
      tsc		[if present & stable]
      hpet		[if present]
      cyclone		[if present]
      acpi_pm		[if present]
      pit		[if UP]
      jiffies
      
      Rather then the current more complicated:
      tsc		[if present & stable]
      hpet		[if present]
      cyclone		[if present]
      acpi_pm		[if present]
      pit		[if cpus < 4]
      tsc		[if present & unstable]
      jiffies
      Signed-off-by: NJohn Stultz <johnstul@us.ibm.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      3f4a0b91
  3. 14 10月, 2006 2 次提交
    • K
      ACPI: SCI interrupt source override · 281ea49b
      Kimball Murray 提交于
      The Linux group at Stratus Technologies has come across an issue with SCI
      routing under ACPI.  We were bitten by this when we made an x86_64 platform
      whose BIOS provides an Interrupt Source Override for the SCI itself.
      Apparently the override has no effect for the System Control Interrupt, and
      this appears to be because of the way the SCI is setup in the ACPI code.
      It does not handle the case where busirq != gsi.
      
      The code that sets up the SCI routing assumes that bus irq == global irq.
      So there is simply no provision for telling it otherwise.  The attached
      patch provides this mechanism.
      
      This patch provided by David Bulkow, was tested on an i386 platform, which
      does not use the SCI override, and also on an x86_64 platform which does
      use an override.
      Signed-off-by: NDavid Bulkow <david.bulkow@stratus.com>
      Cc: Andi Kleen <ak@muc.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      281ea49b
    • V
      ACPI: Processor native C-states using MWAIT · 991528d7
      Venkatesh Pallipadi 提交于
      Intel processors starting with the Core Duo support
      support processor native C-state using the MWAIT instruction.
      Refer: Intel Architecture Software Developer's Manual
      http://www.intel.com/design/Pentium4/manuals/253668.htm
      
      Platform firmware exports the support for Native C-state to OS using
      ACPI _PDC and _CST methods.
      Refer: Intel Processor Vendor-Specific ACPI: Interface Specification
      http://www.intel.com/technology/iapc/acpi/downloads/302223.htm
      
      With Processor Native C-state, we use 'MWAIT' instruction on the processor
      to enter different C-states (C1, C2, C3).  We won't use the special IO
      ports to enter C-state and no SMM mode etc required to enter C-state.
      Overall this will mean better C-state support.
      
      One major advantage of using MWAIT for all C-states is, with this and
      "treat interrupt as break event" feature of MWAIT, we can now get accurate
      timing for the time spent in C1, C2, ..  states.
      Signed-off-by: NVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      991528d7
  4. 13 10月, 2006 3 次提交
  5. 12 10月, 2006 6 次提交
  6. 09 10月, 2006 2 次提交
  7. 07 10月, 2006 1 次提交
  8. 06 10月, 2006 5 次提交
  9. 05 10月, 2006 1 次提交
    • D
      IRQ: Maintain regs pointer globally rather than passing to IRQ handlers · 7d12e780
      David Howells 提交于
      Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
      of passing regs around manually through all ~1800 interrupt handlers in the
      Linux kernel.
      
      The regs pointer is used in few places, but it potentially costs both stack
      space and code to pass it around.  On the FRV arch, removing the regs parameter
      from all the genirq function results in a 20% speed up of the IRQ exit path
      (ie: from leaving timer_interrupt() to leaving do_IRQ()).
      
      Where appropriate, an arch may override the generic storage facility and do
      something different with the variable.  On FRV, for instance, the address is
      maintained in GR28 at all times inside the kernel as part of general exception
      handling.
      
      Having looked over the code, it appears that the parameter may be handed down
      through up to twenty or so layers of functions.  Consider a USB character
      device attached to a USB hub, attached to a USB controller that posts its
      interrupts through a cascaded auxiliary interrupt controller.  A character
      device driver may want to pass regs to the sysrq handler through the input
      layer which adds another few layers of parameter passing.
      
      I've build this code with allyesconfig for x86_64 and i386.  I've runtested the
      main part of the code on FRV and i386, though I can't test most of the drivers.
      I've also done partial conversion for powerpc and MIPS - these at least compile
      with minimal configurations.
      
      This will affect all archs.  Mostly the changes should be relatively easy.
      Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
      
      	struct pt_regs *old_regs = set_irq_regs(regs);
      
      And put the old one back at the end:
      
      	set_irq_regs(old_regs);
      
      Don't pass regs through to generic_handle_irq() or __do_IRQ().
      
      In timer_interrupt(), this sort of change will be necessary:
      
      	-	update_process_times(user_mode(regs));
      	-	profile_tick(CPU_PROFILING, regs);
      	+	update_process_times(user_mode(get_irq_regs()));
      	+	profile_tick(CPU_PROFILING);
      
      I'd like to move update_process_times()'s use of get_irq_regs() into itself,
      except that i386, alone of the archs, uses something other than user_mode().
      
      Some notes on the interrupt handling in the drivers:
      
       (*) input_dev() is now gone entirely.  The regs pointer is no longer stored in
           the input_dev struct.
      
       (*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking.  It does
           something different depending on whether it's been supplied with a regs
           pointer or not.
      
       (*) Various IRQ handler function pointers have been moved to type
           irq_handler_t.
      Signed-Off-By: NDavid Howells <dhowells@redhat.com>
      (cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
      7d12e780
  10. 04 10月, 2006 15 次提交
    • E
      [PATCH] htirq: tidy up the htirq code · 95d77884
      Eric W. Biederman 提交于
      This moves the declarations for the architecture helpers into
      include/linux/htirq.h from the generic include/linux/pci.h.  Hopefully this
      will make this distinction clearer.
      
      htirq.h is included where it is needed.
      
      The dependency on the msi code is fixed and removed.
      
      The Makefile is tidied up.
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Greg KH <greg@kroah.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      95d77884
    • E
      [PATCH] msi: refactor and move the msi irq_chip into the arch code · 3b7d1921
      Eric W. Biederman 提交于
      It turns out msi_ops was simply not enough to abstract the architecture
      specific details of msi.  So I have moved the resposibility of constructing
      the struct irq_chip to the architectures, and have two architecture specific
      functions arch_setup_msi_irq, and arch_teardown_msi_irq.
      
      For simple architectures those functions can do all of the work.  For
      architectures with platform dependencies they can call into the appropriate
      platform code.
      
      With this msi.c is finally free of assuming you have an apic, and this
      actually takes less code.
      
      The helpers for the architecture specific code are declared in the linux/msi.h
      to keep them separate from the msi functions used by drivers in linux/pci.h
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Greg KH <greg@kroah.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      3b7d1921
    • E
      [PATCH] Initial generic hypertransport interrupt support · 8b955b0d
      Eric W. Biederman 提交于
      This patch implements two functions ht_create_irq and ht_destroy_irq for
      use by drivers.  Several other functions are implemented as helpers for
      arch specific irq_chip handlers.
      
      The driver for the card I tested this on isn't yet ready to be merged.
      However this code is and hypertransport irqs are in use in a few other
      places in the kernel.  Not that any of this will get merged before 2.6.19
      
      Because the ipath-ht400 is slightly out of spec this code will need to be
      generalized to work there.
      
      I think all of the powerpc uses are for a plain interrupt controller in a
      chipset so support for native hypertransport devices is a little less
      interesting.
      
      However I think this is a half way decent model on how to separate arch
      specific and generic helper code, and I think this is a functional model of
      how to get the architecture dependencies out of the msi code.
      
      [akpm@osdl.org: Kconfig fix]
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Cc: Greg KH <greg@kroah.com>
      Cc: Andi Kleen <ak@muc.de>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      8b955b0d
    • E
      [PATCH] genirq: x86_64 irq: Kill gsi_irq_sharing · f023d764
      Eric W. Biederman 提交于
      After raising the number of irqs the system supports this function is no
      longer necessary.
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rajesh Shah <rajesh.shah@intel.com>
      Cc: Andi Kleen <ak@muc.de>
      Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      f023d764
    • E
      [PATCH] genirq: i386 irq: Remove the msi assumption that irq == vector · ace80ab7
      Eric W. Biederman 提交于
      This patch removes the change in behavior of the irq allocation code when
      CONFIG_PCI_MSI is defined.  Removing all instances of the assumption that irq
      == vector.
      
      create_irq is rewritten to first allocate a free irq and then to assign that
      irq a vector.
      
      assign_irq_vector is made static and the AUTO_ASSIGN case which allocates an
      vector not bound to an irq is removed.
      
      The ioapic vector methods are removed, and everything now works with irqs.
      
      The definition of NR_IRQS no longer depends on CONFIG_PCI_MSI
      
      [akpm@osdl.org: cleanup]
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rajesh Shah <rajesh.shah@intel.com>
      Cc: Andi Kleen <ak@muc.de>
      Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      ace80ab7
    • E
      [PATCH] genirq: i386 irq: Move msi message composition into io_apic.c · 2d3fcc1c
      Eric W. Biederman 提交于
      This removes the hardcoded assumption that irq == vector in the msi
      composition code, and it allows the msi message composition to setup logical
      mode, or lowest priorirty delivery mode as we do for other apic interrupts,
      and with the same selection criteria.
      
      Basically this moves the problem of what is in the msi message into the
      architecture irq management code where it belongs.  Not in a generic layer
      that doesn't have enough information to compose msi messages properly.
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rajesh Shah <rajesh.shah@intel.com>
      Cc: Andi Kleen <ak@muc.de>
      Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      2d3fcc1c
    • E
      [PATCH] genirq: i386 irq: Dynamic irq support · 3fc471ed
      Eric W. Biederman 提交于
      The current implementation of create_irq() is a hack but it is the current
      hack that msi.c uses, and unfortunately the ``generic'' apic msi ops depend on
      this hack.  Thus we are stuck this hack of assuming irq == vector until the
      depencencies in the generic msi code are removed.
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rajesh Shah <rajesh.shah@intel.com>
      Cc: Andi Kleen <ak@muc.de>
      Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      3fc471ed
    • E
      [PATCH] genirq: msi: simplify the msi irq limit policy · 92db6d10
      Eric W. Biederman 提交于
      Currently we attempt to predict how many irqs we will be able to allocate with
      msi using pci_vector_resources and some complicated accounting, and then we
      only allow each device as many irqs as we think are available on average.
      
      Only the s2io driver even takes advantage of this feature all other drivers
      have a fixed number of irqs they need and bail if they can't get them.
      
      pci_vector_resources is inaccurate if anyone ever frees an irq.  The whole
      implmentation is racy.  The current irq limit policy does not appear to make
      sense with current drivers.  So I have simplified things.  We can revisit this
      we we need a more sophisticated policy.
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rajesh Shah <rajesh.shah@intel.com>
      Cc: Andi Kleen <ak@muc.de>
      Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      92db6d10
    • I
      [PATCH] genirq: convert the i386 architecture to irq-chips · f5b9ed7a
      Ingo Molnar 提交于
      This patch converts all the i386 PIC controllers (except VisWS and Voyager,
      which I could not test - but which should still work as old-style IRQ layers)
      to the new and simpler irq-chip interrupt handling layer.
      
      [akpm@osdl.org: build fix]
      [mingo@elte.hu: enable fasteoi handler for i386 level-triggered IO-APIC irqs]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Roland Dreier <rolandd@cisco.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      f5b9ed7a
    • D
      Remove all inclusions of <linux/config.h> · 038b0a6d
      Dave Jones 提交于
      kbuild explicitly includes this at build time.
      Signed-off-by: NDave Jones <davej@redhat.com>
      038b0a6d
    • K
      [PATCH] i383 numa: fix numaq/summit apicid conflict · 78b656b8
      Keith Mannthey 提交于
      This allows numaq to properly align cpus to their given node during
      boot.  Pass logical apicid to apicid_to_node and allow the summit
      sub-arch to use physical apicid (hard_smp_processor_id()).
      
      Tested against numaq and summit based systems with no issues.
      Signed-off-by: NKeith Mannthey <kmannth@us.ibm.com>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      78b656b8
    • E
      BUG_ON cleanups in arch/i386 · 8d8f3cbe
      Eric Sesterhenn 提交于
      This changes a couple of if() BUG(); constructs to
      BUG_ON(); so it can be safely optimized away.
      Signed-off-by: NEric Sesterhenn <snakebyte@gmx.de>
      Signed-off-by: NAdrian Bunk <bunk@stusta.de>
      8d8f3cbe
    • U
      fix file specification in comments · f30c2269
      Uwe Zeisberger 提交于
      Many files include the filename at the beginning, serveral used a wrong one.
      Signed-off-by: NUwe Zeisberger <Uwe_Zeisberger@digi.com>
      Signed-off-by: NAdrian Bunk <bunk@stusta.de>
      f30c2269
    • M
      Attack of "the the"s in arch · 4b3f686d
      Matt LaPlante 提交于
      The patch below corrects multiple occurances of "the the"
      typos across several files, both in source comments and KConfig files.
      There is no actual code changed, only text.  Note this only affects the /arch
      directory, and I believe I could find many more elsewhere. :)
      Signed-off-by: NAdrian Bunk <bunk@stusta.de>
      4b3f686d
    • L
      x86: Fix booting with "no387 nofxsr" · 8ccb3dcd
      Linus Torvalds 提交于
      Jesper Juhl reported that testing the software math-emulation by forcing
      "no387" doesn't work on modern CPU's.
      
      The reason was two-fold:
       - you also need to pass in "nofxsr" to make sure that we not only don't
         touch the old i387 legacy hardware, it also needs to disable the
         modern XMM/FXSR sequences
       - "nofxsr" didn't actually clear the capability bits immediately,
         leaving the early boot sequence still using FXSR until we got to
         the identify_cpu() stage.
      
      This fixes the "nofxsr" flag to take effect immediately on the boot CPU.
      
      Debugging by Randy Dunlap
      Acked-by: NRandy Dunlap <rdunlap@xenotime.net>
      Cc: Jesper Juhl <jesper.juhl@gmail.com>
      Cc: Andi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      8ccb3dcd