- 14 1月, 2011 1 次提交
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由 Bruce Allan 提交于
Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 10 1月, 2011 1 次提交
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由 Bruce Allan 提交于
82574 needs to configure Low Power Link Up (or LPLU) differently than the other parts in the 8257x family supported by the driver. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NEmil Tantilov <emil.s.tantilov@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 9月, 2010 1 次提交
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由 Bruce Allan 提交于
On 82579, there is a hardware bug that can cause received packets to not get transferred from the PHY to the MAC due to K1 (a power saving feature of the PHY-MAC interconnect similar to ASPM L1). Since the MAC controls the accounting of missed packets, these will go unnoticed. Workaround the issue by setting the K1 beacon duration according to the link speed. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 8月, 2010 1 次提交
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由 Bruce Allan 提交于
The MAC-PHY interconnect register set on ICH/PCH parts is accessed through a peephole mechanism by writing an offset to a CSR register. The offset for the interconnect's half-duplex control register (which is used in a jumbo frame workaround for 82579) is incorrect. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 28 7月, 2010 1 次提交
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由 Bruce Allan 提交于
The MAC-PHY interconnect on 82577/82578 uses a power management feature (called K1) which must be disabled when in 1Gbps due to a hardware issue on these parts. The #define bit setting used to enable/disable K1 is incorrect and can cause PHY register accesses to stop working altogether until the next device reset. This patch sets the register correctly. This issue is present in kernels since 2.6.32. CC: stable@kernel.org Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 19 6月, 2010 3 次提交
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由 Bruce Allan 提交于
Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
This patch enables IEEE802.3az (a.k.a. Energy Efficient Ethernet) on the new 82579 LOMs. An optional module parameter is provided to disable the feature if desired. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 5月, 2010 4 次提交
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由 Bruce Allan 提交于
Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
The flow control refresh timer value needs to be saved off so that it can be programmed into the approrpiate register when applicable but without a reset, e.g. when changing flow control parameters via ethtool. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
The mac->arc_subsystem was being incorrectly used to flag whether or not manageability was enabled when it should only be used to state whether the ARC (Host interface) subsystem is available on a particular MAC _and_ only valid when any manageability is enabled. The ARC subsystem is currently only available on 80003es2lan and 82573 parts supported by the driver. A new flag, has_fwsm, is introduced to be used when checking if manageability is enabled but only on parts that acutally have an FWSM register. While the above parts have an FWSM register, there are other parts that have FWSM but do not have support for the ARC subsystem, namely 82571/2 and ICHx/PCH. And then there are parts that have manageability, but do not have either FWSM register or support for the ARC subsystem - these are 82574 and 82583. For 80003es2lan, 82571/2/3 and ICH/PCH parts, this patch makes no functional changes, it only corrects the usage of the manageability flags. For 82574 and 82583, it fixes the incorrect accesses of the non-existent FWSM register and ARC subsystem as well as corrects the check for management pass-through. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
82574/82583 uses different registers/bits to setup manageability filters than all other parts supported by e1000e; set them accordingly for IPMI pass-through. Rename the function to better reflect what it does. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 1月, 2010 3 次提交
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由 Bruce Allan 提交于
Make updating the multicast address list generic for all families and enforce the requirement to update the entire multicast table array all at once instead of piecemeal which causes problems on some parts. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
Provide MAC-specific function pointer to determine the LAN ID (PCI func). The LAN ID is used internally by the driver to determine which h/w lock to use to protect accessing the PHY on ESB2 as well as help to determine the alternate MAC address on some parts. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
Similar to 82571/2/3 parts that already do this, if ESB2/80003es2lan parts have an alternate MAC address provided in the EEPROM use it instead of the default MAC address. This patch makes the the actual code that does this generic so that it can be better used by both MAC families. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 1月, 2010 1 次提交
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由 Bruce Allan 提交于
Adaptive IFS which involves writing to the Adaptive IFS Throttle register was being done for all devices supported by the driver even though it is not supported (i.e. the register doesn't even exist) on some devices. The feature is supported on 8257x/82583 and ICH/PCH based devices, but not on ESB2. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 12月, 2009 2 次提交
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由 Bruce Allan 提交于
A workaround added for all ESB2 devices (adds a delay for all MDIC accesses which resolves an issue with the MDIC ready bit being set prematurely) is applicable only to devices in which the MAC-PHY interconnect is not operating in a certain mode with in-band MDIO. Check the control register for the operating mode and enable the workaround accordingly. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
The GG82563_REG() macro should not be used to determine the offset provided to the e1000e_[read|write]_kmrn_reg() functions since the first argument to the macro is already implied and gets masked off anyway in the functions. The resultant register reads/writes with this patch are functionally the same as before. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 12月, 2009 1 次提交
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由 Bruce Allan 提交于
The workaround that detects the correct PHY ID when an initial read of the PHY ID registers returns an invalid one should retry up to ten times with a small delay between attempts using a single PHY address and then repeat using the remaining possible PHY addresses. Do this instead of trying each possible PHY address repeating that up to 100 times. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 12月, 2009 3 次提交
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由 Bruce Allan 提交于
This new PCI device ID is for a new combination of MAC and PHY both of which already have supporting code in the driver, just not yet in this combination. During validation of the device, an intermittent issue was discovered with waking it from a suspended state which can be resolved with the pre-existing workaround to disable gigabit speed prior to suspending. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
The different families (80003es2lan, 8257x, ICHx/PCH) supported by the driver each have their own conditions when the PHY can be powered down. This patch rewrites the PHY power up/down code to fit with the family- specific style used in the driver. All pre-existing calls to power up or down the PHY remain untouched. A new call to power down the PHY when removing the driver when the interface is down replaces the current call to reset the PHY in order to reduce power consumption. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
The two MAC-families that have VLAN filter table register arrays manage each a bit differently from one another, so provide family-specific functions for managing the register arrays and function pointers to access the appropriate function. Also make sure attempts to access these register arrays are not done on parts not supporting that feature. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 11月, 2009 3 次提交
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由 Bruce Allan 提交于
Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
The phy and nvm operations structures have function pointers that contain "phy" and "nvm" in the pointer names which are redundant since the structures are already obviously in phy and nvm structures. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
This patch depends on a previous one that cleans up redundant #includes. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 10月, 2009 1 次提交
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由 Bruce Allan 提交于
This patch reworks a previous workaround (commit 7d3cabbc) for an issue in hardware where noise on the interconnect between the MAC and PHY could be generated by a lower power mode (K1) at 1000Mbps resulting in bad packets. Disable K1 while at 1000 Mbps but keep it enabled for 10/100Mbps and when the cable is disconnected. The original version of this workaround was found to be incomplete. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 10月, 2009 1 次提交
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由 Bruce Allan 提交于
PCH-based parts (82577/82578) and some ICH8-based parts (82566) need to hold the swflag (sw/fw/hw hardware semaphore) over consecutive PHY accesses in order to perform sw-driven PHY configuration during initialization to workaround known hardware issues (see follow-on patch). This patch provides new PHY read/write functions (and function pointers) that will allow accessing the PHY registers assuming the swflag has already been acquired. The actual PHY register access code has moved into helper functions that are called with a flag indicating whether or not the swflag has already been acquired and acquires/releases it if not. The functions called from within the updated PHY access functions had to be updated to assume the swflag was already acquired, and other functions that called those functions were also updated to acquire/release the swflag. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 7月, 2009 1 次提交
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由 Bruce Allan 提交于
This workaround is required for an issue in hardware where noise on the interconnect between the MAC and PHY could be generated by a lower power mode (K1) at 1000Mbps resulting in bad packets. Disable K1 while at 1000 Mbps but keep it enabled for 10/100Mbps and when the cable is disconnected. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 6月, 2009 1 次提交
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由 Dave Graham 提交于
Phy corruption has been observed on 2-port 82571 adapters, and is root-caused to lack of synchronization between the 2 driver instances, which conflict when attempting to access the phy via the single MDIC register. A semaphore exists for this purpose, and is now used on these designs. Because PXE &/or EFI boot code (which we cannot expect to be built with this fix) may leave the inter-instance semaphore in an invalid initial state when the driver first loads, this fix also includes a one-time (per driver load) fix-up of the semaphore initial state. Signed-off-by: Ndave graham <david.graham@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 6月, 2009 1 次提交
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由 Bruce Allan 提交于
This patch provides support for the next generation Intel desktop and mobile gigabit ethernet LOM adapters. These adapters are the follow-on parts to the LOMs tied to the prior ICH chipsets and are comprised of a MAC in the PCH chipset and an external PHY (82577 for mobile and 82578 for desktop versions). New features consist of PHY wakeup to save power by completely turning off the MAC while in Sx state, and 4K jumbo frames. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 5月, 2009 1 次提交
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由 Alexander Duyck 提交于
The phy port status register has the MDI-X status bit on bit 11, not bit 3 as is currently setup in the define. This patch corrects that so the correct bit is checked on igp PHY types. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Acked-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 25 3月, 2009 1 次提交
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由 Bruce Allan 提交于
Add device ID for a new variant of the 82574 adapter. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Acked-by: NJohn Ronciak <john.ronciak@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 3月, 2009 1 次提交
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由 Alexander Duyck 提交于
Add device ID and related support for 82583 mac. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Acked-by: NRadheka Godse <radheka.godse@intel.com> Acked-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 2月, 2009 1 次提交
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由 dave graham 提交于
This patch addresses an issue where we did not restart auto-negotiation on serdes links when the link partner was disabled and re-enabled. It includes reworking the serdes link detect mechanism to be a state machine for 82571 and 82572 parts only. Signed-off-by: Ndave graham <david.graham@intel.com> Acked-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 1月, 2009 1 次提交
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由 Jesse Brandeburg 提交于
There is a hardware errata in some revisions of the 82574 that needs to be worked around in the driver by setting a register bit at init. If this bit is not set A0 versions of the 82574 can generate tx hangs. Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 11月, 2008 2 次提交
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由 Bruce Allan 提交于
Sync flow control variables and usage model with that found in the ixgbe driver. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruce Allan 提交于
On ESB2, the MAC-to-PHY (Kumeran) interface must be configured after link is up before any traffic is sent; a new PHY operations function pointer is provided for this. To facilitate read/write of the Kumeran registers without blocking PHY register writes, the driver/firmware synchronization method which previously used a hardware semaphore for both PHY and Kumeran register accesses is now split. New Kumeran register read/write functions utilize this new synchronization method. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 11月, 2008 1 次提交
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由 Alexander Duyck 提交于
This change enables ECC correction for the packet buffer on all 82571 silicon. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 9月, 2008 2 次提交
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由 Bruce Allan 提交于
This new part has the same feature set as previous parts with the addition of MSI-X support. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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由 Bruce Allan 提交于
Add support for new LOM devices on the latest generation ICHx platforms. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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