- 31 1月, 2015 1 次提交
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由 Tony Lindgren 提交于
Looks like davinci_emac and cpsw can share some code although the device registers have a different layout. At least the code for getting the MAC address using syscon can be shared by passing the register offset. Let's start with that and set up a minimal shared cpsw-shared.c. Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 9月, 2014 1 次提交
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由 Markus Pargmann 提交于
"MII_BUS_ID_SIZE" is defined in linux/phy.h which is not included in the cpsw.h file. Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Reviewed-by: NWolfram Sang <wsa@the-dreams.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 9月, 2013 1 次提交
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由 Mugunthan V N 提交于
The cpsw currently lacks code to properly set up the hardware interface mode on AM33xx. Other platforms might be equally affected. Usually, the bootloader will configure the control module register, so probably that's why such support wasn't needed in the past. In suspend mode though, this register is modified, and so it needs reprogramming after resume. This patch adds a new driver in which hardware interface can configure correct register bits when the slave is opened. The AM33xx also has a bit for each slave to configure the RMII reference clock direction. Setting it is now supported by a per-slave DT property. This code path introducted by this patch is currently exclusive for am33xx and same can be extened to various platforms via the DT compatibility property. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 8月, 2013 1 次提交
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由 Mugunthan V N 提交于
CPSW driver no longer supports platform register as all the SoCs which has CPSW are supporting DT only booting, so moving cpsw.h header file from platform include to drivers/net/ethernet/ti Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 3月, 2013 1 次提交
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由 Mugunthan V N 提交于
Change cpts_active_slave to active_slave so that the same DT property can be used to ethtool and SIOCGMIIPHY. CC: Richard Cochran <richardcochran@gmail.com> Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 2月, 2013 1 次提交
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由 Mugunthan V N 提交于
The CPSW switch can act as Dual EMAC by segregating the switch ports using VLAN and port VLAN as per the TRM description in 14.3.2.10.2 Dual Mac Mode Following CPSW components will be common for both the interfaces. * Interrupt source is common for both eth interfaces * Interrupt pacing is common for both interfaces * Hardware statistics is common for all the ports * CPDMA is common for both eth interface * CPTS is common for both the interface and it should not be enabled on both the interface as timestamping information doesn't contain port information. Constrains * Reserved VID of One port should not be used in other interface which will enable switching functionality * Same VID must not be used in both the interface which will enable switching functionality Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 2月, 2013 1 次提交
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由 Mugunthan V N 提交于
adding support for VLAN interface for cpsw. CPSW VLAN Capability * Can filter VLAN packets in Hardware Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 15 11月, 2012 1 次提交
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由 Richard Cochran 提交于
Instead of having a host of different register offsets in the device tree, this patch simplifies the CPSW code by letting the driver set the proper register offsets automatically, based on the CPSW version. Signed-off-by: NRichard Cochran <richardcochran@gmail.com> Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 11月, 2012 3 次提交
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由 Richard Cochran 提交于
This patch adds a way to configure the CPTS input clock scaling factors via the device tree. Signed-off-by: NRichard Cochran <richardcochran@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Richard Cochran 提交于
Because time stamping on both external ports of the switch simultaneously is positively useless from the application's point of view, this patch provides a DT configuration method to choose the active port. Signed-off-by: NRichard Cochran <richardcochran@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Richard Cochran 提交于
Signed-off-by: NRichard Cochran <richardcochran@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 3月, 2012 1 次提交
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由 Mugunthan V N 提交于
This patch adds support for TI's CPSW driver. The three port switch gigabit ethernet subsystem provides ethernet packet communication and can be configured as an ethernet switch. Supports 10/100/1000 Mbps. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Signed-off-by: NSriramakrishnan A G <srk@ti.com> Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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