提交 df3c8b2b 编写于 作者: F Felix Fietkau 提交者: John W. Linville

ath9k_hw: remove antenna configuration eeprom ops and variables

AR9280 based hardware with 3 antennas and slow antenna diversity has
not been seen in the wild and ath9k does not support that form of
antenna diversity, so remove the EEPROM ops for it.
These EEPROM ops are currently only used for setting the
AR_PHY_SWITCH_COM register, which is being done in the EEPROM specific
file already.
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
上级 940cd2c1
...@@ -3427,18 +3427,6 @@ static int ath9k_hw_ar9300_get_eeprom_rev(struct ath_hw *ah) ...@@ -3427,18 +3427,6 @@ static int ath9k_hw_ar9300_get_eeprom_rev(struct ath_hw *ah)
return 0; return 0;
} }
static u8 ath9k_hw_ar9300_get_num_ant_config(struct ath_hw *ah,
enum ath9k_hal_freq_band freq_band)
{
return 1;
}
static u32 ath9k_hw_ar9300_get_eeprom_antenna_cfg(struct ath_hw *ah,
struct ath9k_channel *chan)
{
return -EINVAL;
}
static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz) static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
{ {
struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
...@@ -4848,8 +4836,6 @@ const struct eeprom_ops eep_ar9300_ops = { ...@@ -4848,8 +4836,6 @@ const struct eeprom_ops eep_ar9300_ops = {
.fill_eeprom = ath9k_hw_ar9300_fill_eeprom, .fill_eeprom = ath9k_hw_ar9300_fill_eeprom,
.get_eeprom_ver = ath9k_hw_ar9300_get_eeprom_ver, .get_eeprom_ver = ath9k_hw_ar9300_get_eeprom_ver,
.get_eeprom_rev = ath9k_hw_ar9300_get_eeprom_rev, .get_eeprom_rev = ath9k_hw_ar9300_get_eeprom_rev,
.get_num_ant_config = ath9k_hw_ar9300_get_num_ant_config,
.get_eeprom_antenna_cfg = ath9k_hw_ar9300_get_eeprom_antenna_cfg,
.set_board_values = ath9k_hw_ar9300_set_board_values, .set_board_values = ath9k_hw_ar9300_set_board_values,
.set_addac = ath9k_hw_ar9300_set_addac, .set_addac = ath9k_hw_ar9300_set_addac,
.set_txpower = ath9k_hw_ar9300_set_txpower, .set_txpower = ath9k_hw_ar9300_set_txpower,
......
...@@ -649,10 +649,6 @@ struct eeprom_ops { ...@@ -649,10 +649,6 @@ struct eeprom_ops {
bool (*fill_eeprom)(struct ath_hw *hw); bool (*fill_eeprom)(struct ath_hw *hw);
int (*get_eeprom_ver)(struct ath_hw *hw); int (*get_eeprom_ver)(struct ath_hw *hw);
int (*get_eeprom_rev)(struct ath_hw *hw); int (*get_eeprom_rev)(struct ath_hw *hw);
u8 (*get_num_ant_config)(struct ath_hw *hw,
enum ath9k_hal_freq_band band);
u32 (*get_eeprom_antenna_cfg)(struct ath_hw *hw,
struct ath9k_channel *chan);
void (*set_board_values)(struct ath_hw *hw, struct ath9k_channel *chan); void (*set_board_values)(struct ath_hw *hw, struct ath9k_channel *chan);
void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan); void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan);
void (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan, void (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan,
......
...@@ -770,8 +770,7 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah, ...@@ -770,8 +770,7 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
pModal = &eep->modalHeader; pModal = &eep->modalHeader;
txRxAttenLocal = 23; txRxAttenLocal = 23;
REG_WRITE(ah, AR_PHY_SWITCH_COM, REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon);
ah->eep_ops->get_eeprom_antenna_cfg(ah, chan));
/* Single chain for 4K EEPROM*/ /* Single chain for 4K EEPROM*/
ath9k_hw_4k_set_gain(ah, pModal, eep, txRxAttenLocal); ath9k_hw_4k_set_gain(ah, pModal, eep, txRxAttenLocal);
...@@ -987,21 +986,6 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah, ...@@ -987,21 +986,6 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
} }
} }
static u32 ath9k_hw_4k_get_eeprom_antenna_cfg(struct ath_hw *ah,
struct ath9k_channel *chan)
{
struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k;
struct modal_eep_4k_header *pModal = &eep->modalHeader;
return pModal->antCtrlCommon;
}
static u8 ath9k_hw_4k_get_num_ant_config(struct ath_hw *ah,
enum ath9k_hal_freq_band freq_band)
{
return 1;
}
static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz) static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
{ {
#define EEP_MAP4K_SPURCHAN \ #define EEP_MAP4K_SPURCHAN \
...@@ -1038,8 +1022,6 @@ const struct eeprom_ops eep_4k_ops = { ...@@ -1038,8 +1022,6 @@ const struct eeprom_ops eep_4k_ops = {
.fill_eeprom = ath9k_hw_4k_fill_eeprom, .fill_eeprom = ath9k_hw_4k_fill_eeprom,
.get_eeprom_ver = ath9k_hw_4k_get_eeprom_ver, .get_eeprom_ver = ath9k_hw_4k_get_eeprom_ver,
.get_eeprom_rev = ath9k_hw_4k_get_eeprom_rev, .get_eeprom_rev = ath9k_hw_4k_get_eeprom_rev,
.get_num_ant_config = ath9k_hw_4k_get_num_ant_config,
.get_eeprom_antenna_cfg = ath9k_hw_4k_get_eeprom_antenna_cfg,
.set_board_values = ath9k_hw_4k_set_board_values, .set_board_values = ath9k_hw_4k_set_board_values,
.set_addac = ath9k_hw_4k_set_addac, .set_addac = ath9k_hw_4k_set_addac,
.set_txpower = ath9k_hw_4k_set_txpower, .set_txpower = ath9k_hw_4k_set_txpower,
......
...@@ -866,8 +866,7 @@ static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah, ...@@ -866,8 +866,7 @@ static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah,
antWrites[j++] = (u16)(pModal->antCtrlChain[i] & 0x3); antWrites[j++] = (u16)(pModal->antCtrlChain[i] & 0x3);
} }
REG_WRITE(ah, AR_PHY_SWITCH_COM, REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon);
ah->eep_ops->get_eeprom_antenna_cfg(ah, chan));
for (i = 0; i < AR9287_MAX_CHAINS; i++) { for (i = 0; i < AR9287_MAX_CHAINS; i++) {
regChainOffset = i * 0x1000; regChainOffset = i * 0x1000;
...@@ -968,21 +967,6 @@ static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah, ...@@ -968,21 +967,6 @@ static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah,
pModal->xpaBiasLvl); pModal->xpaBiasLvl);
} }
static u8 ath9k_hw_ar9287_get_num_ant_config(struct ath_hw *ah,
enum ath9k_hal_freq_band freq_band)
{
return 1;
}
static u32 ath9k_hw_ar9287_get_eeprom_antenna_cfg(struct ath_hw *ah,
struct ath9k_channel *chan)
{
struct ar9287_eeprom *eep = &ah->eeprom.map9287;
struct modal_eep_ar9287_header *pModal = &eep->modalHeader;
return pModal->antCtrlCommon;
}
static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah, static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah,
u16 i, bool is2GHz) u16 i, bool is2GHz)
{ {
...@@ -1020,8 +1004,6 @@ const struct eeprom_ops eep_ar9287_ops = { ...@@ -1020,8 +1004,6 @@ const struct eeprom_ops eep_ar9287_ops = {
.fill_eeprom = ath9k_hw_ar9287_fill_eeprom, .fill_eeprom = ath9k_hw_ar9287_fill_eeprom,
.get_eeprom_ver = ath9k_hw_ar9287_get_eeprom_ver, .get_eeprom_ver = ath9k_hw_ar9287_get_eeprom_ver,
.get_eeprom_rev = ath9k_hw_ar9287_get_eeprom_rev, .get_eeprom_rev = ath9k_hw_ar9287_get_eeprom_rev,
.get_num_ant_config = ath9k_hw_ar9287_get_num_ant_config,
.get_eeprom_antenna_cfg = ath9k_hw_ar9287_get_eeprom_antenna_cfg,
.set_board_values = ath9k_hw_ar9287_set_board_values, .set_board_values = ath9k_hw_ar9287_set_board_values,
.set_addac = ath9k_hw_ar9287_set_addac, .set_addac = ath9k_hw_ar9287_set_addac,
.set_txpower = ath9k_hw_ar9287_set_txpower, .set_txpower = ath9k_hw_ar9287_set_txpower,
......
...@@ -374,8 +374,7 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah, ...@@ -374,8 +374,7 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
pModal = &(eep->modalHeader[IS_CHAN_2GHZ(chan)]); pModal = &(eep->modalHeader[IS_CHAN_2GHZ(chan)]);
txRxAttenLocal = IS_CHAN_2GHZ(chan) ? 23 : 44; txRxAttenLocal = IS_CHAN_2GHZ(chan) ? 23 : 44;
REG_WRITE(ah, AR_PHY_SWITCH_COM, REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon & 0xffff);
ah->eep_ops->get_eeprom_antenna_cfg(ah, chan));
for (i = 0; i < AR5416_MAX_CHAINS; i++) { for (i = 0; i < AR5416_MAX_CHAINS; i++) {
if (AR_SREV_9280(ah)) { if (AR_SREV_9280(ah)) {
...@@ -1264,34 +1263,6 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah, ...@@ -1264,34 +1263,6 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
| ATH9K_POW_SM(pModal->pwrDecreaseFor2Chain, 0)); | ATH9K_POW_SM(pModal->pwrDecreaseFor2Chain, 0));
} }
static u8 ath9k_hw_def_get_num_ant_config(struct ath_hw *ah,
enum ath9k_hal_freq_band freq_band)
{
struct ar5416_eeprom_def *eep = &ah->eeprom.def;
struct modal_eep_header *pModal =
&(eep->modalHeader[freq_band]);
struct base_eep_header *pBase = &eep->baseEepHeader;
u8 num_ant_config;
num_ant_config = 1;
if (pBase->version >= 0x0E0D &&
(pModal->lna_ctl & LNA_CTL_USE_ANT1))
num_ant_config += 1;
return num_ant_config;
}
static u32 ath9k_hw_def_get_eeprom_antenna_cfg(struct ath_hw *ah,
struct ath9k_channel *chan)
{
struct ar5416_eeprom_def *eep = &ah->eeprom.def;
struct modal_eep_header *pModal =
&(eep->modalHeader[IS_CHAN_2GHZ(chan)]);
return pModal->antCtrlCommon;
}
static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz) static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
{ {
#define EEP_DEF_SPURCHAN \ #define EEP_DEF_SPURCHAN \
...@@ -1328,8 +1299,6 @@ const struct eeprom_ops eep_def_ops = { ...@@ -1328,8 +1299,6 @@ const struct eeprom_ops eep_def_ops = {
.fill_eeprom = ath9k_hw_def_fill_eeprom, .fill_eeprom = ath9k_hw_def_fill_eeprom,
.get_eeprom_ver = ath9k_hw_def_get_eeprom_ver, .get_eeprom_ver = ath9k_hw_def_get_eeprom_ver,
.get_eeprom_rev = ath9k_hw_def_get_eeprom_rev, .get_eeprom_rev = ath9k_hw_def_get_eeprom_rev,
.get_num_ant_config = ath9k_hw_def_get_num_ant_config,
.get_eeprom_antenna_cfg = ath9k_hw_def_get_eeprom_antenna_cfg,
.set_board_values = ath9k_hw_def_set_board_values, .set_board_values = ath9k_hw_def_set_board_values,
.set_addac = ath9k_hw_def_set_addac, .set_addac = ath9k_hw_def_set_addac,
.set_txpower = ath9k_hw_def_set_txpower, .set_txpower = ath9k_hw_def_set_txpower,
......
...@@ -1902,11 +1902,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) ...@@ -1902,11 +1902,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
AR_SREV_5416(ah)) AR_SREV_5416(ah))
pCap->reg_cap |= AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND; pCap->reg_cap |= AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND;
pCap->num_antcfg_5ghz =
ah->eep_ops->get_num_ant_config(ah, ATH9K_HAL_FREQ_BAND_5GHZ);
pCap->num_antcfg_2ghz =
ah->eep_ops->get_num_ant_config(ah, ATH9K_HAL_FREQ_BAND_2GHZ);
if (AR_SREV_9280_20_OR_LATER(ah) && common->btcoex_enabled) { if (AR_SREV_9280_20_OR_LATER(ah) && common->btcoex_enabled) {
btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO; btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO;
btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO; btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO;
......
...@@ -204,8 +204,6 @@ struct ath9k_hw_capabilities { ...@@ -204,8 +204,6 @@ struct ath9k_hw_capabilities {
u16 tx_triglevel_max; u16 tx_triglevel_max;
u16 reg_cap; u16 reg_cap;
u8 num_gpio_pins; u8 num_gpio_pins;
u8 num_antcfg_2ghz;
u8 num_antcfg_5ghz;
u8 rx_hp_qdepth; u8 rx_hp_qdepth;
u8 rx_lp_qdepth; u8 rx_lp_qdepth;
u8 rx_status_len; u8 rx_status_len;
......
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