提交 cfe8cba9 编写于 作者: L Luis R. Rodriguez 提交者: John W. Linville

ath9k: clarify what hw code is and remove ath9k.h from a few files

hw code will be shared between ath9k and ath9k_htc.
Just a few more files are left to clean up, mark them as well.
Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
上级 9680e8a3
ath9k-y += hw.o \
eeprom.o \
ATH9K_HW_FIX += eeprom.o \
mac.o \
ATH9K_HW += hw.o \
eeprom_def.o \
eeprom_4k.o \
eeprom_9287.o \
mac.o \
calib.o \
ani.o \
phy.o \
btcoex.o
ath9k-y += $(ATH9K_HW) \
$(ATH9K_HW_FIX) \
beacon.o \
main.o \
recv.o \
xmit.o \
virtual.o \
rc.o \
btcoex.o
rc.o
ath9k-$(CONFIG_PCI) += pci.o
ath9k-$(CONFIG_ATHEROS_AR71XX) += ahb.o
......
......@@ -14,7 +14,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ath9k.h"
#include "hw.h"
static int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah,
struct ath9k_channel *chan)
......
......@@ -499,7 +499,6 @@ struct ath_led {
* Used when PCI device not fully initialized by bootrom/BIOS
*/
#define DEFAULT_CACHELINE 32
#define ATH_DEFAULT_NOISE_FLOOR -95
#define ATH_REGCLASSIDS_MAX 10
#define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
#define ATH_MAX_SW_RETRIES 10
......
......@@ -14,7 +14,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ath9k.h"
#include "hw.h"
enum ath_bt_mode {
ATH_BT_COEX_MODE_LEGACY, /* legacy rx_clear mode */
......
......@@ -14,7 +14,6 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ath9k.h"
#include "hw.h"
/* We can tune this as we go by monitoring really low values */
......
......@@ -14,7 +14,6 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ath9k.h"
#include "hw.h"
static int ath9k_hw_4k_get_eeprom_ver(struct ath_hw *ah)
......
......@@ -14,7 +14,6 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ath9k.h"
#include "hw.h"
static int ath9k_hw_AR9287_get_eeprom_ver(struct ath_hw *ah)
......
......@@ -14,7 +14,6 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ath9k.h"
#include "hw.h"
static void ath9k_get_txgain_index(struct ath_hw *ah,
......
......@@ -18,7 +18,7 @@
#include <asm/unaligned.h>
#include "hw.h"
#include "ath9k.h"
#include "rc.h"
#include "initvals.h"
#define ATH9K_CLOCK_RATE_CCK 22
......
......@@ -53,6 +53,8 @@
#define ATH_AMPDU_LIMIT_MAX (64 * 1024 - 1)
#define ATH_DEFAULT_NOISE_FLOOR -95
/* Register read/write primitives */
#define REG_WRITE(_ah, _reg, _val) \
ath9k_hw_common(_ah)->ops->write((_ah), (_val), (_reg))
......
......@@ -15,7 +15,6 @@
*/
#include "ath9k.h"
#include "hw.h"
static void ath9k_hw_set_txq_interrupts(struct ath_hw *ah,
struct ath9k_tx_queue_info *qi)
......
......@@ -14,7 +14,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ath9k.h"
#include "hw.h"
void
ath9k_hw_write_regs(struct ath_hw *ah, u32 modesIndex, u32 freqIndex,
......
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