提交 cddb7835 编写于 作者: R Russell King 提交者: Russell King
...@@ -103,10 +103,10 @@ static struct omap_clk omap24xx_clks[] = { ...@@ -103,10 +103,10 @@ static struct omap_clk omap24xx_clks[] = {
CLK(NULL, "mdm_ick", &mdm_ick, CK_243X), CLK(NULL, "mdm_ick", &mdm_ick, CK_243X),
CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X), CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X),
/* DSS domain clocks */ /* DSS domain clocks */
CLK(NULL, "dss_ick", &dss_ick, CK_243X | CK_242X), CLK("omapfb", "ick", &dss_ick, CK_243X | CK_242X),
CLK(NULL, "dss1_fck", &dss1_fck, CK_243X | CK_242X), CLK("omapfb", "dss1_fck", &dss1_fck, CK_243X | CK_242X),
CLK(NULL, "dss2_fck", &dss2_fck, CK_243X | CK_242X), CLK("omapfb", "dss2_fck", &dss2_fck, CK_243X | CK_242X),
CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_243X | CK_242X), CLK("omapfb", "tv_fck", &dss_54m_fck, CK_243X | CK_242X),
/* L3 domain clocks */ /* L3 domain clocks */
CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X), CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X),
CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X), CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X),
...@@ -206,7 +206,7 @@ static struct omap_clk omap24xx_clks[] = { ...@@ -206,7 +206,7 @@ static struct omap_clk omap24xx_clks[] = {
CLK(NULL, "aes_ick", &aes_ick, CK_243X | CK_242X), CLK(NULL, "aes_ick", &aes_ick, CK_243X | CK_242X),
CLK(NULL, "pka_ick", &pka_ick, CK_243X | CK_242X), CLK(NULL, "pka_ick", &pka_ick, CK_243X | CK_242X),
CLK(NULL, "usb_fck", &usb_fck, CK_243X | CK_242X), CLK(NULL, "usb_fck", &usb_fck, CK_243X | CK_242X),
CLK(NULL, "usbhs_ick", &usbhs_ick, CK_243X), CLK("musb_hdrc", "ick", &usbhs_ick, CK_243X),
CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_243X), CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_243X),
CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_243X), CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_243X),
CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_243X), CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_243X),
......
...@@ -157,7 +157,7 @@ static struct omap_clk omap34xx_clks[] = { ...@@ -157,7 +157,7 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck, CK_343X), CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck, CK_343X),
CLK(NULL, "ssi_sst_fck", &ssi_sst_fck, CK_343X), CLK(NULL, "ssi_sst_fck", &ssi_sst_fck, CK_343X),
CLK(NULL, "core_l3_ick", &core_l3_ick, CK_343X), CLK(NULL, "core_l3_ick", &core_l3_ick, CK_343X),
CLK(NULL, "hsotgusb_ick", &hsotgusb_ick, CK_343X), CLK("musb_hdrc", "ick", &hsotgusb_ick, CK_343X),
CLK(NULL, "sdrc_ick", &sdrc_ick, CK_343X), CLK(NULL, "sdrc_ick", &sdrc_ick, CK_343X),
CLK(NULL, "gpmc_fck", &gpmc_fck, CK_343X), CLK(NULL, "gpmc_fck", &gpmc_fck, CK_343X),
CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X), CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X),
...@@ -197,11 +197,11 @@ static struct omap_clk omap34xx_clks[] = { ...@@ -197,11 +197,11 @@ static struct omap_clk omap34xx_clks[] = {
CLK("omap_rng", "ick", &rng_ick, CK_343X), CLK("omap_rng", "ick", &rng_ick, CK_343X),
CLK(NULL, "sha11_ick", &sha11_ick, CK_343X), CLK(NULL, "sha11_ick", &sha11_ick, CK_343X),
CLK(NULL, "des1_ick", &des1_ick, CK_343X), CLK(NULL, "des1_ick", &des1_ick, CK_343X),
CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck, CK_343X), CLK("omapfb", "dss1_fck", &dss1_alwon_fck, CK_343X),
CLK(NULL, "dss_tv_fck", &dss_tv_fck, CK_343X), CLK("omapfb", "tv_fck", &dss_tv_fck, CK_343X),
CLK(NULL, "dss_96m_fck", &dss_96m_fck, CK_343X), CLK("omapfb", "video_fck", &dss_96m_fck, CK_343X),
CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck, CK_343X), CLK("omapfb", "dss2_fck", &dss2_alwon_fck, CK_343X),
CLK(NULL, "dss_ick", &dss_ick, CK_343X), CLK("omapfb", "ick", &dss_ick, CK_343X),
CLK(NULL, "cam_mclk", &cam_mclk, CK_343X), CLK(NULL, "cam_mclk", &cam_mclk, CK_343X),
CLK(NULL, "cam_ick", &cam_ick, CK_343X), CLK(NULL, "cam_ick", &cam_ick, CK_343X),
CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X), CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X),
......
...@@ -2182,7 +2182,7 @@ static struct clk wkup_32k_fck = { ...@@ -2182,7 +2182,7 @@ static struct clk wkup_32k_fck = {
static struct clk gpio1_dbck = { static struct clk gpio1_dbck = {
.name = "gpio1_dbck", .name = "gpio1_dbck",
.ops = &clkops_omap2_dflt_wait, .ops = &clkops_omap2_dflt,
.parent = &wkup_32k_fck, .parent = &wkup_32k_fck,
.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO1_SHIFT, .enable_bit = OMAP3430_EN_GPIO1_SHIFT,
...@@ -2427,7 +2427,7 @@ static struct clk per_32k_alwon_fck = { ...@@ -2427,7 +2427,7 @@ static struct clk per_32k_alwon_fck = {
static struct clk gpio6_dbck = { static struct clk gpio6_dbck = {
.name = "gpio6_dbck", .name = "gpio6_dbck",
.ops = &clkops_omap2_dflt_wait, .ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO6_SHIFT, .enable_bit = OMAP3430_EN_GPIO6_SHIFT,
...@@ -2437,7 +2437,7 @@ static struct clk gpio6_dbck = { ...@@ -2437,7 +2437,7 @@ static struct clk gpio6_dbck = {
static struct clk gpio5_dbck = { static struct clk gpio5_dbck = {
.name = "gpio5_dbck", .name = "gpio5_dbck",
.ops = &clkops_omap2_dflt_wait, .ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO5_SHIFT, .enable_bit = OMAP3430_EN_GPIO5_SHIFT,
...@@ -2447,7 +2447,7 @@ static struct clk gpio5_dbck = { ...@@ -2447,7 +2447,7 @@ static struct clk gpio5_dbck = {
static struct clk gpio4_dbck = { static struct clk gpio4_dbck = {
.name = "gpio4_dbck", .name = "gpio4_dbck",
.ops = &clkops_omap2_dflt_wait, .ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO4_SHIFT, .enable_bit = OMAP3430_EN_GPIO4_SHIFT,
...@@ -2457,7 +2457,7 @@ static struct clk gpio4_dbck = { ...@@ -2457,7 +2457,7 @@ static struct clk gpio4_dbck = {
static struct clk gpio3_dbck = { static struct clk gpio3_dbck = {
.name = "gpio3_dbck", .name = "gpio3_dbck",
.ops = &clkops_omap2_dflt_wait, .ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO3_SHIFT, .enable_bit = OMAP3430_EN_GPIO3_SHIFT,
...@@ -2467,7 +2467,7 @@ static struct clk gpio3_dbck = { ...@@ -2467,7 +2467,7 @@ static struct clk gpio3_dbck = {
static struct clk gpio2_dbck = { static struct clk gpio2_dbck = {
.name = "gpio2_dbck", .name = "gpio2_dbck",
.ops = &clkops_omap2_dflt_wait, .ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO2_SHIFT, .enable_bit = OMAP3430_EN_GPIO2_SHIFT,
......
...@@ -354,10 +354,12 @@ static void omap_init_mcspi(void) ...@@ -354,10 +354,12 @@ static void omap_init_mcspi(void)
platform_device_register(&omap2_mcspi1); platform_device_register(&omap2_mcspi1);
platform_device_register(&omap2_mcspi2); platform_device_register(&omap2_mcspi2);
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
platform_device_register(&omap2_mcspi3); if (cpu_is_omap2430() || cpu_is_omap343x())
platform_device_register(&omap2_mcspi3);
#endif #endif
#ifdef CONFIG_ARCH_OMAP3 #ifdef CONFIG_ARCH_OMAP3
platform_device_register(&omap2_mcspi4); if (cpu_is_omap343x())
platform_device_register(&omap2_mcspi4);
#endif #endif
} }
......
...@@ -409,7 +409,7 @@ ...@@ -409,7 +409,7 @@
/* PM_PREPWSTST_CAM specific bits */ /* PM_PREPWSTST_CAM specific bits */
/* PM_PWSTCTRL_USBHOST specific bits */ /* PM_PWSTCTRL_USBHOST specific bits */
#define OMAP3430ES2_SAVEANDRESTORE_SHIFT (1 << 4) #define OMAP3430ES2_SAVEANDRESTORE_SHIFT 4
/* RM_RSTST_PER specific bits */ /* RM_RSTST_PER specific bits */
......
...@@ -187,7 +187,7 @@ int tusb6010_platform_retime(unsigned is_refclk) ...@@ -187,7 +187,7 @@ int tusb6010_platform_retime(unsigned is_refclk)
unsigned sysclk_ps; unsigned sysclk_ps;
int status; int status;
if (!refclk_psec || sysclk_ps == 0) if (!refclk_psec || fclk_ps == 0)
return -ENODEV; return -ENODEV;
sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60; sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;
......
...@@ -206,9 +206,10 @@ void __init omapfb_reserve_sdram(void) ...@@ -206,9 +206,10 @@ void __init omapfb_reserve_sdram(void)
config_invalid = 1; config_invalid = 1;
return; return;
} }
if (rg.paddr) if (rg.paddr) {
reserve_bootmem(rg.paddr, rg.size, BOOTMEM_DEFAULT); reserve_bootmem(rg.paddr, rg.size, BOOTMEM_DEFAULT);
reserved += rg.size; reserved += rg.size;
}
omapfb_config.mem_desc.region[i] = rg; omapfb_config.mem_desc.region[i] = rg;
configured_regions++; configured_regions++;
} }
......
...@@ -307,7 +307,7 @@ static inline int gpio_valid(int gpio) ...@@ -307,7 +307,7 @@ static inline int gpio_valid(int gpio)
return 0; return 0;
if (cpu_is_omap24xx() && gpio < 128) if (cpu_is_omap24xx() && gpio < 128)
return 0; return 0;
if (cpu_is_omap34xx() && gpio < 160) if (cpu_is_omap34xx() && gpio < 192)
return 0; return 0;
return -1; return -1;
} }
......
...@@ -880,20 +880,22 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *dev) ...@@ -880,20 +880,22 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *dev)
static int get_dss_clocks(void) static int get_dss_clocks(void)
{ {
if (IS_ERR((dispc.dss_ick = clk_get(dispc.fbdev->dev, "dss_ick")))) { dispc.dss_ick = clk_get(dispc.fbdev->dev, "ick");
dev_err(dispc.fbdev->dev, "can't get dss_ick\n"); if (IS_ERR(dispc.dss_ick)) {
dev_err(dispc.fbdev->dev, "can't get ick\n");
return PTR_ERR(dispc.dss_ick); return PTR_ERR(dispc.dss_ick);
} }
if (IS_ERR((dispc.dss1_fck = clk_get(dispc.fbdev->dev, "dss1_fck")))) { dispc.dss1_fck = clk_get(dispc.fbdev->dev, "dss1_fck");
if (IS_ERR(dispc.dss1_fck)) {
dev_err(dispc.fbdev->dev, "can't get dss1_fck\n"); dev_err(dispc.fbdev->dev, "can't get dss1_fck\n");
clk_put(dispc.dss_ick); clk_put(dispc.dss_ick);
return PTR_ERR(dispc.dss1_fck); return PTR_ERR(dispc.dss1_fck);
} }
if (IS_ERR((dispc.dss_54m_fck = dispc.dss_54m_fck = clk_get(dispc.fbdev->dev, "tv_fck");
clk_get(dispc.fbdev->dev, "dss_54m_fck")))) { if (IS_ERR(dispc.dss_54m_fck)) {
dev_err(dispc.fbdev->dev, "can't get dss_54m_fck\n"); dev_err(dispc.fbdev->dev, "can't get tv_fck\n");
clk_put(dispc.dss_ick); clk_put(dispc.dss_ick);
clk_put(dispc.dss1_fck); clk_put(dispc.dss1_fck);
return PTR_ERR(dispc.dss_54m_fck); return PTR_ERR(dispc.dss_54m_fck);
......
...@@ -83,12 +83,14 @@ static inline u32 rfbi_read_reg(int idx) ...@@ -83,12 +83,14 @@ static inline u32 rfbi_read_reg(int idx)
static int rfbi_get_clocks(void) static int rfbi_get_clocks(void)
{ {
if (IS_ERR((rfbi.dss_ick = clk_get(rfbi.fbdev->dev, "dss_ick")))) { rfbi.dss_ick = clk_get(rfbi.fbdev->dev, "ick");
dev_err(rfbi.fbdev->dev, "can't get dss_ick\n"); if (IS_ERR(rfbi.dss_ick)) {
dev_err(rfbi.fbdev->dev, "can't get ick\n");
return PTR_ERR(rfbi.dss_ick); return PTR_ERR(rfbi.dss_ick);
} }
if (IS_ERR((rfbi.dss1_fck = clk_get(rfbi.fbdev->dev, "dss1_fck")))) { rfbi.dss1_fck = clk_get(rfbi.fbdev->dev, "dss1_fck");
if (IS_ERR(rfbi.dss1_fck)) {
dev_err(rfbi.fbdev->dev, "can't get dss1_fck\n"); dev_err(rfbi.fbdev->dev, "can't get dss1_fck\n");
clk_put(rfbi.dss_ick); clk_put(rfbi.dss_ick);
return PTR_ERR(rfbi.dss1_fck); return PTR_ERR(rfbi.dss1_fck);
......
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