提交 875287ca 编写于 作者: L Linus Torvalds

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu:
  m68knommu: remove unecessary include of thread_info.h in entry.S
  m68knommu: enumerate INIT_THREAD fields properly
  headers_check fix: m68k, swab.h
  arch/m68knommu: Convert #ifdef DEBUG printk(KERN_DEBUG to pr_debug(
  m68knommu: remove obsolete reset code
  m68knommu: move CPU reset code for the 5272 ColdFire into its platform code
  m68knommu: move CPU reset code for the 528x ColdFire into its platform code
  m68knommu: move CPU reset code for the 527x ColdFire into its platform code
  m68knommu: move CPU reset code for the 523x ColdFire into its platform code
  m68knommu: move CPU reset code for the 520x ColdFire into its platform code
  m68knommu: add CPU reset code for the 532x ColdFire
  m68knommu: add CPU reset code for the 5249 ColdFire
  m68knommu: add CPU reset code for the 5206e ColdFire
  m68knommu: add CPU reset code for the 5206 ColdFire
  m68knommu: add CPU reset code for the 5407 ColdFire
  m68knommu: add CPU reset code for the 5307 ColdFire
  m68knommu: merge system reset for code ColdFire 523x family
  m68knommu: fix system reset for ColdFire 527x family
......@@ -59,5 +59,14 @@
#define MCFPIT_IMR MCFINTC_IMRL
#define MCFPIT_IMR_IBIT (1 << MCFINT_PIT1)
/*
* Reset Controll Unit.
*/
#define MCF_RCR 0xFC0A0000
#define MCF_RSR 0xFC0A0001
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */
/****************************************************************************/
#endif /* m520xsim_h */
......@@ -41,5 +41,14 @@
#define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */
#define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */
/*
* Reset Controll Unit (relative to IPSBAR).
*/
#define MCF_RCR 0x110000
#define MCF_RSR 0x110001
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */
/****************************************************************************/
#endif /* m523xsim_h */
......@@ -70,5 +70,14 @@
#define UART2_ENABLE_MASK 0x3f00
#endif
/*
* Reset Controll Unit (relative to IPSBAR).
*/
#define MCF_RCR 0x110000
#define MCF_RSR 0x110001
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */
/****************************************************************************/
#endif /* m527xsim_h */
......@@ -56,6 +56,14 @@
#define MCF5282_INTC0_ICR17 (volatile u8 *) (MCF_IPSBAR + 0x0C51)
/*
* Reset Control Unit (relative to IPSBAR).
*/
#define MCF_RCR 0x110000
#define MCF_RSR 0x110001
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */
/*********************************************************************
*
......
......@@ -125,6 +125,18 @@
#define ACR_CM_OFF_IMP (3<<5)
#define ACR_WPROTECT (1<<2)
/*********************************************************************
*
* Reset Controller Module
*
*********************************************************************/
#define MCF_RCR 0xFC0A0000
#define MCF_RSR 0xFC0A0001
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */
/*********************************************************************
*
* Inter-IC (I2C) Module
......
......@@ -72,10 +72,10 @@ struct thread_struct {
unsigned char fpstate[FPSTATESIZE]; /* floating point state */
};
#define INIT_THREAD { \
sizeof(init_stack) + (unsigned long) init_stack, 0, \
PS_S, __KERNEL_DS, \
{0, 0}, 0, {0,}, {0, 0, 0}, {0,}, \
#define INIT_THREAD { \
.ksp = sizeof(init_stack) + (unsigned long) init_stack, \
.sr = PS_S, \
.fs = __KERNEL_DS, \
}
/*
......
#ifndef _M68K_SWAB_H
#define _M68K_SWAB_H
#include <asm/types.h>
#include <linux/types.h>
#include <linux/compiler.h>
#define __SWAB_64_THRU_32__
......
......@@ -203,113 +203,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
#include <asm-generic/cmpxchg.h>
#endif
#if defined( CONFIG_M68328 ) || defined( CONFIG_M68EZ328 ) || \
defined (CONFIG_M68360) || defined( CONFIG_M68VZ328 )
#define HARD_RESET_NOW() ({ \
local_irq_disable(); \
asm(" \
moveal #0x10c00000, %a0; \
moveb #0, 0xFFFFF300; \
moveal 0(%a0), %sp; \
moveal 4(%a0), %a0; \
jmp (%a0); \
"); \
})
#endif
#ifdef CONFIG_COLDFIRE
#if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
/*
* Need to account for broken early mask of 5272 silicon. So don't
* jump through the original start address. Jump strait into the
* known start of the FLASH code.
*/
#define HARD_RESET_NOW() ({ \
asm(" \
movew #0x2700, %sr; \
jmp 0xf0000400; \
"); \
})
#elif defined(CONFIG_NETtel) || \
defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
#define HARD_RESET_NOW() ({ \
asm(" \
movew #0x2700, %sr; \
moveal #0x10000044, %a0; \
movel #0xffffffff, (%a0); \
moveal #0x10000001, %a0; \
moveb #0x00, (%a0); \
moveal #0xf0000004, %a0; \
moveal (%a0), %a0; \
jmp (%a0); \
"); \
})
#elif defined(CONFIG_M5272)
/*
* Retrieve the boot address in flash using CSBR0 and CSOR0
* find the reset vector at flash_address + 4 (e.g. 0x400)
* remap it in the flash's current location (e.g. 0xf0000400)
* and jump there.
*/
#define HARD_RESET_NOW() ({ \
asm(" \
movew #0x2700, %%sr; \
move.l %0+0x40,%%d0; \
and.l %0+0x44,%%d0; \
andi.l #0xfffff000,%%d0; \
mov.l %%d0,%%a0; \
or.l 4(%%a0),%%d0; \
mov.l %%d0,%%a0; \
jmp (%%a0);" \
: /* No output */ \
: "o" (*(char *)MCF_MBAR) ); \
})
#elif defined(CONFIG_M528x)
/*
* The MCF528x has a bit (SOFTRST) in memory (Reset Control Register RCR),
* that when set, resets the MCF528x.
*/
#define HARD_RESET_NOW() \
({ \
unsigned char volatile *reset; \
asm("move.w #0x2700, %sr"); \
reset = ((volatile unsigned char *)(MCF_IPSBAR + 0x110000)); \
while(1) \
*reset |= (0x01 << 7);\
})
#elif defined(CONFIG_M523x)
#define HARD_RESET_NOW() ({ \
asm(" \
movew #0x2700, %sr; \
movel #0x01000000, %sp; \
moveal #0x40110000, %a0; \
moveb #0x80, (%a0); \
"); \
})
#elif defined(CONFIG_M520x)
/*
* The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register
* RCR), that when set, resets the MCF5208.
*/
#define HARD_RESET_NOW() \
({ \
unsigned char volatile *reset; \
asm("move.w #0x2700, %sr"); \
reset = ((volatile unsigned char *)(MCF_IPSBAR + 0xA0000)); \
while(1) \
*reset |= 0x80; \
})
#else
#define HARD_RESET_NOW() ({ \
asm(" \
movew #0x2700, %sr; \
moveal #0x4, %a0; \
moveal (%a0), %a0; \
jmp (%a0); \
"); \
})
#endif
#endif
#define arch_align_stack(x) (x)
......
......@@ -26,7 +26,6 @@
#include <linux/sys.h>
#include <linux/linkage.h>
#include <asm/thread_info.h>
#include <asm/errno.h>
#include <asm/setup.h>
#include <asm/segment.h>
......
......@@ -166,15 +166,13 @@ void __init setup_arch(char **cmdline_p)
printk(KERN_INFO "Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n");
#endif
#ifdef DEBUG
printk(KERN_DEBUG "KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x "
"BSS=0x%06x-0x%06x\n", (int) &_stext, (int) &_etext,
(int) &_sdata, (int) &_edata,
(int) &_sbss, (int) &_ebss);
printk(KERN_DEBUG "MEMORY -> ROMFS=0x%06x-0x%06x MEM=0x%06x-0x%06x\n ",
(int) &_ebss, (int) memory_start,
(int) memory_start, (int) memory_end);
#endif
pr_debug("KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x "
"BSS=0x%06x-0x%06x\n", (int) &_stext, (int) &_etext,
(int) &_sdata, (int) &_edata,
(int) &_sbss, (int) &_ebss);
pr_debug("MEMORY -> ROMFS=0x%06x-0x%06x MEM=0x%06x-0x%06x\n ",
(int) &_ebss, (int) memory_start,
(int) memory_start, (int) memory_end);
/* Keep a copy of command line */
*cmdline_p = &command_line[0];
......
......@@ -126,9 +126,7 @@ void __init mem_init(void)
unsigned long start_mem = memory_start; /* DAVIDM - these must start at end of kernel */
unsigned long end_mem = memory_end; /* DAVIDM - this must not include kernel stack at top */
#ifdef DEBUG
printk(KERN_DEBUG "Mem_init: start=%lx, end=%lx\n", start_mem, end_mem);
#endif
pr_debug("Mem_init: start=%lx, end=%lx\n", start_mem, end_mem);
end_mem &= PAGE_MASK;
high_memory = (void *) end_mem;
......
......@@ -12,7 +12,6 @@
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
......@@ -21,10 +20,6 @@
/***************************************************************************/
void coldfire_reset(void);
/***************************************************************************/
static struct mcf_platform_uart m5206_uart_platform[] = {
{
.mapbase = MCF_MBAR + MCFUART_BASE1,
......@@ -109,10 +104,21 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
/***************************************************************************/
void m5206_cpu_reset(void)
{
local_irq_disable();
/* Set watchdog to soft reset, and enabled */
__raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
for (;;)
/* wait for watchdog to timeout */;
}
/***************************************************************************/
void __init config_BSP(char *commandp, int size)
{
mcf_setimr(MCFSIM_IMR_MASKALL);
mach_reset = coldfire_reset;
mach_reset = m5206_cpu_reset;
}
/***************************************************************************/
......
......@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
......@@ -21,10 +20,6 @@
/***************************************************************************/
void coldfire_reset(void);
/***************************************************************************/
static struct mcf_platform_uart m5206e_uart_platform[] = {
{
.mapbase = MCF_MBAR + MCFUART_BASE1,
......@@ -109,6 +104,17 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
/***************************************************************************/
void m5206e_cpu_reset(void)
{
local_irq_disable();
/* Set watchdog to soft reset, and enabled */
__raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
for (;;)
/* wait for watchdog to timeout */;
}
/***************************************************************************/
void __init config_BSP(char *commandp, int size)
{
mcf_setimr(MCFSIM_IMR_MASKALL);
......@@ -119,7 +125,7 @@ void __init config_BSP(char *commandp, int size)
commandp[size-1] = 0;
#endif /* CONFIG_NETtel */
mach_reset = coldfire_reset;
mach_reset = m5206e_cpu_reset;
}
/***************************************************************************/
......
......@@ -14,7 +14,6 @@
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
......@@ -23,10 +22,6 @@
/***************************************************************************/
void coldfire_reset(void);
/***************************************************************************/
static struct mcf_platform_uart m520x_uart_platform[] = {
{
.mapbase = MCF_MBAR + MCFUART_BASE1,
......@@ -169,9 +164,17 @@ void mcf_autovector(unsigned int vec)
/***************************************************************************/
static void m520x_cpu_reset(void)
{
local_irq_disable();
__raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
}
/***************************************************************************/
void __init config_BSP(char *commandp, int size)
{
mach_reset = coldfire_reset;
mach_reset = m520x_cpu_reset;
m520x_uarts_init();
m520x_fec_init();
}
......
......@@ -15,7 +15,6 @@
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
......@@ -24,10 +23,6 @@
/***************************************************************************/
void coldfire_reset(void);
/***************************************************************************/
static struct mcf_platform_uart m523x_uart_platform[] = {
{
.mapbase = MCF_MBAR + MCFUART_BASE1,
......@@ -145,13 +140,20 @@ void mcf_autovector(unsigned int vec)
{
/* Everything is auto-vectored on the 523x */
}
/***************************************************************************/
static void m523x_cpu_reset(void)
{
local_irq_disable();
__raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
}
/***************************************************************************/
void __init config_BSP(char *commandp, int size)
{
mcf_disableall();
mach_reset = coldfire_reset;
mach_reset = m523x_cpu_reset;
m523x_uarts_init();
m523x_fec_init();
}
......
......@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
......@@ -20,10 +19,6 @@
/***************************************************************************/
void coldfire_reset(void);
/***************************************************************************/
static struct mcf_platform_uart m5249_uart_platform[] = {
{
.mapbase = MCF_MBAR + MCFUART_BASE1,
......@@ -106,10 +101,21 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
/***************************************************************************/
void m5249_cpu_reset(void)
{
local_irq_disable();
/* Set watchdog to soft reset, and enabled */
__raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
for (;;)
/* wait for watchdog to timeout */;
}
/***************************************************************************/
void __init config_BSP(char *commandp, int size)
{
mcf_setimr(MCFSIM_IMR_MASKALL);
mach_reset = coldfire_reset;
mach_reset = m5249_cpu_reset;
}
/***************************************************************************/
......
......@@ -12,7 +12,6 @@
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
......@@ -21,8 +20,6 @@
/***************************************************************************/
void coldfire_reset(void);
extern unsigned int mcf_timervector;
extern unsigned int mcf_profilevector;
extern unsigned int mcf_timerlevel;
......@@ -170,6 +167,19 @@ void mcf_settimericr(int timer, int level)
/***************************************************************************/
static void m5272_cpu_reset(void)
{
local_irq_disable();
/* Set watchdog to reset, and enabled */
__raw_writew(0, MCF_MBAR + MCFSIM_WIRR);
__raw_writew(1, MCF_MBAR + MCFSIM_WRRR);
__raw_writew(0, MCF_MBAR + MCFSIM_WCR);
for (;;)
/* wait for watchdog to timeout */;
}
/***************************************************************************/
void __init config_BSP(char *commandp, int size)
{
#if defined (CONFIG_MOD5272)
......@@ -194,7 +204,7 @@ void __init config_BSP(char *commandp, int size)
mcf_timervector = 69;
mcf_profilevector = 70;
mach_reset = coldfire_reset;
mach_reset = m5272_cpu_reset;
}
/***************************************************************************/
......
......@@ -15,7 +15,6 @@
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
......@@ -24,10 +23,6 @@
/***************************************************************************/
void coldfire_reset(void);
/***************************************************************************/
static struct mcf_platform_uart m527x_uart_platform[] = {
{
.mapbase = MCF_MBAR + MCFUART_BASE1,
......@@ -227,10 +222,18 @@ void mcf_autovector(unsigned int vec)
/***************************************************************************/
static void m527x_cpu_reset(void)
{
local_irq_disable();
__raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
}
/***************************************************************************/
void __init config_BSP(char *commandp, int size)
{
mcf_disableall();
mach_reset = coldfire_reset;
mach_reset = m527x_cpu_reset;
m527x_uarts_init();
m527x_fec_init();
}
......
......@@ -31,10 +31,6 @@
/***************************************************************************/
void coldfire_reset(void);
/***************************************************************************/
static struct mcf_platform_uart m528x_uart_platform[] = {
{
.mapbase = MCF_MBAR + MCFUART_BASE1,
......@@ -171,6 +167,14 @@ void mcf_autovector(unsigned int vec)
/***************************************************************************/
static void m528x_cpu_reset(void)
{
local_irq_disable();
__raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
}
/***************************************************************************/
#ifdef CONFIG_WILDFIRE
void wildfire_halt(void)
{
......@@ -214,6 +218,7 @@ void __init config_BSP(char *commandp, int size)
static int __init init_BSP(void)
{
mach_reset = m528x_cpu_reset;
m528x_uarts_init();
m528x_fec_init();
platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices));
......
......@@ -12,7 +12,6 @@
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
......@@ -22,8 +21,6 @@
/***************************************************************************/
void coldfire_reset(void);
extern unsigned int mcf_timervector;
extern unsigned int mcf_profilevector;
extern unsigned int mcf_timerlevel;
......@@ -119,6 +116,17 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
/***************************************************************************/
void m5307_cpu_reset(void)
{
local_irq_disable();
/* Set watchdog to soft reset, and enabled */
__raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
for (;;)
/* wait for watchdog to timeout */;
}
/***************************************************************************/
void __init config_BSP(char *commandp, int size)
{
mcf_setimr(MCFSIM_IMR_MASKALL);
......@@ -134,7 +142,7 @@ void __init config_BSP(char *commandp, int size)
mcf_timerlevel = 6;
#endif
mach_reset = coldfire_reset;
mach_reset = m5307_cpu_reset;
#ifdef CONFIG_BDM_DISABLE
/*
......
......@@ -31,8 +31,6 @@
/***************************************************************************/
void coldfire_reset(void);
extern unsigned int mcf_timervector;
extern unsigned int mcf_profilevector;
extern unsigned int mcf_timerlevel;
......@@ -164,6 +162,14 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
/***************************************************************************/
static void m532x_cpu_reset(void)
{
local_irq_disable();
__raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
}
/***************************************************************************/
void __init config_BSP(char *commandp, int size)
{
mcf_setimr(MCFSIM_IMR_MASKALL);
......@@ -181,7 +187,7 @@ void __init config_BSP(char *commandp, int size)
mcf_timervector = 64+32;
mcf_profilevector = 64+33;
mach_reset = coldfire_reset;
mach_reset = m532x_cpu_reset;
#ifdef CONFIG_BDM_DISABLE
/*
......
......@@ -12,7 +12,6 @@
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
......@@ -21,8 +20,6 @@
/***************************************************************************/
void coldfire_reset(void);
extern unsigned int mcf_timervector;
extern unsigned int mcf_profilevector;
extern unsigned int mcf_timerlevel;
......@@ -110,6 +107,17 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
/***************************************************************************/
void m5407_cpu_reset(void)
{
local_irq_disable();
/* set watchdog to soft reset, and enabled */
__raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
for (;;)
/* wait for watchdog to timeout */;
}
/***************************************************************************/
void __init config_BSP(char *commandp, int size)
{
mcf_setimr(MCFSIM_IMR_MASKALL);
......@@ -121,7 +129,7 @@ void __init config_BSP(char *commandp, int size)
mcf_timerlevel = 6;
#endif
mach_reset = coldfire_reset;
mach_reset = m5407_cpu_reset;
}
/***************************************************************************/
......
......@@ -96,10 +96,3 @@ void ack_vector(unsigned int irq)
}
/***************************************************************************/
void coldfire_reset(void)
{
HARD_RESET_NOW();
}
/***************************************************************************/
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