提交 75e06e2d 编写于 作者: P Paul Mackerras

Merge branch 'for-2.6.25' of master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx

......@@ -480,7 +480,7 @@ config MCA
config PCI
bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx \
|| PPC_MPC52xx || (EMBEDDED && (PPC_PSERIES || PPC_ISERIES)) \
|| PPC_PS3
|| PPC_PS3 || 44x
default y if !40x && !CPM2 && !8xx && !PPC_83xx \
&& !PPC_85xx && !PPC_86xx
default PCI_PERMEDIA if !4xx && !CPM2 && !8xx
......
......@@ -159,7 +159,7 @@ void ibm4xx_denali_fixup_memsize(void)
val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT);
cs = 0;
while (val) {
if (val && 0x1)
if (val & 0x1)
cs++;
val = val >> 1;
}
......
......@@ -62,7 +62,8 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \
fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c \
cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c
cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
cuboot-warp.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
......@@ -208,6 +209,7 @@ image-$(CONFIG_RAINIER) += cuImage.rainier
image-$(CONFIG_WALNUT) += treeImage.walnut
image-$(CONFIG_TAISHAN) += cuImage.taishan
image-$(CONFIG_KATMAI) += cuImage.katmai
image-$(CONFIG_WARP) += cuImage.warp
endif
ifneq ($(CONFIG_REDBOOT),"")
......
/*
* Copyright (c) 2008 PIKA Technologies
* Sean MacLennan <smaclennan@pikatech.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ops.h"
#include "4xx.h"
#include "cuboot.h"
#define TARGET_44x
#include "ppcboot.h"
static bd_t bd;
static void warp_fixups(void)
{
unsigned long sysclk = 66000000;
ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
ibm4xx_sdram_fixup_memsize();
ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
dt_fixup_mac_addresses(&bd.bi_enetaddr);
}
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
CUBOOT_INIT();
platform_ops.fixups = warp_fixups;
platform_ops.exit = ibm44x_dbcr_reset;
fdt_init(_dtb_start);
serial_console_init();
}
......@@ -158,9 +158,10 @@
};
};
ds1743@1,0 {
nvram@1,0 {
/* NVRAM & RTC */
compatible = "ds1743";
compatible = "ds1743-nvram";
#bytes = <2000>;
reg = <1 0 2000>;
};
......
/*
* Device Tree Source for AMCC Haleakala (405EXr)
*
* Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*/
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "amcc,haleakala";
compatible = "amcc,kilauea";
dcr-parent = <&/cpus/cpu@0>;
aliases {
ethernet0 = &EMAC0;
serial0 = &UART0;
serial1 = &UART1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
model = "PowerPC,405EXr";
reg = <0>;
clock-frequency = <0>; /* Filled in by U-Boot */
timebase-frequency = <0>; /* Filled in by U-Boot */
i-cache-line-size = <20>;
d-cache-line-size = <20>;
i-cache-size = <4000>; /* 16 kB */
d-cache-size = <4000>; /* 16 kB */
dcr-controller;
dcr-access-method = "native";
};
};
memory {
device_type = "memory";
reg = <0 0>; /* Filled in by U-Boot */
};
UIC0: interrupt-controller {
compatible = "ibm,uic-405exr", "ibm,uic";
interrupt-controller;
cell-index = <0>;
dcr-reg = <0c0 009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
};
UIC1: interrupt-controller1 {
compatible = "ibm,uic-405exr","ibm,uic";
interrupt-controller;
cell-index = <1>;
dcr-reg = <0d0 009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <1e 4 1f 4>; /* cascade */
interrupt-parent = <&UIC0>;
};
UIC2: interrupt-controller2 {
compatible = "ibm,uic-405exr","ibm,uic";
interrupt-controller;
cell-index = <2>;
dcr-reg = <0e0 009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <1c 4 1d 4>; /* cascade */
interrupt-parent = <&UIC0>;
};
plb {
compatible = "ibm,plb-405exr", "ibm,plb4";
#address-cells = <1>;
#size-cells = <1>;
ranges;
clock-frequency = <0>; /* Filled in by U-Boot */
SDRAM0: memory-controller {
compatible = "ibm,sdram-405exr";
dcr-reg = <010 2>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-405exr", "ibm,mcmal2";
dcr-reg = <180 62>;
num-tx-chans = <2>;
num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
interrupts = <0 1 2 3 4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
/*RXEOB*/ 1 &UIC0 b 4
/*SERR*/ 2 &UIC1 0 4
/*TXDE*/ 3 &UIC1 1 4
/*RXDE*/ 4 &UIC1 2 4>;
interrupt-map-mask = <ffffffff>;
};
POB0: opb {
compatible = "ibm,opb-405exr", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
ranges = <80000000 80000000 10000000
ef600000 ef600000 a00000
f0000000 f0000000 10000000>;
dcr-reg = <0a0 5>;
clock-frequency = <0>; /* Filled in by U-Boot */
EBC0: ebc {
compatible = "ibm,ebc-405exr", "ibm,ebc";
dcr-reg = <012 2>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by U-Boot */
/* ranges property is supplied by U-Boot */
interrupts = <5 1>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl512n", "cfi-flash";
bank-width = <2>;
reg = <0 000000 4000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0 200000>;
};
partition@200000 {
label = "root";
reg = <200000 200000>;
};
partition@400000 {
label = "user";
reg = <400000 3b60000>;
};
partition@3f60000 {
label = "env";
reg = <3f60000 40000>;
};
partition@3fa0000 {
label = "u-boot";
reg = <3fa0000 60000>;
};
};
};
UART0: serial@ef600200 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600200 8>;
virtual-reg = <ef600200>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>;
interrupt-parent = <&UIC0>;
interrupts = <1a 4>;
};
UART1: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600300 8>;
virtual-reg = <ef600300>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>;
interrupt-parent = <&UIC0>;
interrupts = <1 4>;
};
IIC0: i2c@ef600400 {
compatible = "ibm,iic-405exr", "ibm,iic";
reg = <ef600400 14>;
interrupt-parent = <&UIC0>;
interrupts = <2 4>;
};
IIC1: i2c@ef600500 {
compatible = "ibm,iic-405exr", "ibm,iic";
reg = <ef600500 14>;
interrupt-parent = <&UIC0>;
interrupts = <7 4>;
};
RGMII0: emac-rgmii@ef600b00 {
compatible = "ibm,rgmii-405exr", "ibm,rgmii";
reg = <ef600b00 104>;
has-mdio;
};
EMAC0: ethernet@ef600900 {
linux,network-index = <0>;
device_type = "network";
compatible = "ibm,emac-405exr", "ibm,emac4";
interrupt-parent = <&EMAC0>;
interrupts = <0 1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*Status*/ 0 &UIC0 18 4
/*Wake*/ 1 &UIC1 1d 4>;
reg = <ef600900 70>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rgmii";
phy-map = <00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
has-inverted-stacr-oc;
has-new-stacr-staopc;
};
};
PCIE0: pciex@0a0000000 {
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
compatible = "ibm,plb-pciex-405exr", "ibm,plb-pciex";
primary;
port = <0>; /* port number */
reg = <a0000000 20000000 /* Config space access */
ef000000 00001000>; /* Registers */
dcr-reg = <040 020>;
sdr-base = <400>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
ranges = <02000000 0 80000000 90000000 0 08000000
01000000 0 00000000 e0000000 0 00010000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <42000000 0 0 0 0 80000000>;
/* This drives busses 0x00 to 0x3f */
bus-range = <00 3f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
* We are de-swizzling here because the numbers are actually for
* port of the root complex virtual P2P bridge. But I want
* to avoid putting a node for it in the tree, so the numbers
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
interrupt-map-mask = <0000 0 0 7>;
interrupt-map = <
0000 0 0 1 &UIC2 0 4 /* swizzled int A */
0000 0 0 2 &UIC2 1 4 /* swizzled int B */
0000 0 0 3 &UIC2 2 4 /* swizzled int C */
0000 0 0 4 &UIC2 3 4 /* swizzled int D */>;
};
};
};
......@@ -175,9 +175,10 @@
};
};
ds1743@1,0 {
nvram@1,0 {
/* NVRAM and RTC */
compatible = "ds1743";
compatible = "ds1743-nvram";
#bytes = <2000>;
reg = <1 0 2000>;
};
......
/*
* Device Tree Source for PIKA Warp
*
* Copyright (c) 2008 PIKA Technologies
* Sean MacLennan <smaclennan@pikatech.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*/
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "pika,warp";
compatible = "pika,warp";
dcr-parent = <&/cpus/cpu@0>;
aliases {
ethernet0 = &EMAC0;
serial0 = &UART0;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
model = "PowerPC,440EP";
reg = <0>;
clock-frequency = <0>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
i-cache-line-size = <20>;
d-cache-line-size = <20>;
i-cache-size = <8000>;
d-cache-size = <8000>;
dcr-controller;
dcr-access-method = "native";
};
};
memory {
device_type = "memory";
reg = <0 0 0>; /* Filled in by zImage */
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-440ep","ibm,uic";
interrupt-controller;
cell-index = <0>;
dcr-reg = <0c0 009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
};
UIC1: interrupt-controller1 {
compatible = "ibm,uic-440ep","ibm,uic";
interrupt-controller;
cell-index = <1>;
dcr-reg = <0d0 009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <1e 4 1f 4>; /* cascade */
interrupt-parent = <&UIC0>;
};
SDR0: sdr {
compatible = "ibm,sdr-440ep";
dcr-reg = <00e 002>;
};
CPR0: cpr {
compatible = "ibm,cpr-440ep";
dcr-reg = <00c 002>;
};
plb {
compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
#address-cells = <2>;
#size-cells = <1>;
ranges;
clock-frequency = <0>; /* Filled in by zImage */
SDRAM0: sdram {
compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
dcr-reg = <010 2>;
};
DMA0: dma {
compatible = "ibm,dma-440ep", "ibm,dma-440gp";
dcr-reg = <100 027>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
dcr-reg = <180 62>;
num-tx-chans = <4>;
num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
interrupts = <0 1 2 3 4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
/*RXEOB*/ 1 &UIC0 b 4
/*SERR*/ 2 &UIC1 0 4
/*TXDE*/ 3 &UIC1 1 4
/*RXDE*/ 4 &UIC1 2 4>;
};
POB0: opb {
compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
ranges = <00000000 0 00000000 80000000
80000000 0 80000000 80000000>;
interrupt-parent = <&UIC1>;
interrupts = <7 4>;
clock-frequency = <0>; /* Filled in by zImage */
EBC0: ebc {
compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
dcr-reg = <012 2>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by zImage */
interrupts = <5 1>;
interrupt-parent = <&UIC1>;
fpga@2,0 {
compatible = "pika,fpga";
reg = <2 0 2200>;
interrupts = <18 8>;
interrupt-parent = <&UIC0>;
};
nor_flash@0,0 {
compatible = "amd,s29gl512n", "cfi-flash";
bank-width = <2>;
reg = <0 0 4000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0 180000>;
};
partition@180000 {
label = "root";
reg = <180000 3480000>;
};
partition@3600000 {
label = "user";
reg = <3600000 900000>;
};
partition@3f00000 {
label = "fpga";
reg = <3f00000 40000>;
};
partition@3f40000 {
label = "env";
reg = <3f40000 40000>;
};
partition@3f80000 {
label = "u-boot";
reg = <3f80000 80000>;
};
};
};
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600300 8>;
virtual-reg = <ef600300>;
clock-frequency = <0>; /* Filled in by zImage */
current-speed = <1c200>;
interrupt-parent = <&UIC0>;
interrupts = <0 4>;
};
IIC0: i2c@ef600700 {
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
reg = <ef600700 14>;
interrupt-parent = <&UIC0>;
interrupts = <2 4>;
};
GPIO0: gpio@ef600b00 {
compatible = "ibm,gpio-440ep";
reg = <ef600b00 48>;
};
GPIO1: gpio@ef600c00 {
compatible = "ibm,gpio-440ep";
reg = <ef600c00 48>;
};
ZMII0: emac-zmii@ef600d00 {
compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
reg = <ef600d00 c>;
};
EMAC0: ethernet@ef600e00 {
linux,network-index = <0>;
device_type = "network";
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
interrupts = <1c 4 1d 4>;
reg = <ef600e00 70>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <0 1>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rmii";
phy-map = <00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <0>;
};
usb@ef601000 {
compatible = "ohci-be";
reg = <ef601000 80>;
interrupts = <8 1 9 1>;
interrupt-parent = < &UIC1 >;
};
};
};
chosen {
linux,stdout-path = "/plb/opb/serial@ef600300";
};
};
此差异已折叠。
......@@ -1178,8 +1178,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
.platform = "ppc405",
},
{ /* 405EX */
.pvr_mask = 0xffff0000,
.pvr_value = 0x12910000,
.pvr_mask = 0xffff0004,
.pvr_value = 0x12910004,
.cpu_name = "405EX",
.cpu_features = CPU_FTRS_40X,
.cpu_user_features = PPC_FEATURE_32 |
......@@ -1189,6 +1189,18 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
{ /* 405EXr */
.pvr_mask = 0xffff0004,
.pvr_value = 0x12910000,
.cpu_name = "405EXr",
.cpu_features = CPU_FTRS_40X,
.cpu_user_features = PPC_FEATURE_32 |
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.icache_bsize = 32,
.dcache_bsize = 32,
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
#endif /* CONFIG_40x */
#ifdef CONFIG_44x
......@@ -1226,6 +1238,18 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check = machine_check_4xx,
.platform = "ppc440",
},
{ /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
.pvr_mask = 0xf0000ff7,
.pvr_value = 0x400008d4,
.cpu_name = "440EP Rev. C",
.cpu_features = CPU_FTRS_44X,
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
.icache_bsize = 32,
.dcache_bsize = 32,
.cpu_setup = __setup_cpu_440ep,
.machine_check = machine_check_4xx,
.platform = "ppc440",
},
{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
.pvr_mask = 0xf0000fff,
.pvr_value = 0x400008db,
......
......@@ -36,6 +36,7 @@ static __initdata struct of_device_id walnut_of_bus[] = {
static int __init walnut_device_probe(void)
{
of_platform_bus_probe(NULL, walnut_of_bus, NULL);
of_instantiate_rtc();
return 0;
}
......
......@@ -13,6 +13,7 @@ config EBONY
default y
select 440GP
select PCI
select OF_RTC
help
This option enables support for the IBM PPC440GP evaluation board.
......@@ -53,6 +54,19 @@ config RAINIER
help
This option enables support for the AMCC PPC440GRX evaluation board.
config WARP
bool "PIKA Warp"
depends on 44x
default n
select 440EP
help
This option enables support for the PIKA Warp(tm) Appliance. The Warp
is a small computer replacement with up to 9 ports of FXO/FXS plus VOIP
stations and trunks.
See http://www.pikatechnologies.com/ and follow the "PIKA for Computer
Telephony Developers" link for more information.
#config LUAN
# bool "Luan"
# depends on 44x
......@@ -75,6 +89,7 @@ config 440EP
select PPC_FPU
select IBM440EP_ERR42
select IBM_NEW_EMAC_ZMII
select USB_ARCH_HAS_OHCI
config 440EPX
bool
......
......@@ -5,3 +5,5 @@ obj-$(CONFIG_BAMBOO) += bamboo.o
obj-$(CONFIG_SEQUOIA) += sequoia.o
obj-$(CONFIG_KATMAI) += katmai.o
obj-$(CONFIG_RAINIER) += rainier.o
obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_WARP) += warp-nand.o
......@@ -18,6 +18,7 @@
#include <linux/init.h>
#include <linux/of_platform.h>
#include <linux/rtc.h>
#include <asm/machdep.h>
#include <asm/prom.h>
......@@ -38,6 +39,7 @@ static __initdata struct of_device_id ebony_of_bus[] = {
static int __init ebony_device_probe(void)
{
of_platform_bus_probe(NULL, ebony_of_bus, NULL);
of_instantiate_rtc();
return 0;
}
......
/*
* PIKA Warp(tm) NAND flash specific routines
*
* Copyright (c) 2008 PIKA Technologies
* Sean MacLennan <smaclennan@pikatech.com>
*/
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/ndfc.h>
#ifdef CONFIG_MTD_NAND_NDFC
#define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */
#define WARP_NAND_FLASH_REG_ADDR 0xD0000000UL
#define WARP_NAND_FLASH_REG_SIZE 0x2000
static struct resource warp_ndfc = {
.start = WARP_NAND_FLASH_REG_ADDR,
.end = WARP_NAND_FLASH_REG_ADDR + WARP_NAND_FLASH_REG_SIZE,
.flags = IORESOURCE_MEM,
};
static struct mtd_partition nand_parts[] = {
{
.name = "kernel",
.offset = 0,
.size = 0x0200000
},
{
.name = "root",
.offset = 0x0200000,
.size = 0x3400000
},
{
.name = "user",
.offset = 0x3600000,
.size = 0x0A00000
},
};
struct ndfc_controller_settings warp_ndfc_settings = {
.ccr_settings = (NDFC_CCR_BS(CS_NAND_0) | NDFC_CCR_ARAC1),
.ndfc_erpn = 0,
};
static struct ndfc_chip_settings warp_chip0_settings = {
.bank_settings = 0x80002222,
};
struct platform_nand_ctrl warp_nand_ctrl = {
.priv = &warp_ndfc_settings,
};
static struct platform_device warp_ndfc_device = {
.name = "ndfc-nand",
.id = 0,
.dev = {
.platform_data = &warp_nand_ctrl,
},
.num_resources = 1,
.resource = &warp_ndfc,
};
static struct nand_ecclayout nand_oob_16 = {
.eccbytes = 3,
.eccpos = { 0, 1, 2, 3, 6, 7 },
.oobfree = { {.offset = 8, .length = 16} }
};
static struct platform_nand_chip warp_nand_chip0 = {
.nr_chips = 1,
.chip_offset = CS_NAND_0,
.nr_partitions = ARRAY_SIZE(nand_parts),
.partitions = nand_parts,
.chip_delay = 50,
.ecclayout = &nand_oob_16,
.priv = &warp_chip0_settings,
};
static struct platform_device warp_nand_device = {
.name = "ndfc-chip",
.id = 0,
.num_resources = 1,
.resource = &warp_ndfc,
.dev = {
.platform_data = &warp_nand_chip0,
.parent = &warp_ndfc_device.dev,
}
};
static int warp_setup_nand_flash(void)
{
platform_device_register(&warp_ndfc_device);
platform_device_register(&warp_nand_device);
return 0;
}
device_initcall(warp_setup_nand_flash);
#endif
/*
* PIKA Warp(tm) board specific routines
*
* Copyright (c) 2008 PIKA Technologies
* Sean MacLennan <smaclennan@pikatech.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/init.h>
#include <linux/of_platform.h>
#include <linux/kthread.h>
#include <asm/machdep.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/time.h>
#include <asm/uic.h>
#include "44x.h"
static __initdata struct of_device_id warp_of_bus[] = {
{ .compatible = "ibm,plb4", },
{ .compatible = "ibm,opb", },
{ .compatible = "ibm,ebc", },
{},
};
static int __init warp_device_probe(void)
{
of_platform_bus_probe(NULL, warp_of_bus, NULL);
return 0;
}
machine_device_initcall(warp, warp_device_probe);
static int __init warp_probe(void)
{
unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "pika,warp");
}
define_machine(warp) {
.name = "Warp",
.probe = warp_probe,
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq = uic_get_irq,
.restart = ppc44x_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
#define LED_GREEN (0x80000000 >> 0)
#define LED_RED (0x80000000 >> 1)
/* This is for the power LEDs 1 = on, 0 = off, -1 = leave alone */
void warp_set_power_leds(int green, int red)
{
static void __iomem *gpio_base = NULL;
unsigned leds;
if (gpio_base == NULL) {
struct device_node *np;
/* Power LEDS are on the second GPIO controller */
np = of_find_compatible_node(NULL, NULL, "ibm,gpio-440EP");
if (np)
np = of_find_compatible_node(np, NULL, "ibm,gpio-440EP");
if (np == NULL) {
printk(KERN_ERR __FILE__ ": Unable to find gpio\n");
return;
}
gpio_base = of_iomap(np, 0);
of_node_put(np);
if (gpio_base == NULL) {
printk(KERN_ERR __FILE__ ": Unable to map gpio");
return;
}
}
leds = in_be32(gpio_base);
switch (green) {
case 0: leds &= ~LED_GREEN; break;
case 1: leds |= LED_GREEN; break;
}
switch (red) {
case 0: leds &= ~LED_RED; break;
case 1: leds |= LED_RED; break;
}
out_be32(gpio_base, leds);
}
EXPORT_SYMBOL(warp_set_power_leds);
#ifdef CONFIG_SENSORS_AD7414
static int pika_dtm_thread(void __iomem *fpga)
{
extern int ad7414_get_temp(int index);
while (!kthread_should_stop()) {
int temp = ad7414_get_temp(0);
out_be32(fpga, temp);
set_current_state(TASK_INTERRUPTIBLE);
schedule_timeout(HZ);
}
return 0;
}
static int __init pika_dtm_start(void)
{
struct task_struct *dtm_thread;
struct device_node *np;
struct resource res;
void __iomem *fpga;
np = of_find_compatible_node(NULL, NULL, "pika,fpga");
if (np == NULL)
return -ENOENT;
/* We do not call of_iomap here since it would map in the entire
* fpga space, which is over 8k.
*/
if (of_address_to_resource(np, 0, &res)) {
of_node_put(np);
return -ENOENT;
}
of_node_put(np);
fpga = ioremap(res.start + 0x20, 4);
if (fpga == NULL)
return -ENOENT;
dtm_thread = kthread_run(pika_dtm_thread, fpga + 0x20, "pika-dtm");
if (IS_ERR(dtm_thread)) {
iounmap(fpga);
return PTR_ERR(dtm_thread);
}
return 0;
}
device_initcall(pika_dtm_start);
#endif
......@@ -321,6 +321,12 @@ config FSL_ULI1575
config CPM
bool
config OF_RTC
bool
help
Uses information from the OF or flattened device tree to instatiate
platform devices for direct mapped RTC chips like the DS1742 or DS1743.
source "arch/powerpc/sysdev/bestcomm/Kconfig"
endmenu
......@@ -28,6 +28,7 @@ obj-$(CONFIG_PPC_I8259) += i8259.o
obj-$(CONFIG_IPIC) += ipic.o
obj-$(CONFIG_4xx) += uic.o
obj-$(CONFIG_XILINX_VIRTEX) += xilinx_intc.o
obj-$(CONFIG_OF_RTC) += of_rtc.o
ifeq ($(CONFIG_PCI),y)
obj-$(CONFIG_4xx) += ppc4xx_pci.o
endif
......
/*
* Instantiate mmio-mapped RTC chips based on device tree information
*
* Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/kernel.h>
#include <linux/of.h>
#include <linux/init.h>
#include <linux/of_platform.h>
static __initdata struct {
const char *compatible;
char *plat_name;
} of_rtc_table[] = {
{ "ds1743-nvram", "rtc-ds1742" },
};
void __init of_instantiate_rtc(void)
{
struct device_node *node;
int err;
int i;
for (i = 0; i < ARRAY_SIZE(of_rtc_table); i++) {
char *plat_name = of_rtc_table[i].plat_name;
for_each_compatible_node(node, NULL,
of_rtc_table[i].compatible) {
struct resource *res;
res = kmalloc(sizeof(*res), GFP_KERNEL);
if (!res) {
printk(KERN_ERR "OF RTC: Out of memory "
"allocating resource structure for %s\n",
node->full_name);
continue;
}
err = of_address_to_resource(node, 0, res);
if (err) {
printk(KERN_ERR "OF RTC: Error "
"translating resources for %s\n",
node->full_name);
continue;
}
printk(KERN_INFO "OF_RTC: %s is a %s @ 0x%llx-0x%llx\n",
node->full_name, plat_name,
(unsigned long long)res->start,
(unsigned long long)res->end);
platform_device_register_simple(plat_name, -1, res, 1);
}
}
}
......@@ -37,4 +37,6 @@ extern int of_platform_bus_probe(struct device_node *root,
extern struct of_device *of_find_device_by_phandle(phandle ph);
extern void of_instantiate_rtc(void);
#endif /* _ASM_POWERPC_OF_PLATFORM_H */
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