OMAP3: wdtimer: Fix CORE idle transition

The HW superwised smart idle for wdtimer in OMAP3 prevents
CORE power domain idle transitions. Disable it by swithing
to SW supervised transitions.

This could be a hardware bug in the OMAP3 wdtimer2 block.
Signed-off-by: NKalle Jokiniemi <kalle.jokiniemi@nokia.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Acked-by: NKevin Hilman <khilman@ti.com>

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

@@ -1312,6 +1312,11 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
 	.slaves		= omap3xxx_wd_timer2_slaves,
 	.slaves_cnt	= ARRAY_SIZE(omap3xxx_wd_timer2_slaves),
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+	/*
+	 * XXX: Use software supervised mode, HW supervised smartidle seems to
+	 * block CORE power domain idle transitions. Maybe a HW bug in wdt2?
+	 */
+	.flags		= HWMOD_SWSUP_SIDLE,
 };
 
 /* UART common */