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2333f212
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2333f212
编写于
1月 18, 2006
作者:
L
Linus Torvalds
浏览文件
操作
浏览文件
下载
差异文件
Merge master.kernel.org:/home/rmk/linux-2.6-arm
上级
097916ec
37b797b2
变更
20
隐藏空白更改
内联
并排
Showing
20 changed file
with
193 addition
and
207 deletion
+193
-207
arch/arm/boot/compressed/head.S
arch/arm/boot/compressed/head.S
+1
-1
arch/arm/kernel/entry-armv.S
arch/arm/kernel/entry-armv.S
+4
-1
arch/arm/kernel/signal.c
arch/arm/kernel/signal.c
+18
-11
arch/arm/kernel/signal.h
arch/arm/kernel/signal.h
+1
-1
arch/arm/mach-ixp4xx/common.c
arch/arm/mach-ixp4xx/common.c
+2
-1
arch/arm/mach-omap1/clock.c
arch/arm/mach-omap1/clock.c
+22
-22
arch/arm/mach-omap1/clock.h
arch/arm/mach-omap1/clock.h
+84
-84
arch/arm/mach-omap1/serial.c
arch/arm/mach-omap1/serial.c
+3
-3
arch/arm/mach-omap2/clock.c
arch/arm/mach-omap2/clock.c
+15
-17
arch/arm/mach-omap2/clock.h
arch/arm/mach-omap2/clock.h
+6
-6
arch/arm/mach-omap2/serial.c
arch/arm/mach-omap2/serial.c
+6
-6
arch/arm/mach-omap2/timer-gp.c
arch/arm/mach-omap2/timer-gp.c
+1
-1
arch/arm/plat-omap/clock.c
arch/arm/plat-omap/clock.c
+4
-37
arch/arm/plat-omap/gpio.c
arch/arm/plat-omap/gpio.c
+3
-3
arch/arm/plat-omap/mcbsp.c
arch/arm/plat-omap/mcbsp.c
+6
-6
arch/arm/plat-omap/ocpi.c
arch/arm/plat-omap/ocpi.c
+2
-2
drivers/serial/Kconfig
drivers/serial/Kconfig
+1
-1
drivers/serial/at91_serial.c
drivers/serial/at91_serial.c
+0
-2
include/asm-arm/arch-omap/clock.h
include/asm-arm/arch-omap/clock.h
+0
-2
include/asm-arm/arch-pxa/pxa-regs.h
include/asm-arm/arch-pxa/pxa-regs.h
+14
-0
未找到文件。
arch/arm/boot/compressed/head.S
浏览文件 @
2333f212
...
...
@@ -334,7 +334,7 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size
mov
r1
,
#
0x12
orr
r1
,
r1
,
#
3
<<
10
add
r2
,
r3
,
#
16384
1
:
cmp
r1
,
r
8
@
if
virt
>
start
of
RAM
1
:
cmp
r1
,
r
9
@
if
virt
>
start
of
RAM
orrhs
r1
,
r1
,
#
0x0c
@
set
cacheable
,
bufferable
cmp
r1
,
r10
@
if
virt
>
end
of
RAM
bichs
r1
,
r1
,
#
0x0c
@
clear
cacheable
,
bufferable
...
...
arch/arm/kernel/entry-armv.S
浏览文件 @
2333f212
...
...
@@ -735,8 +735,11 @@ __kuser_cmpxchg: @ 0xffff0fc0
*
The
kernel
itself
must
perform
the
operation
.
*
A
special
ghost
syscall
is
used
for
that
(
see
traps
.
c
)
.
*/
stmfd
sp
!,
{
r7
,
lr
}
mov
r7
,
#
0xff00
@
0xfff0
into
r7
for
EABI
orr
r7
,
r7
,
#
0xf0
swi
#
0x9ffff0
mov
pc
,
lr
ldmfd
sp
!,
{
r7
,
pc
}
#elif __LINUX_ARM_ARCH__ < 6
...
...
arch/arm/kernel/signal.c
浏览文件 @
2333f212
...
...
@@ -29,6 +29,12 @@
#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn))
#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn))
/*
* With EABI, the syscall number has to be loaded into r7.
*/
#define MOV_R7_NR_SIGRETURN (0xe3a07000 | (__NR_sigreturn - __NR_SYSCALL_BASE))
#define MOV_R7_NR_RT_SIGRETURN (0xe3a07000 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))
/*
* For Thumb syscalls, we pass the syscall number via r7. We therefore
* need two 16-bit instructions.
...
...
@@ -36,9 +42,9 @@
#define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE))
#define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))
const
unsigned
long
sigreturn_codes
[
4
]
=
{
SWI_SYS_SIGRETURN
,
SWI_THUMB_SIGRETURN
,
SWI_SYS_RT_SIGRETURN
,
SWI_THUMB_RT_SIGRETURN
const
unsigned
long
sigreturn_codes
[
7
]
=
{
MOV_R7_NR_SIGRETURN
,
SWI_SYS_SIGRETURN
,
SWI_THUMB_SIGRETURN
,
MOV_R7_NR_RT_SIGRETURN
,
SWI_SYS_RT_SIGRETURN
,
SWI_THUMB_RT_SIGRETURN
,
};
static
int
do_signal
(
sigset_t
*
oldset
,
struct
pt_regs
*
regs
,
int
syscall
);
...
...
@@ -189,7 +195,7 @@ struct aux_sigframe {
struct
sigframe
{
struct
sigcontext
sc
;
unsigned
long
extramask
[
_NSIG_WORDS
-
1
];
unsigned
long
retcode
;
unsigned
long
retcode
[
2
]
;
struct
aux_sigframe
aux
__attribute__
((
aligned
(
8
)));
};
...
...
@@ -198,7 +204,7 @@ struct rt_sigframe {
void
__user
*
puc
;
struct
siginfo
info
;
struct
ucontext
uc
;
unsigned
long
retcode
;
unsigned
long
retcode
[
2
]
;
struct
aux_sigframe
aux
__attribute__
((
aligned
(
8
)));
};
...
...
@@ -436,12 +442,13 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka,
if
(
ka
->
sa
.
sa_flags
&
SA_RESTORER
)
{
retcode
=
(
unsigned
long
)
ka
->
sa
.
sa_restorer
;
}
else
{
unsigned
int
idx
=
thumb
;
unsigned
int
idx
=
thumb
<<
1
;
if
(
ka
->
sa
.
sa_flags
&
SA_SIGINFO
)
idx
+=
2
;
idx
+=
3
;
if
(
__put_user
(
sigreturn_codes
[
idx
],
rc
))
if
(
__put_user
(
sigreturn_codes
[
idx
],
rc
)
||
__put_user
(
sigreturn_codes
[
idx
+
1
],
rc
+
1
))
return
1
;
if
(
cpsr
&
MODE32_BIT
)
{
...
...
@@ -456,7 +463,7 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka,
* the return code written onto the stack.
*/
flush_icache_range
((
unsigned
long
)
rc
,
(
unsigned
long
)(
rc
+
1
));
(
unsigned
long
)(
rc
+
2
));
retcode
=
((
unsigned
long
)
rc
)
+
thumb
;
}
...
...
@@ -488,7 +495,7 @@ setup_frame(int usig, struct k_sigaction *ka, sigset_t *set, struct pt_regs *reg
}
if
(
err
==
0
)
err
=
setup_return
(
regs
,
ka
,
&
frame
->
retcode
,
frame
,
usig
);
err
=
setup_return
(
regs
,
ka
,
frame
->
retcode
,
frame
,
usig
);
return
err
;
}
...
...
@@ -522,7 +529,7 @@ setup_rt_frame(int usig, struct k_sigaction *ka, siginfo_t *info,
err
|=
__copy_to_user
(
&
frame
->
uc
.
uc_sigmask
,
set
,
sizeof
(
*
set
));
if
(
err
==
0
)
err
=
setup_return
(
regs
,
ka
,
&
frame
->
retcode
,
frame
,
usig
);
err
=
setup_return
(
regs
,
ka
,
frame
->
retcode
,
frame
,
usig
);
if
(
err
==
0
)
{
/*
...
...
arch/arm/kernel/signal.h
浏览文件 @
2333f212
...
...
@@ -9,4 +9,4 @@
*/
#define KERN_SIGRETURN_CODE 0xffff0500
extern
const
unsigned
long
sigreturn_codes
[
4
];
extern
const
unsigned
long
sigreturn_codes
[
7
];
arch/arm/mach-ixp4xx/common.c
浏览文件 @
2333f212
...
...
@@ -333,6 +333,7 @@ static struct platform_device *ixp46x_devices[] __initdata = {
};
unsigned
long
ixp4xx_exp_bus_size
;
EXPORT_SYMBOL
(
ixp4xx_exp_bus_size
);
void
__init
ixp4xx_sys_init
(
void
)
{
...
...
@@ -352,7 +353,7 @@ void __init ixp4xx_sys_init(void)
}
}
printk
(
"IXP4xx: Using %uMiB expansion bus window size
\n
"
,
printk
(
"IXP4xx: Using %
l
uMiB expansion bus window size
\n
"
,
ixp4xx_exp_bus_size
>>
20
);
}
arch/arm/mach-omap1/clock.c
浏览文件 @
2333f212
...
...
@@ -50,10 +50,10 @@ static int omap1_clk_enable_dsp_domain(struct clk *clk)
{
int
retval
;
retval
=
omap1_clk_
us
e
(
&
api_ck
.
clk
);
retval
=
omap1_clk_
enabl
e
(
&
api_ck
.
clk
);
if
(
!
retval
)
{
retval
=
omap1_clk_enable
(
clk
);
omap1_clk_
unus
e
(
&
api_ck
.
clk
);
retval
=
omap1_clk_enable
_generic
(
clk
);
omap1_clk_
disabl
e
(
&
api_ck
.
clk
);
}
return
retval
;
...
...
@@ -61,9 +61,9 @@ static int omap1_clk_enable_dsp_domain(struct clk *clk)
static
void
omap1_clk_disable_dsp_domain
(
struct
clk
*
clk
)
{
if
(
omap1_clk_
us
e
(
&
api_ck
.
clk
)
==
0
)
{
omap1_clk_disable
(
clk
);
omap1_clk_
unus
e
(
&
api_ck
.
clk
);
if
(
omap1_clk_
enabl
e
(
&
api_ck
.
clk
)
==
0
)
{
omap1_clk_disable
_generic
(
clk
);
omap1_clk_
disabl
e
(
&
api_ck
.
clk
);
}
}
...
...
@@ -72,7 +72,7 @@ static int omap1_clk_enable_uart_functional(struct clk *clk)
int
ret
;
struct
uart_clk
*
uclk
;
ret
=
omap1_clk_enable
(
clk
);
ret
=
omap1_clk_enable
_generic
(
clk
);
if
(
ret
==
0
)
{
/* Set smart idle acknowledgement mode */
uclk
=
(
struct
uart_clk
*
)
clk
;
...
...
@@ -91,7 +91,7 @@ static void omap1_clk_disable_uart_functional(struct clk *clk)
uclk
=
(
struct
uart_clk
*
)
clk
;
omap_writeb
((
omap_readb
(
uclk
->
sysc_addr
)
&
~
0x18
),
uclk
->
sysc_addr
);
omap1_clk_disable
(
clk
);
omap1_clk_disable
_generic
(
clk
);
}
static
void
omap1_clk_allow_idle
(
struct
clk
*
clk
)
...
...
@@ -230,9 +230,9 @@ static void omap1_ckctl_recalc_dsp_domain(struct clk * clk)
* Note that DSP_CKCTL virt addr = phys addr, so
* we must use __raw_readw() instead of omap_readw().
*/
omap1_clk_
us
e
(
&
api_ck
.
clk
);
omap1_clk_
enabl
e
(
&
api_ck
.
clk
);
dsor
=
1
<<
(
3
&
(
__raw_readw
(
DSP_CKCTL
)
>>
clk
->
rate_offset
));
omap1_clk_
unus
e
(
&
api_ck
.
clk
);
omap1_clk_
disabl
e
(
&
api_ck
.
clk
);
if
(
unlikely
(
clk
->
rate
==
clk
->
parent
->
rate
/
dsor
))
return
;
/* No change, quick exit */
...
...
@@ -412,12 +412,12 @@ static void omap1_init_ext_clk(struct clk * clk)
clk
->
rate
=
96000000
/
dsor
;
}
static
int
omap1_clk_
us
e
(
struct
clk
*
clk
)
static
int
omap1_clk_
enabl
e
(
struct
clk
*
clk
)
{
int
ret
=
0
;
if
(
clk
->
usecount
++
==
0
)
{
if
(
likely
(
clk
->
parent
))
{
ret
=
omap1_clk_
us
e
(
clk
->
parent
);
ret
=
omap1_clk_
enabl
e
(
clk
->
parent
);
if
(
unlikely
(
ret
!=
0
))
{
clk
->
usecount
--
;
...
...
@@ -432,7 +432,7 @@ static int omap1_clk_use(struct clk *clk)
ret
=
clk
->
enable
(
clk
);
if
(
unlikely
(
ret
!=
0
)
&&
clk
->
parent
)
{
omap1_clk_
unus
e
(
clk
->
parent
);
omap1_clk_
disabl
e
(
clk
->
parent
);
clk
->
usecount
--
;
}
}
...
...
@@ -440,12 +440,12 @@ static int omap1_clk_use(struct clk *clk)
return
ret
;
}
static
void
omap1_clk_
unus
e
(
struct
clk
*
clk
)
static
void
omap1_clk_
disabl
e
(
struct
clk
*
clk
)
{
if
(
clk
->
usecount
>
0
&&
!
(
--
clk
->
usecount
))
{
clk
->
disable
(
clk
);
if
(
likely
(
clk
->
parent
))
{
omap1_clk_
unus
e
(
clk
->
parent
);
omap1_clk_
disabl
e
(
clk
->
parent
);
if
(
clk
->
flags
&
CLOCK_NO_IDLE_PARENT
)
if
(
!
cpu_is_omap24xx
())
omap1_clk_allow_idle
(
clk
->
parent
);
...
...
@@ -453,7 +453,7 @@ static void omap1_clk_unuse(struct clk *clk)
}
}
static
int
omap1_clk_enable
(
struct
clk
*
clk
)
static
int
omap1_clk_enable
_generic
(
struct
clk
*
clk
)
{
__u16
regval16
;
__u32
regval32
;
...
...
@@ -492,7 +492,7 @@ static int omap1_clk_enable(struct clk *clk)
return
0
;
}
static
void
omap1_clk_disable
(
struct
clk
*
clk
)
static
void
omap1_clk_disable
_generic
(
struct
clk
*
clk
)
{
__u16
regval16
;
__u32
regval32
;
...
...
@@ -654,8 +654,8 @@ late_initcall(omap1_late_clk_reset);
#endif
static
struct
clk_functions
omap1_clk_functions
=
{
.
clk_
use
=
omap1_clk_us
e
,
.
clk_
unuse
=
omap1_clk_unus
e
,
.
clk_
enable
=
omap1_clk_enabl
e
,
.
clk_
disable
=
omap1_clk_disabl
e
,
.
clk_round_rate
=
omap1_clk_round_rate
,
.
clk_set_rate
=
omap1_clk_set_rate
,
};
...
...
@@ -780,9 +780,9 @@ int __init omap1_clk_init(void)
* Only enable those clocks we will need, let the drivers
* enable other clocks as necessary
*/
clk_
us
e
(
&
armper_ck
.
clk
);
clk_
us
e
(
&
armxor_ck
.
clk
);
clk_
us
e
(
&
armtim_ck
.
clk
);
/* This should be done by timer code */
clk_
enabl
e
(
&
armper_ck
.
clk
);
clk_
enabl
e
(
&
armxor_ck
.
clk
);
clk_
enabl
e
(
&
armtim_ck
.
clk
);
/* This should be done by timer code */
if
(
cpu_is_omap1510
())
clk_enable
(
&
arm_gpio_ck
);
...
...
arch/arm/mach-omap1/clock.h
浏览文件 @
2333f212
...
...
@@ -13,8 +13,8 @@
#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H
#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
static
int
omap1_clk_enable
(
struct
clk
*
clk
);
static
void
omap1_clk_disable
(
struct
clk
*
clk
);
static
int
omap1_clk_enable
_generic
(
struct
clk
*
clk
);
static
void
omap1_clk_disable
_generic
(
struct
clk
*
clk
);
static
void
omap1_ckctl_recalc
(
struct
clk
*
clk
);
static
void
omap1_watchdog_recalc
(
struct
clk
*
clk
);
static
void
omap1_ckctl_recalc_dsp_domain
(
struct
clk
*
clk
);
...
...
@@ -30,8 +30,8 @@ static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate);
static
void
omap1_init_ext_clk
(
struct
clk
*
clk
);
static
int
omap1_select_table_rate
(
struct
clk
*
clk
,
unsigned
long
rate
);
static
long
omap1_round_to_table_rate
(
struct
clk
*
clk
,
unsigned
long
rate
);
static
int
omap1_clk_
us
e
(
struct
clk
*
clk
);
static
void
omap1_clk_
unus
e
(
struct
clk
*
clk
);
static
int
omap1_clk_
enabl
e
(
struct
clk
*
clk
);
static
void
omap1_clk_
disabl
e
(
struct
clk
*
clk
);
struct
mpu_rate
{
unsigned
long
rate
;
...
...
@@ -152,8 +152,8 @@ static struct clk ck_ref = {
.
rate
=
12000000
,
.
flags
=
CLOCK_IN_OMAP1510
|
CLOCK_IN_OMAP16XX
|
ALWAYS_ENABLED
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
ck_dpll1
=
{
...
...
@@ -161,8 +161,8 @@ static struct clk ck_dpll1 = {
.
parent
=
&
ck_ref
,
.
flags
=
CLOCK_IN_OMAP1510
|
CLOCK_IN_OMAP16XX
|
RATE_PROPAGATES
|
ALWAYS_ENABLED
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
arm_idlect1_clk
ck_dpll1out
=
{
...
...
@@ -173,8 +173,8 @@ static struct arm_idlect1_clk ck_dpll1out = {
.
enable_reg
=
(
void
__iomem
*
)
ARM_IDLECT2
,
.
enable_bit
=
EN_CKOUT_ARM
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
},
.
idlect_shift
=
12
,
};
...
...
@@ -186,8 +186,8 @@ static struct clk arm_ck = {
RATE_CKCTL
|
RATE_PROPAGATES
|
ALWAYS_ENABLED
,
.
rate_offset
=
CKCTL_ARMDIV_OFFSET
,
.
recalc
=
&
omap1_ckctl_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
arm_idlect1_clk
armper_ck
=
{
...
...
@@ -200,8 +200,8 @@ static struct arm_idlect1_clk armper_ck = {
.
enable_bit
=
EN_PERCK
,
.
rate_offset
=
CKCTL_PERDIV_OFFSET
,
.
recalc
=
&
omap1_ckctl_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
},
.
idlect_shift
=
2
,
};
...
...
@@ -213,8 +213,8 @@ static struct clk arm_gpio_ck = {
.
enable_reg
=
(
void
__iomem
*
)
ARM_IDLECT2
,
.
enable_bit
=
EN_GPIOCK
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
arm_idlect1_clk
armxor_ck
=
{
...
...
@@ -226,8 +226,8 @@ static struct arm_idlect1_clk armxor_ck = {
.
enable_reg
=
(
void
__iomem
*
)
ARM_IDLECT2
,
.
enable_bit
=
EN_XORPCK
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
},
.
idlect_shift
=
1
,
};
...
...
@@ -241,8 +241,8 @@ static struct arm_idlect1_clk armtim_ck = {
.
enable_reg
=
(
void
__iomem
*
)
ARM_IDLECT2
,
.
enable_bit
=
EN_TIMCK
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
},
.
idlect_shift
=
9
,
};
...
...
@@ -256,8 +256,8 @@ static struct arm_idlect1_clk armwdt_ck = {
.
enable_reg
=
(
void
__iomem
*
)
ARM_IDLECT2
,
.
enable_bit
=
EN_WDTCK
,
.
recalc
=
&
omap1_watchdog_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
},
.
idlect_shift
=
0
,
};
...
...
@@ -272,8 +272,8 @@ static struct clk arminth_ck16xx = {
*
* 1510 version is in TC clocks.
*/
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
dsp_ck
=
{
...
...
@@ -285,8 +285,8 @@ static struct clk dsp_ck = {
.
enable_bit
=
EN_DSPCK
,
.
rate_offset
=
CKCTL_DSPDIV_OFFSET
,
.
recalc
=
&
omap1_ckctl_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
dspmmu_ck
=
{
...
...
@@ -296,8 +296,8 @@ static struct clk dspmmu_ck = {
RATE_CKCTL
|
ALWAYS_ENABLED
,
.
rate_offset
=
CKCTL_DSPMMUDIV_OFFSET
,
.
recalc
=
&
omap1_ckctl_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
dspper_ck
=
{
...
...
@@ -349,8 +349,8 @@ static struct arm_idlect1_clk tc_ck = {
CLOCK_IDLE_CONTROL
,
.
rate_offset
=
CKCTL_TCDIV_OFFSET
,
.
recalc
=
&
omap1_ckctl_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
},
.
idlect_shift
=
6
,
};
...
...
@@ -364,8 +364,8 @@ static struct clk arminth_ck1510 = {
*
* 16xx version is in MPU clocks.
*/
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
tipb_ck
=
{
...
...
@@ -374,8 +374,8 @@ static struct clk tipb_ck = {
.
parent
=
&
tc_ck
.
clk
,
.
flags
=
CLOCK_IN_OMAP1510
|
ALWAYS_ENABLED
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
l3_ocpi_ck
=
{
...
...
@@ -386,8 +386,8 @@ static struct clk l3_ocpi_ck = {
.
enable_reg
=
(
void
__iomem
*
)
ARM_IDLECT3
,
.
enable_bit
=
EN_OCPI_CK
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
tc1_ck
=
{
...
...
@@ -397,8 +397,8 @@ static struct clk tc1_ck = {
.
enable_reg
=
(
void
__iomem
*
)
ARM_IDLECT3
,
.
enable_bit
=
EN_TC1_CK
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
tc2_ck
=
{
...
...
@@ -408,8 +408,8 @@ static struct clk tc2_ck = {
.
enable_reg
=
(
void
__iomem
*
)
ARM_IDLECT3
,
.
enable_bit
=
EN_TC2_CK
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
dma_ck
=
{
...
...
@@ -419,8 +419,8 @@ static struct clk dma_ck = {
.
flags
=
CLOCK_IN_OMAP1510
|
CLOCK_IN_OMAP16XX
|
ALWAYS_ENABLED
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
dma_lcdfree_ck
=
{
...
...
@@ -428,8 +428,8 @@ static struct clk dma_lcdfree_ck = {
.
parent
=
&
tc_ck
.
clk
,
.
flags
=
CLOCK_IN_OMAP16XX
|
ALWAYS_ENABLED
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
arm_idlect1_clk
api_ck
=
{
...
...
@@ -441,8 +441,8 @@ static struct arm_idlect1_clk api_ck = {
.
enable_reg
=
(
void
__iomem
*
)
ARM_IDLECT2
,
.
enable_bit
=
EN_APICK
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
},
.
idlect_shift
=
8
,
};
...
...
@@ -455,8 +455,8 @@ static struct arm_idlect1_clk lb_ck = {
.
enable_reg
=
(
void
__iomem
*
)
ARM_IDLECT2
,
.
enable_bit
=
EN_LBCK
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
},
.
idlect_shift
=
4
,
};
...
...
@@ -466,8 +466,8 @@ static struct clk rhea1_ck = {
.
parent
=
&
tc_ck
.
clk
,
.
flags
=
CLOCK_IN_OMAP16XX
|
ALWAYS_ENABLED
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
rhea2_ck
=
{
...
...
@@ -475,8 +475,8 @@ static struct clk rhea2_ck = {
.
parent
=
&
tc_ck
.
clk
,
.
flags
=
CLOCK_IN_OMAP16XX
|
ALWAYS_ENABLED
,
.
recalc
=
&
followparent_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
lcd_ck_16xx
=
{
...
...
@@ -487,8 +487,8 @@ static struct clk lcd_ck_16xx = {
.
enable_bit
=
EN_LCDCK
,
.
rate_offset
=
CKCTL_LCDDIV_OFFSET
,
.
recalc
=
&
omap1_ckctl_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
arm_idlect1_clk
lcd_ck_1510
=
{
...
...
@@ -501,8 +501,8 @@ static struct arm_idlect1_clk lcd_ck_1510 = {
.
enable_bit
=
EN_LCDCK
,
.
rate_offset
=
CKCTL_LCDDIV_OFFSET
,
.
recalc
=
&
omap1_ckctl_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
},
.
idlect_shift
=
3
,
};
...
...
@@ -518,8 +518,8 @@ static struct clk uart1_1510 = {
.
enable_bit
=
29
,
/* Chooses between 12MHz and 48MHz */
.
set_rate
=
&
omap1_set_uart_rate
,
.
recalc
=
&
omap1_uart_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
uart_clk
uart1_16xx
=
{
...
...
@@ -550,8 +550,8 @@ static struct clk uart2_ck = {
.
enable_bit
=
30
,
/* Chooses between 12MHz and 48MHz */
.
set_rate
=
&
omap1_set_uart_rate
,
.
recalc
=
&
omap1_uart_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
uart3_1510
=
{
...
...
@@ -565,8 +565,8 @@ static struct clk uart3_1510 = {
.
enable_bit
=
31
,
/* Chooses between 12MHz and 48MHz */
.
set_rate
=
&
omap1_set_uart_rate
,
.
recalc
=
&
omap1_uart_recalc
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
uart_clk
uart3_16xx
=
{
...
...
@@ -593,8 +593,8 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
RATE_FIXED
|
ENABLE_REG_32BIT
,
.
enable_reg
=
(
void
__iomem
*
)
ULPD_CLOCK_CTRL
,
.
enable_bit
=
USB_MCLK_EN_BIT
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
usb_hhc_ck1510
=
{
...
...
@@ -605,8 +605,8 @@ static struct clk usb_hhc_ck1510 = {
RATE_FIXED
|
ENABLE_REG_32BIT
,
.
enable_reg
=
(
void
__iomem
*
)
MOD_CONF_CTRL_0
,
.
enable_bit
=
USB_HOST_HHC_UHOST_EN
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
usb_hhc_ck16xx
=
{
...
...
@@ -618,8 +618,8 @@ static struct clk usb_hhc_ck16xx = {
RATE_FIXED
|
ENABLE_REG_32BIT
,
.
enable_reg
=
(
void
__iomem
*
)
OTG_BASE
+
0x08
/* OTG_SYSCON_2 */
,
.
enable_bit
=
8
/* UHOST_EN */
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
usb_dc_ck
=
{
...
...
@@ -629,8 +629,8 @@ static struct clk usb_dc_ck = {
.
flags
=
CLOCK_IN_OMAP16XX
|
RATE_FIXED
,
.
enable_reg
=
(
void
__iomem
*
)
SOFT_REQ_REG
,
.
enable_bit
=
4
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
mclk_1510
=
{
...
...
@@ -638,8 +638,8 @@ static struct clk mclk_1510 = {
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.
rate
=
12000000
,
.
flags
=
CLOCK_IN_OMAP1510
|
RATE_FIXED
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
mclk_16xx
=
{
...
...
@@ -651,8 +651,8 @@ static struct clk mclk_16xx = {
.
set_rate
=
&
omap1_set_ext_clk_rate
,
.
round_rate
=
&
omap1_round_ext_clk_rate
,
.
init
=
&
omap1_init_ext_clk
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
bclk_1510
=
{
...
...
@@ -660,8 +660,8 @@ static struct clk bclk_1510 = {
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.
rate
=
12000000
,
.
flags
=
CLOCK_IN_OMAP1510
|
RATE_FIXED
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
bclk_16xx
=
{
...
...
@@ -673,8 +673,8 @@ static struct clk bclk_16xx = {
.
set_rate
=
&
omap1_set_ext_clk_rate
,
.
round_rate
=
&
omap1_round_ext_clk_rate
,
.
init
=
&
omap1_init_ext_clk
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
mmc1_ck
=
{
...
...
@@ -686,8 +686,8 @@ static struct clk mmc1_ck = {
RATE_FIXED
|
ENABLE_REG_32BIT
|
CLOCK_NO_IDLE_PARENT
,
.
enable_reg
=
(
void
__iomem
*
)
MOD_CONF_CTRL_0
,
.
enable_bit
=
23
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
mmc2_ck
=
{
...
...
@@ -699,8 +699,8 @@ static struct clk mmc2_ck = {
RATE_FIXED
|
ENABLE_REG_32BIT
|
CLOCK_NO_IDLE_PARENT
,
.
enable_reg
=
(
void
__iomem
*
)
MOD_CONF_CTRL_0
,
.
enable_bit
=
20
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
virtual_ck_mpu
=
{
...
...
@@ -711,8 +711,8 @@ static struct clk virtual_ck_mpu = {
.
recalc
=
&
followparent_recalc
,
.
set_rate
=
&
omap1_select_table_rate
,
.
round_rate
=
&
omap1_round_to_table_rate
,
.
enable
=
&
omap1_clk_enable
,
.
disable
=
&
omap1_clk_disable
,
.
enable
=
&
omap1_clk_enable
_generic
,
.
disable
=
&
omap1_clk_disable
_generic
,
};
static
struct
clk
*
onchip_clks
[]
=
{
...
...
arch/arm/mach-omap1/serial.c
浏览文件 @
2333f212
...
...
@@ -146,7 +146,7 @@ void __init omap_serial_init(void)
if
(
IS_ERR
(
uart1_ck
))
printk
(
"Could not get uart1_ck
\n
"
);
else
{
clk_
us
e
(
uart1_ck
);
clk_
enabl
e
(
uart1_ck
);
if
(
cpu_is_omap1510
())
clk_set_rate
(
uart1_ck
,
12000000
);
}
...
...
@@ -166,7 +166,7 @@ void __init omap_serial_init(void)
if
(
IS_ERR
(
uart2_ck
))
printk
(
"Could not get uart2_ck
\n
"
);
else
{
clk_
us
e
(
uart2_ck
);
clk_
enabl
e
(
uart2_ck
);
if
(
cpu_is_omap1510
())
clk_set_rate
(
uart2_ck
,
12000000
);
else
...
...
@@ -188,7 +188,7 @@ void __init omap_serial_init(void)
if
(
IS_ERR
(
uart3_ck
))
printk
(
"Could not get uart3_ck
\n
"
);
else
{
clk_
us
e
(
uart3_ck
);
clk_
enabl
e
(
uart3_ck
);
if
(
cpu_is_omap1510
())
clk_set_rate
(
uart3_ck
,
12000000
);
}
...
...
arch/arm/mach-omap2/clock.c
浏览文件 @
2333f212
...
...
@@ -111,7 +111,7 @@ static void omap2_clk_fixed_enable(struct clk *clk)
/* Enables clock without considering parent dependencies or use count
* REVISIT: Maybe change this to use clk->enable like on omap1?
*/
static
int
omap2_clk_enable
(
struct
clk
*
clk
)
static
int
_
omap2_clk_enable
(
struct
clk
*
clk
)
{
u32
regval32
;
...
...
@@ -150,7 +150,7 @@ static void omap2_clk_fixed_disable(struct clk *clk)
}
/* Disables clock without considering parent dependencies or use count */
static
void
omap2_clk_disable
(
struct
clk
*
clk
)
static
void
_
omap2_clk_disable
(
struct
clk
*
clk
)
{
u32
regval32
;
...
...
@@ -167,23 +167,23 @@ static void omap2_clk_disable(struct clk *clk)
__raw_writel
(
regval32
,
clk
->
enable_reg
);
}
static
int
omap2_clk_
us
e
(
struct
clk
*
clk
)
static
int
omap2_clk_
enabl
e
(
struct
clk
*
clk
)
{
int
ret
=
0
;
if
(
clk
->
usecount
++
==
0
)
{
if
(
likely
((
u32
)
clk
->
parent
))
ret
=
omap2_clk_
us
e
(
clk
->
parent
);
ret
=
omap2_clk_
enabl
e
(
clk
->
parent
);
if
(
unlikely
(
ret
!=
0
))
{
clk
->
usecount
--
;
return
ret
;
}
ret
=
omap2_clk_enable
(
clk
);
ret
=
_
omap2_clk_enable
(
clk
);
if
(
unlikely
(
ret
!=
0
)
&&
clk
->
parent
)
{
omap2_clk_
unus
e
(
clk
->
parent
);
omap2_clk_
disabl
e
(
clk
->
parent
);
clk
->
usecount
--
;
}
}
...
...
@@ -191,12 +191,12 @@ static int omap2_clk_use(struct clk *clk)
return
ret
;
}
static
void
omap2_clk_
unus
e
(
struct
clk
*
clk
)
static
void
omap2_clk_
disabl
e
(
struct
clk
*
clk
)
{
if
(
clk
->
usecount
>
0
&&
!
(
--
clk
->
usecount
))
{
omap2_clk_disable
(
clk
);
_
omap2_clk_disable
(
clk
);
if
(
likely
((
u32
)
clk
->
parent
))
omap2_clk_
unus
e
(
clk
->
parent
);
omap2_clk_
disabl
e
(
clk
->
parent
);
}
}
...
...
@@ -873,7 +873,7 @@ static int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
reg
=
(
void
__iomem
*
)
src_sel
;
if
(
clk
->
usecount
>
0
)
omap2_clk_disable
(
clk
);
_
omap2_clk_disable
(
clk
);
/* Set new source value (previous dividers if any in effect) */
reg_val
=
__raw_readl
(
reg
)
&
~
(
field_mask
<<
src_off
);
...
...
@@ -884,7 +884,7 @@ static int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
__raw_writel
(
0x1
,
(
void
__iomem
*
)
&
PRCM_CLKCFG_CTRL
);
if
(
clk
->
usecount
>
0
)
omap2_clk_enable
(
clk
);
_
omap2_clk_enable
(
clk
);
clk
->
parent
=
new_parent
;
...
...
@@ -999,8 +999,6 @@ static int omap2_select_table_rate(struct clk * clk, unsigned long rate)
static
struct
clk_functions
omap2_clk_functions
=
{
.
clk_enable
=
omap2_clk_enable
,
.
clk_disable
=
omap2_clk_disable
,
.
clk_use
=
omap2_clk_use
,
.
clk_unuse
=
omap2_clk_unuse
,
.
clk_round_rate
=
omap2_clk_round_rate
,
.
clk_set_rate
=
omap2_clk_set_rate
,
.
clk_set_parent
=
omap2_clk_set_parent
,
...
...
@@ -1045,7 +1043,7 @@ static void __init omap2_disable_unused_clocks(void)
continue
;
printk
(
KERN_INFO
"Disabling unused clock
\"
%s
\"\n
"
,
ck
->
name
);
omap2_clk_disable
(
ck
);
_
omap2_clk_disable
(
ck
);
}
}
late_initcall
(
omap2_disable_unused_clocks
);
...
...
@@ -1120,10 +1118,10 @@ int __init omap2_clk_init(void)
* Only enable those clocks we will need, let the drivers
* enable other clocks as necessary
*/
clk_
us
e
(
&
sync_32k_ick
);
clk_
us
e
(
&
omapctrl_ick
);
clk_
enabl
e
(
&
sync_32k_ick
);
clk_
enabl
e
(
&
omapctrl_ick
);
if
(
cpu_is_omap2430
())
clk_
us
e
(
&
sdrc_ick
);
clk_
enabl
e
(
&
sdrc_ick
);
return
0
;
}
arch/arm/mach-omap2/clock.h
浏览文件 @
2333f212
...
...
@@ -24,7 +24,7 @@ static void omap2_propagate_rate(struct clk * clk);
static
void
omap2_mpu_recalc
(
struct
clk
*
clk
);
static
int
omap2_select_table_rate
(
struct
clk
*
clk
,
unsigned
long
rate
);
static
long
omap2_round_to_table_rate
(
struct
clk
*
clk
,
unsigned
long
rate
);
static
void
omap2_clk_
unus
e
(
struct
clk
*
clk
);
static
void
omap2_clk_
disabl
e
(
struct
clk
*
clk
);
static
void
omap2_sys_clk_recalc
(
struct
clk
*
clk
);
static
u32
omap2_clksel_to_divisor
(
u32
div_sel
,
u32
field_val
);
static
u32
omap2_clksel_get_divisor
(
struct
clk
*
clk
);
...
...
@@ -859,7 +859,7 @@ static struct clk core_l3_ck = { /* Used for ick and fck, interconnect */
static
struct
clk
usb_l4_ick
=
{
/* FS-USB interface clock */
.
name
=
"usb_l4_ick"
,
.
parent
=
&
core_ck
,
.
parent
=
&
core_
l3_
ck
,
.
flags
=
CLOCK_IN_OMAP242X
|
CLOCK_IN_OMAP243X
|
RATE_CKCTL
|
CM_CORE_SEL1
|
DELAYED_APP
|
CONFIG_PARTICIPANT
,
...
...
@@ -1045,7 +1045,7 @@ static struct clk gpt1_ick = {
.
name
=
"gpt1_ick"
,
.
parent
=
&
l4_ck
,
.
flags
=
CLOCK_IN_OMAP242X
|
CLOCK_IN_OMAP243X
,
.
enable_reg
=
(
void
__iomem
*
)
&
CM_ICLKEN_WKUP
,
/* Bit
4
*/
.
enable_reg
=
(
void
__iomem
*
)
&
CM_ICLKEN_WKUP
,
/* Bit
0
*/
.
enable_bit
=
0
,
.
recalc
=
&
omap2_followparent_recalc
,
};
...
...
@@ -1055,7 +1055,7 @@ static struct clk gpt1_fck = {
.
parent
=
&
func_32k_ck
,
.
flags
=
CLOCK_IN_OMAP242X
|
CLOCK_IN_OMAP243X
|
CM_WKUP_SEL1
,
.
enable_reg
=
(
void
__iomem
*
)
&
CM_FCLKEN_WKUP
,
.
enable_reg
=
(
void
__iomem
*
)
&
CM_FCLKEN_WKUP
,
/* Bit0 */
.
enable_bit
=
0
,
.
src_offset
=
0
,
.
recalc
=
&
omap2_followparent_recalc
,
...
...
@@ -1065,7 +1065,7 @@ static struct clk gpt2_ick = {
.
name
=
"gpt2_ick"
,
.
parent
=
&
l4_ck
,
.
flags
=
CLOCK_IN_OMAP242X
|
CLOCK_IN_OMAP243X
,
.
enable_reg
=
(
void
__iomem
*
)
&
CM_ICLKEN1_CORE
,
/*
b
it4 */
.
enable_reg
=
(
void
__iomem
*
)
&
CM_ICLKEN1_CORE
,
/*
B
it4 */
.
enable_bit
=
0
,
.
recalc
=
&
omap2_followparent_recalc
,
};
...
...
@@ -1839,7 +1839,7 @@ static struct clk usb_fck = {
static
struct
clk
usbhs_ick
=
{
.
name
=
"usbhs_ick"
,
.
parent
=
&
l4
_ck
,
.
parent
=
&
core_l3
_ck
,
.
flags
=
CLOCK_IN_OMAP243X
,
.
enable_reg
=
(
void
__iomem
*
)
&
CM_ICLKEN2_CORE
,
.
enable_bit
=
6
,
...
...
arch/arm/mach-omap2/serial.c
浏览文件 @
2333f212
...
...
@@ -119,14 +119,14 @@ void __init omap_serial_init()
if
(
IS_ERR
(
uart1_ick
))
printk
(
"Could not get uart1_ick
\n
"
);
else
{
clk_
us
e
(
uart1_ick
);
clk_
enabl
e
(
uart1_ick
);
}
uart1_fck
=
clk_get
(
NULL
,
"uart1_fck"
);
if
(
IS_ERR
(
uart1_fck
))
printk
(
"Could not get uart1_fck
\n
"
);
else
{
clk_
us
e
(
uart1_fck
);
clk_
enabl
e
(
uart1_fck
);
}
break
;
case
1
:
...
...
@@ -134,14 +134,14 @@ void __init omap_serial_init()
if
(
IS_ERR
(
uart2_ick
))
printk
(
"Could not get uart2_ick
\n
"
);
else
{
clk_
us
e
(
uart2_ick
);
clk_
enabl
e
(
uart2_ick
);
}
uart2_fck
=
clk_get
(
NULL
,
"uart2_fck"
);
if
(
IS_ERR
(
uart2_fck
))
printk
(
"Could not get uart2_fck
\n
"
);
else
{
clk_
us
e
(
uart2_fck
);
clk_
enabl
e
(
uart2_fck
);
}
break
;
case
2
:
...
...
@@ -149,14 +149,14 @@ void __init omap_serial_init()
if
(
IS_ERR
(
uart3_ick
))
printk
(
"Could not get uart3_ick
\n
"
);
else
{
clk_
us
e
(
uart3_ick
);
clk_
enabl
e
(
uart3_ick
);
}
uart3_fck
=
clk_get
(
NULL
,
"uart3_fck"
);
if
(
IS_ERR
(
uart3_fck
))
printk
(
"Could not get uart3_fck
\n
"
);
else
{
clk_
us
e
(
uart3_fck
);
clk_
enabl
e
(
uart3_fck
);
}
break
;
}
...
...
arch/arm/mach-omap2/timer-gp.c
浏览文件 @
2333f212
...
...
@@ -104,7 +104,7 @@ static void __init omap2_gp_timer_init(void)
if
(
IS_ERR
(
sys_ck
))
printk
(
KERN_ERR
"Could not get sys_ck
\n
"
);
else
{
clk_
us
e
(
sys_ck
);
clk_
enabl
e
(
sys_ck
);
tick_period
=
clk_get_rate
(
sys_ck
)
/
100
;
clk_put
(
sys_ck
);
}
...
...
arch/arm/plat-omap/clock.c
浏览文件 @
2333f212
...
...
@@ -34,7 +34,7 @@ DEFINE_SPINLOCK(clockfw_lock);
static
struct
clk_functions
*
arch_clock
;
/*-------------------------------------------------------------------------
* Standard clock functions defined in
asm/hardware/cloc
k.h
* Standard clock functions defined in
include/linux/cl
k.h
*-------------------------------------------------------------------------*/
struct
clk
*
clk_get
(
struct
device
*
dev
,
const
char
*
id
)
...
...
@@ -60,12 +60,8 @@ int clk_enable(struct clk *clk)
int
ret
=
0
;
spin_lock_irqsave
(
&
clockfw_lock
,
flags
);
if
(
clk
->
enable
)
ret
=
clk
->
enable
(
clk
);
else
if
(
arch_clock
->
clk_enable
)
if
(
arch_clock
->
clk_enable
)
ret
=
arch_clock
->
clk_enable
(
clk
);
else
printk
(
KERN_ERR
"Could not enable clock %s
\n
"
,
clk
->
name
);
spin_unlock_irqrestore
(
&
clockfw_lock
,
flags
);
return
ret
;
...
...
@@ -77,41 +73,12 @@ void clk_disable(struct clk *clk)
unsigned
long
flags
;
spin_lock_irqsave
(
&
clockfw_lock
,
flags
);
if
(
clk
->
disable
)
clk
->
disable
(
clk
);
else
if
(
arch_clock
->
clk_disable
)
if
(
arch_clock
->
clk_disable
)
arch_clock
->
clk_disable
(
clk
);
else
printk
(
KERN_ERR
"Could not disable clock %s
\n
"
,
clk
->
name
);
spin_unlock_irqrestore
(
&
clockfw_lock
,
flags
);
}
EXPORT_SYMBOL
(
clk_disable
);
int
clk_use
(
struct
clk
*
clk
)
{
unsigned
long
flags
;
int
ret
=
0
;
spin_lock_irqsave
(
&
clockfw_lock
,
flags
);
if
(
arch_clock
->
clk_use
)
ret
=
arch_clock
->
clk_use
(
clk
);
spin_unlock_irqrestore
(
&
clockfw_lock
,
flags
);
return
ret
;
}
EXPORT_SYMBOL
(
clk_use
);
void
clk_unuse
(
struct
clk
*
clk
)
{
unsigned
long
flags
;
spin_lock_irqsave
(
&
clockfw_lock
,
flags
);
if
(
arch_clock
->
clk_unuse
)
arch_clock
->
clk_unuse
(
clk
);
spin_unlock_irqrestore
(
&
clockfw_lock
,
flags
);
}
EXPORT_SYMBOL
(
clk_unuse
);
int
clk_get_usecount
(
struct
clk
*
clk
)
{
unsigned
long
flags
;
...
...
@@ -146,7 +113,7 @@ void clk_put(struct clk *clk)
EXPORT_SYMBOL
(
clk_put
);
/*-------------------------------------------------------------------------
* Optional clock functions defined in
asm/hardware/cloc
k.h
* Optional clock functions defined in
include/linux/cl
k.h
*-------------------------------------------------------------------------*/
long
clk_round_rate
(
struct
clk
*
clk
,
unsigned
long
rate
)
...
...
arch/arm/plat-omap/gpio.c
浏览文件 @
2333f212
...
...
@@ -853,19 +853,19 @@ static int __init _omap_gpio_init(void)
if
(
IS_ERR
(
gpio_ick
))
printk
(
"Could not get arm_gpio_ck
\n
"
);
else
clk_
us
e
(
gpio_ick
);
clk_
enabl
e
(
gpio_ick
);
}
if
(
cpu_is_omap24xx
())
{
gpio_ick
=
clk_get
(
NULL
,
"gpios_ick"
);
if
(
IS_ERR
(
gpio_ick
))
printk
(
"Could not get gpios_ick
\n
"
);
else
clk_
us
e
(
gpio_ick
);
clk_
enabl
e
(
gpio_ick
);
gpio_fck
=
clk_get
(
NULL
,
"gpios_fck"
);
if
(
IS_ERR
(
gpio_ick
))
printk
(
"Could not get gpios_fck
\n
"
);
else
clk_
us
e
(
gpio_fck
);
clk_
enabl
e
(
gpio_fck
);
}
#ifdef CONFIG_ARCH_OMAP15XX
...
...
arch/arm/plat-omap/mcbsp.c
浏览文件 @
2333f212
...
...
@@ -190,11 +190,11 @@ static int omap_mcbsp_check(unsigned int id)
static
void
omap_mcbsp_dsp_request
(
void
)
{
if
(
cpu_is_omap1510
()
||
cpu_is_omap16xx
())
{
clk_
us
e
(
mcbsp_dsp_ck
);
clk_
us
e
(
mcbsp_api_ck
);
clk_
enabl
e
(
mcbsp_dsp_ck
);
clk_
enabl
e
(
mcbsp_api_ck
);
/* enable 12MHz clock to mcbsp 1 & 3 */
clk_
us
e
(
mcbsp_dspxor_ck
);
clk_
enabl
e
(
mcbsp_dspxor_ck
);
/*
* DSP external peripheral reset
...
...
@@ -208,9 +208,9 @@ static void omap_mcbsp_dsp_request(void)
static
void
omap_mcbsp_dsp_free
(
void
)
{
if
(
cpu_is_omap1510
()
||
cpu_is_omap16xx
())
{
clk_
unus
e
(
mcbsp_dspxor_ck
);
clk_
unus
e
(
mcbsp_dsp_ck
);
clk_
unus
e
(
mcbsp_api_ck
);
clk_
disabl
e
(
mcbsp_dspxor_ck
);
clk_
disabl
e
(
mcbsp_dsp_ck
);
clk_
disabl
e
(
mcbsp_api_ck
);
}
}
...
...
arch/arm/plat-omap/ocpi.c
浏览文件 @
2333f212
...
...
@@ -88,7 +88,7 @@ static int __init omap_ocpi_init(void)
if
(
IS_ERR
(
ocpi_ck
))
return
PTR_ERR
(
ocpi_ck
);
clk_
us
e
(
ocpi_ck
);
clk_
enabl
e
(
ocpi_ck
);
ocpi_enable
();
printk
(
"OMAP OCPI interconnect driver loaded
\n
"
);
...
...
@@ -102,7 +102,7 @@ static void __exit omap_ocpi_exit(void)
if
(
!
cpu_is_omap16xx
())
return
;
clk_
unus
e
(
ocpi_ck
);
clk_
disabl
e
(
ocpi_ck
);
clk_put
(
ocpi_ck
);
}
...
...
drivers/serial/Kconfig
浏览文件 @
2333f212
...
...
@@ -301,7 +301,7 @@ config SERIAL_AT91_TTYAT
depends on SERIAL_AT91=y
help
Say Y here if you wish to have the five internal AT91RM9200 UARTs
appear as /dev/ttyAT0-4 (major 2
40, minor 0-4
) instead of the
appear as /dev/ttyAT0-4 (major 2
04, minor 154-158
) instead of the
normal /dev/ttyS0-4 (major 4, minor 64-68). This is necessary if
you also want other UARTs, such as external 8250/16C550 compatible
UARTs.
...
...
drivers/serial/at91_serial.c
浏览文件 @
2333f212
...
...
@@ -222,8 +222,6 @@ static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs)
while
(
status
&
(
AT91_US_RXRDY
))
{
ch
=
UART_GET_CHAR
(
port
);
if
(
tty
->
flip
.
count
>=
TTY_FLIPBUF_SIZE
)
goto
ignore_char
;
port
->
icount
.
rx
++
;
flg
=
TTY_NORMAL
;
...
...
include/asm-arm/arch-omap/clock.h
浏览文件 @
2333f212
...
...
@@ -38,8 +38,6 @@ struct clk {
struct
clk_functions
{
int
(
*
clk_enable
)(
struct
clk
*
clk
);
void
(
*
clk_disable
)(
struct
clk
*
clk
);
int
(
*
clk_use
)(
struct
clk
*
clk
);
void
(
*
clk_unuse
)(
struct
clk
*
clk
);
long
(
*
clk_round_rate
)(
struct
clk
*
clk
,
unsigned
long
rate
);
int
(
*
clk_set_rate
)(
struct
clk
*
clk
,
unsigned
long
rate
);
int
(
*
clk_set_parent
)(
struct
clk
*
clk
,
struct
clk
*
parent
);
...
...
include/asm-arm/arch-pxa/pxa-regs.h
浏览文件 @
2333f212
...
...
@@ -108,6 +108,7 @@
#define DCSR_STARTINTR (1 << 1)
/* Start Interrupt (read / write) */
#define DCSR_BUSERR (1 << 0)
/* Bus Error Interrupt (read / write) */
#define DALGN __REG(0x400000a0)
/* DMA Alignment Register */
#define DINT __REG(0x400000f0)
/* DMA Interrupt Register */
#define DRCMR(n) __REG2(0x40000100, (n)<<2)
...
...
@@ -1614,8 +1615,21 @@
#define SSCR0_National (0x2 << 4)
/* National Microwire */
#define SSCR0_ECS (1 << 6)
/* External clock select */
#define SSCR0_SSE (1 << 7)
/* Synchronous Serial Port Enable */
#if defined(CONFIG_PXA25x)
#define SSCR0_SCR (0x0000ff00)
/* Serial Clock Rate (mask) */
#define SSCR0_SerClkDiv(x) ((((x) - 2)/2) << 8)
/* Divisor [2..512] */
#elif defined(CONFIG_PXA27x)
#define SSCR0_SCR (0x000fff00)
/* Serial Clock Rate (mask) */
#define SSCR0_SerClkDiv(x) (((x) - 1) << 8)
/* Divisor [1..4096] */
#define SSCR0_EDSS (1 << 20)
/* Extended data size select */
#define SSCR0_NCS (1 << 21)
/* Network clock select */
#define SSCR0_RIM (1 << 22)
/* Receive FIFO overrrun interrupt mask */
#define SSCR0_TUM (1 << 23)
/* Transmit FIFO underrun interrupt mask */
#define SSCR0_FRDC (0x07000000)
/* Frame rate divider control (mask) */
#define SSCR0_SlotsPerFrm(c) ((x) - 1)
/* Time slots per frame [1..8] */
#define SSCR0_ADC (1 << 30)
/* Audio clock select */
#define SSCR0_MOD (1 << 31)
/* Mode (normal or network) */
#endif
#define SSCR1_RIE (1 << 0)
/* Receive FIFO Interrupt Enable */
#define SSCR1_TIE (1 << 1)
/* Transmit FIFO Interrupt Enable */
...
...
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