提交 1810b6cb 编写于 作者: L Linus Torvalds

Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm: (27 commits)
  [ARM] 3433/1: ARM: OMAP: 8/8 Update board files
  [ARM] 3455/1: ARM: OMAP: 7/8 Misc updates, take 2
  [ARM] 3454/1: ARM: OMAP: 6/8 Update framebuffer low-level init code, take 2
  [ARM] 3430/1: ARM: OMAP: 5/8 Update PM
  [ARM] 3429/1: ARM: OMAP: 4/8 Update GPIO
  [ARM] 3428/1: ARM: OMAP: 3/8 Update pin multiplexing
  [ARM] 3427/1: ARM: OMAP: 2/8 Update timers
  [ARM] 3426/1: ARM: OMAP: 1/8 Update clock framework
  [ARM] 3396/2: AT91RM9200 Platform devices update
  [ARM] 3395/2: AT91RM9200 Dataflash Card vs MMC selection
  [ARM] 3393/2: AT91RM9200 LED support
  [ARM] 3453/1: Poodle: Correctly set the memory size
  [ARM] 3446/1: i.MX: MMC/SD SDHC controller registration for i.MX/MX1 MX1ADS board
  [ARM] 3444/1: i.MX: Scatter-gather DMA emulation for i.MX/MX1
  [ARM] 3451/1: ep93xx: use the m48t86 rtc driver on the ts72xx platform
  [ARM] 3450/1: ep93xx: use the ep93xx rtc driver
  [ARM] 3452/1: [S3C2410] RX3715 - add nand information
  [ARM] 3449/1: [S3C2410] Anubis - fix NAND timings
  [ARM] 3448/1: [S3C2410] Settle delay when _enabling_ USB PLL
  [ARM] 3442/1: [S3C2410] SMDK: NAND device setup
  ...
......@@ -379,7 +379,7 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_AT91_DATAFLASH=y
CONFIG_MTD_AT91_DATAFLASH_CARD=y
# CONFIG_MTD_AT91_DATAFLASH_CARD is not set
#
# NAND Flash Device Drivers
......
......@@ -370,7 +370,7 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_AT91_DATAFLASH=y
CONFIG_MTD_AT91_DATAFLASH_CARD=y
# CONFIG_MTD_AT91_DATAFLASH_CARD is not set
#
# NAND Flash Device Drivers
......
......@@ -100,23 +100,12 @@ EXPORT_SYMBOL(__raw_writesl);
#endif
/* string / mem functions */
EXPORT_SYMBOL(strcpy);
EXPORT_SYMBOL(strncpy);
EXPORT_SYMBOL(strcat);
EXPORT_SYMBOL(strncat);
EXPORT_SYMBOL(strcmp);
EXPORT_SYMBOL(strncmp);
EXPORT_SYMBOL(strchr);
EXPORT_SYMBOL(strlen);
EXPORT_SYMBOL(strnlen);
EXPORT_SYMBOL(strpbrk);
EXPORT_SYMBOL(strrchr);
EXPORT_SYMBOL(strstr);
EXPORT_SYMBOL(memset);
EXPORT_SYMBOL(memcpy);
EXPORT_SYMBOL(memmove);
EXPORT_SYMBOL(memcmp);
EXPORT_SYMBOL(memscan);
EXPORT_SYMBOL(memchr);
EXPORT_SYMBOL(__memzero);
......@@ -190,8 +179,6 @@ EXPORT_SYMBOL(_find_next_bit_be);
/* syscalls */
EXPORT_SYMBOL(sys_write);
EXPORT_SYMBOL(sys_read);
EXPORT_SYMBOL(sys_lseek);
EXPORT_SYMBOL(sys_open);
EXPORT_SYMBOL(sys_exit);
EXPORT_SYMBOL(sys_wait4);
......@@ -252,6 +252,9 @@ static void __init dump_cpu_info(int cpu)
dump_cache("cache", cpu, CACHE_ISIZE(info));
}
}
if (arch_is_coherent())
printk("Cache coherency enabled\n");
}
int cpu_architecture(void)
......
......@@ -16,11 +16,12 @@ obj-$(CONFIG_MACH_CSB637) += board-csb637.o
#obj-$(CONFIG_MACH_KB9200) += board-kb9202.o
# LEDs support
#led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
#led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
#led-$(CONFIG_MACH_CSB337) += leds.o
#led-$(CONFIG_MACH_CSB637) += leds.o
led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
led-$(CONFIG_MACH_CSB337) += leds.o
led-$(CONFIG_MACH_CSB637) += leds.o
#led-$(CONFIG_MACH_KB9200) += leds.o
#led-$(CONFIG_MACH_KAFA) += leds.o
obj-$(CONFIG_LEDS) += $(led-y)
# VGA support
......
......@@ -67,6 +67,9 @@ static void __init csb337_map_io(void)
/* Initialize clocks: 3.6864 MHz crystal */
at91_clock_init(3686400);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
#ifdef CONFIG_SERIAL_AT91
at91_console_port = CSB337_SERIAL_CONSOLE;
memcpy(at91_serial_map, serial, sizeof(serial));
......
......@@ -67,6 +67,9 @@ static void __init csb637_map_io(void)
/* Initialize clocks: 3.6864 MHz crystal */
at91_clock_init(3686400);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
#ifdef CONFIG_SERIAL_AT91
at91_console_port = CSB637_SERIAL_CONSOLE;
memcpy(at91_serial_map, serial, sizeof(serial));
......
......@@ -70,6 +70,9 @@ static void __init dk_map_io(void)
/* Initialize clocks: 18.432 MHz crystal */
at91_clock_init(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
#ifdef CONFIG_SERIAL_AT91
at91_console_port = DK_SERIAL_CONSOLE;
memcpy(at91_serial_map, serial, sizeof(serial));
......@@ -118,9 +121,14 @@ static void __init dk_board_init(void)
at91_add_device_udc(&dk_udc_data);
/* Compact Flash */
at91_add_device_cf(&dk_cf_data);
#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
/* DataFlash card */
at91_set_gpio_output(AT91_PIN_PB7, 0);
#else
/* MMC */
at91_set_gpio_output(AT91_PIN_PB7, 1); /* this MMC card slot can optionally use SPI signaling (CS3). default: MMC */
at91_set_gpio_output(AT91_PIN_PB7, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
at91_add_device_mmc(&dk_mmc_data);
#endif
/* VGA */
// dk_add_device_video();
}
......
......@@ -70,6 +70,9 @@ static void __init ek_map_io(void)
/* Initialize clocks: 18.432 MHz crystal */
at91_clock_init(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
#ifdef CONFIG_SERIAL_AT91
at91_console_port = EK_SERIAL_CONSOLE;
memcpy(at91_serial_map, serial, sizeof(serial));
......@@ -111,9 +114,14 @@ static void __init ek_board_init(void)
at91_add_device_usbh(&ek_usbh_data);
/* USB Device */
at91_add_device_udc(&ek_udc_data);
#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
/* DataFlash card */
at91_set_gpio_output(AT91_PIN_PB22, 0);
#else
/* MMC */
at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). default: MMC */
at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
at91_add_device_mmc(&ek_mmc_data);
#endif
/* VGA */
// ek_add_device_video();
}
......
......@@ -28,10 +28,10 @@
static u64 ohci_dmamask = 0xffffffffUL;
static struct at91_usbh_data usbh_data;
static struct resource at91rm9200_usbh_resource[] = {
static struct resource at91_usbh_resource[] = {
[0] = {
.start = AT91_UHP_BASE,
.end = AT91_UHP_BASE + SZ_1M -1,
.end = AT91_UHP_BASE + SZ_1M - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -49,8 +49,8 @@ static struct platform_device at91rm9200_usbh_device = {
.coherent_dma_mask = 0xffffffff,
.platform_data = &usbh_data,
},
.resource = at91rm9200_usbh_resource,
.num_resources = ARRAY_SIZE(at91rm9200_usbh_resource),
.resource = at91_usbh_resource,
.num_resources = ARRAY_SIZE(at91_usbh_resource),
};
void __init at91_add_device_usbh(struct at91_usbh_data *data)
......@@ -121,6 +121,19 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
static u64 eth_dmamask = 0xffffffffUL;
static struct at91_eth_data eth_data;
static struct resource at91_eth_resources[] = {
[0] = {
.start = AT91_BASE_EMAC,
.end = AT91_BASE_EMAC + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_EMAC,
.end = AT91_ID_EMAC,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91rm9200_eth_device = {
.name = "at91_ether",
.id = -1,
......@@ -129,7 +142,8 @@ static struct platform_device at91rm9200_eth_device = {
.coherent_dma_mask = 0xffffffff,
.platform_data = &eth_data,
},
.num_resources = 0,
.resource = at91_eth_resources,
.num_resources = ARRAY_SIZE(at91_eth_resources),
};
void __init at91_add_device_eth(struct at91_eth_data *data)
......@@ -224,15 +238,20 @@ static u64 mmc_dmamask = 0xffffffffUL;
static struct at91_mmc_data mmc_data;
static struct resource at91_mmc_resources[] = {
{
[0] = {
.start = AT91_BASE_MCI,
.end = AT91_BASE_MCI + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}
},
[1] = {
.start = AT91_ID_MCI,
.end = AT91_ID_MCI,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91rm9200_mmc_device = {
.name = "at91rm9200_mci",
.name = "at91_mci",
.id = -1,
.dev = {
.dma_mask = &mmc_dmamask,
......@@ -290,4 +309,123 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data)
void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
#endif
/* --------------------------------------------------------------------
* NAND / SmartMedia
* -------------------------------------------------------------------- */
#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
static struct at91_nand_data nand_data;
static struct resource at91_nand_resources[] = {
{
.start = AT91_SMARTMEDIA_BASE,
.end = AT91_SMARTMEDIA_BASE + SZ_8M - 1,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device at91_nand_device = {
.name = "at91_nand",
.id = -1,
.dev = {
.platform_data = &nand_data,
},
.resource = at91_nand_resources,
.num_resources = ARRAY_SIZE(at91_nand_resources),
};
void __init at91_add_device_nand(struct at91_nand_data *data)
{
if (!data)
return;
/* enable pin */
if (data->enable_pin)
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (data->rdy_pin)
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (data->det_pin)
at91_set_gpio_input(data->det_pin, 1);
at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */
nand_data = *data;
platform_device_register(&at91_nand_device);
}
#else
void __init at91_add_device_nand(struct at91_nand_data *data) {}
#endif
/* --------------------------------------------------------------------
* TWI (i2c)
* -------------------------------------------------------------------- */
#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
static struct platform_device at91rm9200_twi_device = {
.name = "at91_i2c",
.id = -1,
.num_resources = 0,
};
void __init at91_add_device_i2c(void)
{
/* pins used for TWI interface */
at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
at91_set_multi_drive(AT91_PIN_PA25, 1);
at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
at91_set_multi_drive(AT91_PIN_PA26, 1);
platform_device_register(&at91rm9200_twi_device);
}
#else
void __init at91_add_device_i2c(void) {}
#endif
/* --------------------------------------------------------------------
* RTC
* -------------------------------------------------------------------- */
#if defined(CONFIG_AT91_RTC) || defined(CONFIG_AT91_RTC_MODULE)
static struct platform_device at91rm9200_rtc_device = {
.name = "at91_rtc",
.id = -1,
.num_resources = 0,
};
void __init at91_add_device_rtc(void)
{
platform_device_register(&at91rm9200_rtc_device);
}
#else
void __init at91_add_device_rtc(void) {}
#endif
/* --------------------------------------------------------------------
* LEDs
* -------------------------------------------------------------------- */
#if defined(CONFIG_LEDS)
u8 at91_leds_cpu;
u8 at91_leds_timer;
void __init at91_init_leds(u8 cpu_led, u8 timer_led)
{
at91_leds_cpu = cpu_led;
at91_leds_timer = timer_led;
}
#else
void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
#endif
/* -------------------------------------------------------------------- */
/*
* LED driver for Atmel AT91-based boards.
*
* Copyright (C) SAN People (Pty) Ltd
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <asm/mach-types.h>
#include <asm/leds.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
static inline void at91_led_on(unsigned int led)
{
at91_set_gpio_value(led, 0);
}
static inline void at91_led_off(unsigned int led)
{
at91_set_gpio_value(led, 1);
}
static inline void at91_led_toggle(unsigned int led)
{
unsigned long is_off = at91_get_gpio_value(led);
if (is_off)
at91_led_on(led);
else
at91_led_off(led);
}
/*
* Handle LED events.
*/
static void at91_leds_event(led_event_t evt)
{
unsigned long flags;
local_irq_save(flags);
switch(evt) {
case led_start: /* System startup */
at91_led_on(at91_leds_cpu);
break;
case led_stop: /* System stop / suspend */
at91_led_off(at91_leds_cpu);
break;
#ifdef CONFIG_LEDS_TIMER
case led_timer: /* Every 50 timer ticks */
at91_led_toggle(at91_leds_timer);
break;
#endif
#ifdef CONFIG_LEDS_CPU
case led_idle_start: /* Entering idle state */
at91_led_off(at91_leds_cpu);
break;
case led_idle_end: /* Exit idle state */
at91_led_on(at91_leds_cpu);
break;
#endif
default:
break;
}
local_irq_restore(flags);
}
static int __init leds_init(void)
{
if (!at91_leds_timer || !at91_leds_cpu)
return -ENODEV;
/* Enable PIO to access the LEDs */
at91_set_gpio_output(at91_leds_timer, 1);
at91_set_gpio_output(at91_leds_cpu, 1);
leds_event = at91_leds_event;
leds_event(led_start);
return 0;
}
__initcall(leds_init);
......@@ -424,6 +424,14 @@ static struct amba_device uart3_device = {
.periphid = 0x00041010,
};
static struct platform_device ep93xx_rtc_device = {
.name = "ep93xx-rtc",
.id = -1,
.num_resources = 0,
};
void __init ep93xx_init_devices(void)
{
unsigned int v;
......@@ -439,4 +447,6 @@ void __init ep93xx_init_devices(void)
amba_device_register(&uart1_device, &iomem_resource);
amba_device_register(&uart2_device, &iomem_resource);
amba_device_register(&uart3_device, &iomem_resource);
platform_device_register(&ep93xx_rtc_device);
}
......@@ -17,6 +17,8 @@
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/m48t86.h>
#include <asm/io.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
......@@ -39,6 +41,16 @@ static struct map_desc ts72xx_io_desc[] __initdata = {
.pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
.length = TS72XX_OPTIONS2_SIZE,
.type = MT_DEVICE,
}, {
.virtual = TS72XX_RTC_INDEX_VIRT_BASE,
.pfn = __phys_to_pfn(TS72XX_RTC_INDEX_PHYS_BASE),
.length = TS72XX_RTC_INDEX_SIZE,
.type = MT_DEVICE,
}, {
.virtual = TS72XX_RTC_DATA_VIRT_BASE,
.pfn = __phys_to_pfn(TS72XX_RTC_DATA_PHYS_BASE),
.length = TS72XX_RTC_DATA_SIZE,
.type = MT_DEVICE,
}
};
......@@ -99,11 +111,38 @@ static void __init ts72xx_map_io(void)
}
}
static unsigned char ts72xx_rtc_readb(unsigned long addr)
{
__raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
return __raw_readb(TS72XX_RTC_DATA_VIRT_BASE);
}
static void ts72xx_rtc_writeb(unsigned char value, unsigned long addr)
{
__raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
__raw_writeb(value, TS72XX_RTC_DATA_VIRT_BASE);
}
static struct m48t86_ops ts72xx_rtc_ops = {
.readb = ts72xx_rtc_readb,
.writeb = ts72xx_rtc_writeb,
};
static struct platform_device ts72xx_rtc_device = {
.name = "rtc-m48t86",
.id = -1,
.dev = {
.platform_data = &ts72xx_rtc_ops,
},
.num_resources = 0,
};
static void __init ts72xx_init_machine(void)
{
ep93xx_init_devices();
if (board_is_ts7200())
physmap_configure(TS72XX_NOR_PHYS_BASE, 0x01000000, 1, NULL);
platform_device_register(&ts72xx_rtc_device);
}
MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
......
......@@ -7,11 +7,18 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* 03/03/2004 Sascha Hauer <sascha@saschahauer.de>
* 2004-03-03 Sascha Hauer <sascha@saschahauer.de>
* initial version heavily inspired by
* linux/arch/arm/mach-pxa/dma.c
*
* 2005-04-17 Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Changed to support scatter gather DMA
* by taking Russell's code from RiscPC
*
*/
#undef DEBUG
#include <linux/module.h>
#include <linux/init.h>
#include <linux/kernel.h>
......@@ -22,69 +29,368 @@
#include <asm/irq.h>
#include <asm/hardware.h>
#include <asm/dma.h>
#include <asm/arch/imx-dma.h>
struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
/*
* imx_dma_sg_next - prepare next chunk for scatter-gather DMA emulation
* @dma_ch: i.MX DMA channel number
* @lastcount: number of bytes transferred during last transfer
*
* Functions prepares DMA controller for next sg data chunk transfer.
* The @lastcount argument informs function about number of bytes transferred
* during last block. Zero value can be used for @lastcount to setup DMA
* for the first chunk.
*/
static inline int imx_dma_sg_next(imx_dmach_t dma_ch, unsigned int lastcount)
{
struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
unsigned int nextcount;
unsigned int nextaddr;
if (!imxdma->name) {
printk(KERN_CRIT "%s: called for not allocated channel %d\n",
__FUNCTION__, dma_ch);
return 0;
}
imxdma->resbytes -= lastcount;
if (!imxdma->sg) {
pr_debug("imxdma%d: no sg data\n", dma_ch);
return 0;
}
imxdma->sgbc += lastcount;
if ((imxdma->sgbc >= imxdma->sg->length) || !imxdma->resbytes) {
if ((imxdma->sgcount <= 1) || !imxdma->resbytes) {
pr_debug("imxdma%d: sg transfer limit reached\n",
dma_ch);
imxdma->sgcount=0;
imxdma->sg = NULL;
return 0;
} else {
imxdma->sgcount--;
imxdma->sg++;
imxdma->sgbc = 0;
}
}
nextcount = imxdma->sg->length - imxdma->sgbc;
nextaddr = imxdma->sg->dma_address + imxdma->sgbc;
static struct dma_channel {
char *name;
void (*irq_handler) (int, void *, struct pt_regs *);
void (*err_handler) (int, void *, struct pt_regs *);
void *data;
} dma_channels[11];
if(imxdma->resbytes < nextcount)
nextcount = imxdma->resbytes;
/* set err_handler to NULL to have the standard info-only error handler */
if ((imxdma->dma_mode & DMA_MODE_MASK) == DMA_MODE_READ)
DAR(dma_ch) = nextaddr;
else
SAR(dma_ch) = nextaddr;
CNTR(dma_ch) = nextcount;
pr_debug("imxdma%d: next sg chunk dst 0x%08x, src 0x%08x, size 0x%08x\n",
dma_ch, DAR(dma_ch), SAR(dma_ch), CNTR(dma_ch));
return nextcount;
}
/*
* imx_dma_setup_sg_base - scatter-gather DMA emulation
* @dma_ch: i.MX DMA channel number
* @sg: pointer to the scatter-gather list/vector
* @sgcount: scatter-gather list hungs count
*
* Functions sets up i.MX DMA state for emulated scatter-gather transfer
* and sets up channel registers to be ready for the first chunk
*/
static int
imx_dma_setup_sg_base(imx_dmach_t dma_ch,
struct scatterlist *sg, unsigned int sgcount)
{
struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
imxdma->sg = sg;
imxdma->sgcount = sgcount;
imxdma->sgbc = 0;
return imx_dma_sg_next(dma_ch, 0);
}
/**
* imx_dma_setup_single - setup i.MX DMA channel for linear memory to/from device transfer
* @dma_ch: i.MX DMA channel number
* @dma_address: the DMA/physical memory address of the linear data block
* to transfer
* @dma_length: length of the data block in bytes
* @dev_addr: physical device port address
* @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory
* or %DMA_MODE_WRITE from memory to the device
*
* The function setups DMA channel source and destination addresses for transfer
* specified by provided parameters. The scatter-gather emulation is disabled,
* because linear data block
* form the physical address range is transfered.
* Return value: if incorrect parameters are provided -%EINVAL.
* Zero indicates success.
*/
int
imx_request_dma(char *name, imx_dma_prio prio,
void (*irq_handler) (int, void *, struct pt_regs *),
void (*err_handler) (int, void *, struct pt_regs *), void *data)
imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
unsigned int dma_length, unsigned int dev_addr,
dmamode_t dmamode)
{
unsigned long flags;
int i, found = 0;
struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
/* basic sanity checks */
if (!name || !irq_handler)
imxdma->sg = NULL;
imxdma->sgcount = 0;
imxdma->dma_mode = dmamode;
imxdma->resbytes = dma_length;
if (!dma_address) {
printk(KERN_ERR "imxdma%d: imx_dma_setup_single null address\n",
dma_ch);
return -EINVAL;
}
local_irq_save(flags);
if (!dma_length) {
printk(KERN_ERR "imxdma%d: imx_dma_setup_single zero length\n",
dma_ch);
return -EINVAL;
}
/* try grabbing a DMA channel with the requested priority */
for (i = prio; i < prio + (prio == DMA_PRIO_LOW) ? 8 : 4; i++) {
if (!dma_channels[i].name) {
found = 1;
break;
}
if ((dmamode & DMA_MODE_MASK) == DMA_MODE_READ) {
pr_debug("imxdma%d: mx_dma_setup_single2dev dma_addressg=0x%08x dma_length=%d dev_addr=0x%08x for read\n",
dma_ch, (unsigned int)dma_address, dma_length,
dev_addr);
SAR(dma_ch) = dev_addr;
DAR(dma_ch) = (unsigned int)dma_address;
} else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
pr_debug("imxdma%d: mx_dma_setup_single2dev dma_addressg=0x%08x dma_length=%d dev_addr=0x%08x for write\n",
dma_ch, (unsigned int)dma_address, dma_length,
dev_addr);
SAR(dma_ch) = (unsigned int)dma_address;
DAR(dma_ch) = dev_addr;
} else {
printk(KERN_ERR "imxdma%d: imx_dma_setup_single bad dmamode\n",
dma_ch);
return -EINVAL;
}
if (!found) {
/* requested prio group is full, try hier priorities */
for (i = prio - 1; i >= 0; i--) {
if (!dma_channels[i].name) {
found = 1;
break;
}
}
CNTR(dma_ch) = dma_length;
return 0;
}
/**
* imx_dma_setup_sg - setup i.MX DMA channel SG list to/from device transfer
* @dma_ch: i.MX DMA channel number
* @sg: pointer to the scatter-gather list/vector
* @sgcount: scatter-gather list hungs count
* @dma_length: total length of the transfer request in bytes
* @dev_addr: physical device port address
* @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory
* or %DMA_MODE_WRITE from memory to the device
*
* The function setups DMA channel state and registers to be ready for transfer
* specified by provided parameters. The scatter-gather emulation is set up
* according to the parameters.
*
* The full preparation of the transfer requires setup of more register
* by the caller before imx_dma_enable() can be called.
*
* %BLR(dma_ch) holds transfer burst length in bytes, 0 means 64 bytes
*
* %RSSR(dma_ch) has to be set to the DMA request line source %DMA_REQ_xxx
*
* %CCR(dma_ch) has to specify transfer parameters, the next settings is typical
* for linear or simple scatter-gather transfers if %DMA_MODE_READ is specified
*
* %CCR_DMOD_LINEAR | %CCR_DSIZ_32 | %CCR_SMOD_FIFO | %CCR_SSIZ_x
*
* The typical setup for %DMA_MODE_WRITE is specified by next options combination
*
* %CCR_SMOD_LINEAR | %CCR_SSIZ_32 | %CCR_DMOD_FIFO | %CCR_DSIZ_x
*
* Be carefull there and do not mistakenly mix source and target device
* port sizes constants, they are really different:
* %CCR_SSIZ_8, %CCR_SSIZ_16, %CCR_SSIZ_32,
* %CCR_DSIZ_8, %CCR_DSIZ_16, %CCR_DSIZ_32
*
* Return value: if incorrect parameters are provided -%EINVAL.
* Zero indicates success.
*/
int
imx_dma_setup_sg(imx_dmach_t dma_ch,
struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length,
unsigned int dev_addr, dmamode_t dmamode)
{
int res;
struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
imxdma->sg = NULL;
imxdma->sgcount = 0;
imxdma->dma_mode = dmamode;
imxdma->resbytes = dma_length;
if (!sg || !sgcount) {
printk(KERN_ERR "imxdma%d: imx_dma_setup_sg epty sg list\n",
dma_ch);
return -EINVAL;
}
if (!sg->length) {
printk(KERN_ERR "imxdma%d: imx_dma_setup_sg zero length\n",
dma_ch);
return -EINVAL;
}
if (found) {
DIMR &= ~(1 << i);
dma_channels[i].name = name;
dma_channels[i].irq_handler = irq_handler;
dma_channels[i].err_handler = err_handler;
dma_channels[i].data = data;
if ((dmamode & DMA_MODE_MASK) == DMA_MODE_READ) {
pr_debug("imxdma%d: mx_dma_setup_sg2dev sg=%p sgcount=%d total length=%d dev_addr=0x%08x for read\n",
dma_ch, sg, sgcount, dma_length, dev_addr);
SAR(dma_ch) = dev_addr;
} else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
pr_debug("imxdma%d: mx_dma_setup_sg2dev sg=%p sgcount=%d total length=%d dev_addr=0x%08x for write\n",
dma_ch, sg, sgcount, dma_length, dev_addr);
DAR(dma_ch) = dev_addr;
} else {
printk(KERN_WARNING "No more available DMA channels for %s\n",
name);
i = -ENODEV;
printk(KERN_ERR "imxdma%d: imx_dma_setup_sg bad dmamode\n",
dma_ch);
return -EINVAL;
}
res = imx_dma_setup_sg_base(dma_ch, sg, sgcount);
if (res <= 0) {
printk(KERN_ERR "imxdma%d: no sg chunk ready\n", dma_ch);
return -EINVAL;
}
return 0;
}
/**
* imx_dma_setup_handlers - setup i.MX DMA channel end and error notification handlers
* @dma_ch: i.MX DMA channel number
* @irq_handler: the pointer to the function called if the transfer
* ends successfully
* @err_handler: the pointer to the function called if the premature
* end caused by error occurs
* @data: user specified value to be passed to the handlers
*/
int
imx_dma_setup_handlers(imx_dmach_t dma_ch,
void (*irq_handler) (int, void *, struct pt_regs *),
void (*err_handler) (int, void *, struct pt_regs *),
void *data)
{
struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
unsigned long flags;
if (!imxdma->name) {
printk(KERN_CRIT "%s: called for not allocated channel %d\n",
__FUNCTION__, dma_ch);
return -ENODEV;
}
local_irq_save(flags);
DISR = (1 << dma_ch);
imxdma->irq_handler = irq_handler;
imxdma->err_handler = err_handler;
imxdma->data = data;
local_irq_restore(flags);
return 0;
}
/**
* imx_dma_enable - function to start i.MX DMA channel operation
* @dma_ch: i.MX DMA channel number
*
* The channel has to be allocated by driver through imx_dma_request()
* or imx_dma_request_by_prio() function.
* The transfer parameters has to be set to the channel registers through
* call of the imx_dma_setup_single() or imx_dma_setup_sg() function
* and registers %BLR(dma_ch), %RSSR(dma_ch) and %CCR(dma_ch) has to
* be set prior this function call by the channel user.
*/
void imx_dma_enable(imx_dmach_t dma_ch)
{
struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
unsigned long flags;
pr_debug("imxdma%d: imx_dma_enable\n", dma_ch);
if (!imxdma->name) {
printk(KERN_CRIT "%s: called for not allocated channel %d\n",
__FUNCTION__, dma_ch);
return;
}
local_irq_save(flags);
DISR = (1 << dma_ch);
DIMR &= ~(1 << dma_ch);
CCR(dma_ch) |= CCR_CEN;
local_irq_restore(flags);
}
/**
* imx_dma_disable - stop, finish i.MX DMA channel operatin
* @dma_ch: i.MX DMA channel number
*/
void imx_dma_disable(imx_dmach_t dma_ch)
{
unsigned long flags;
pr_debug("imxdma%d: imx_dma_disable\n", dma_ch);
local_irq_save(flags);
DIMR |= (1 << dma_ch);
CCR(dma_ch) &= ~CCR_CEN;
DISR = (1 << dma_ch);
local_irq_restore(flags);
}
/**
* imx_dma_request - request/allocate specified channel number
* @dma_ch: i.MX DMA channel number
* @name: the driver/caller own non-%NULL identification
*/
int imx_dma_request(imx_dmach_t dma_ch, const char *name)
{
struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
unsigned long flags;
/* basic sanity checks */
if (!name)
return -EINVAL;
if (dma_ch >= IMX_DMA_CHANNELS) {
printk(KERN_CRIT "%s: called for non-existed channel %d\n",
__FUNCTION__, dma_ch);
return -EINVAL;
}
local_irq_save(flags);
if (imxdma->name) {
local_irq_restore(flags);
return -ENODEV;
}
imxdma->name = name;
imxdma->irq_handler = NULL;
imxdma->err_handler = NULL;
imxdma->data = NULL;
imxdma->sg = NULL;
local_irq_restore(flags);
return i;
return 0;
}
void
imx_free_dma(int dma_ch)
/**
* imx_dma_free - release previously acquired channel
* @dma_ch: i.MX DMA channel number
*/
void imx_dma_free(imx_dmach_t dma_ch)
{
unsigned long flags;
struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
if (!dma_channels[dma_ch].name) {
if (!imxdma->name) {
printk(KERN_CRIT
"%s: trying to free channel %d which is already freed\n",
__FUNCTION__, dma_ch);
......@@ -92,27 +398,84 @@ imx_free_dma(int dma_ch)
}
local_irq_save(flags);
DIMR &= ~(1 << dma_ch);
dma_channels[dma_ch].name = NULL;
/* Disable interrupts */
DIMR |= (1 << dma_ch);
CCR(dma_ch) &= ~CCR_CEN;
imxdma->name = NULL;
local_irq_restore(flags);
}
static irqreturn_t
dma_err_handler(int irq, void *dev_id, struct pt_regs *regs)
/**
* imx_dma_request_by_prio - find and request some of free channels best suiting requested priority
* @dma_ch: i.MX DMA channel number
* @name: the driver/caller own non-%NULL identification
* @prio: one of the hardware distinguished priority level:
* %DMA_PRIO_HIGH, %DMA_PRIO_MEDIUM, %DMA_PRIO_LOW
*
* This function tries to find free channel in the specified priority group
* if the priority cannot be achieved it tries to look for free channel
* in the higher and then even lower priority groups.
*
* Return value: If there is no free channel to allocate, -%ENODEV is returned.
* Zero value indicates successful channel allocation.
*/
int
imx_dma_request_by_prio(imx_dmach_t * pdma_ch, const char *name,
imx_dma_prio prio)
{
int i;
int best;
switch (prio) {
case (DMA_PRIO_HIGH):
best = 8;
break;
case (DMA_PRIO_MEDIUM):
best = 4;
break;
case (DMA_PRIO_LOW):
default:
best = 0;
break;
}
for (i = best; i < IMX_DMA_CHANNELS; i++) {
if (!imx_dma_request(i, name)) {
*pdma_ch = i;
return 0;
}
}
for (i = best - 1; i >= 0; i--) {
if (!imx_dma_request(i, name)) {
*pdma_ch = i;
return 0;
}
}
printk(KERN_ERR "%s: no free DMA channel found\n", __FUNCTION__);
return -ENODEV;
}
static irqreturn_t dma_err_handler(int irq, void *dev_id, struct pt_regs *regs)
{
int i, disr = DISR;
struct dma_channel *channel;
struct imx_dma_channel *channel;
unsigned int err_mask = DBTOSR | DRTOSR | DSESR | DBOSR;
DISR = disr;
for (i = 0; i < 11; i++) {
channel = &dma_channels[i];
for (i = 0; i < IMX_DMA_CHANNELS; i++) {
channel = &imx_dma_channels[i];
if ( (err_mask & 1<<i) && channel->name && channel->err_handler) {
if ((err_mask & 1 << i) && channel->name
&& channel->err_handler) {
channel->err_handler(i, channel->data, regs);
continue;
}
imx_dma_channels[i].sg = NULL;
if (DBTOSR & (1 << i)) {
printk(KERN_WARNING
"Burst timeout on channel %d (%s)\n",
......@@ -141,17 +504,27 @@ dma_err_handler(int irq, void *dev_id, struct pt_regs *regs)
return IRQ_HANDLED;
}
static irqreturn_t
dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
{
int i, disr = DISR;
pr_debug("imxdma: dma_irq_handler called, disr=0x%08x\n",
disr);
DISR = disr;
for (i = 0; i < 11; i++) {
for (i = 0; i < IMX_DMA_CHANNELS; i++) {
if (disr & (1 << i)) {
struct dma_channel *channel = &dma_channels[i];
if (channel->name && channel->irq_handler) {
channel->irq_handler(i, channel->data, regs);
struct imx_dma_channel *channel = &imx_dma_channels[i];
if (channel->name) {
if (imx_dma_sg_next(i, CNTR(i))) {
CCR(i) &= ~CCR_CEN;
mb();
CCR(i) |= CCR_CEN;
} else {
if (channel->irq_handler)
channel->irq_handler(i,
channel->data, regs);
}
} else {
/*
* IRQ for an unregistered DMA channel:
......@@ -165,10 +538,10 @@ dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
return IRQ_HANDLED;
}
static int __init
imx_dma_init(void)
static int __init imx_dma_init(void)
{
int ret;
int i;
/* reset DMA module */
DCR = DCR_DRST;
......@@ -189,15 +562,27 @@ imx_dma_init(void)
DCR = DCR_DEN;
/* clear all interrupts */
DISR = 0x3ff;
DISR = (1 << IMX_DMA_CHANNELS) - 1;
/* enable interrupts */
DIMR = 0;
DIMR = (1 << IMX_DMA_CHANNELS) - 1;
for (i = 0; i < IMX_DMA_CHANNELS; i++) {
imx_dma_channels[i].sg = NULL;
imx_dma_channels[i].dma_num = i;
}
return ret;
}
arch_initcall(imx_dma_init);
EXPORT_SYMBOL(imx_request_dma);
EXPORT_SYMBOL(imx_free_dma);
EXPORT_SYMBOL(imx_dma_setup_single);
EXPORT_SYMBOL(imx_dma_setup_sg);
EXPORT_SYMBOL(imx_dma_setup_handlers);
EXPORT_SYMBOL(imx_dma_enable);
EXPORT_SYMBOL(imx_dma_disable);
EXPORT_SYMBOL(imx_dma_request);
EXPORT_SYMBOL(imx_dma_free);
EXPORT_SYMBOL(imx_dma_request_by_prio);
EXPORT_SYMBOL(imx_dma_channels);
......@@ -25,6 +25,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/arch/mmc.h>
#include <linux/interrupt.h>
#include "generic.h"
......@@ -51,11 +52,28 @@ static struct platform_device *devices[] __initdata = {
&cs89x0_device,
};
#ifdef CONFIG_MMC_IMX
static int mx1ads_mmc_card_present(void)
{
/* MMC/SD Card Detect is PB 20 on MX1ADS V1.0.7 */
return (SSR(1) & (1 << 20) ? 0 : 1);
}
static struct imxmmc_platform_data mx1ads_mmc_info = {
.card_present = mx1ads_mmc_card_present,
};
#endif
static void __init
mx1ads_init(void)
{
#ifdef CONFIG_LEDS
imx_gpio_mode(GPIO_PORTA | GPIO_OUT | 2);
#endif
#ifdef CONFIG_MMC_IMX
/* SD/MMC card detect */
imx_gpio_mode(GPIO_PORTB | GPIO_GIUS | GPIO_IN | 20);
imx_set_mmc_info(&mx1ads_mmc_info);
#endif
platform_add_devices(devices, ARRAY_SIZE(devices));
}
......
......@@ -44,6 +44,15 @@
#include <asm/mach/irq.h>
#include <asm/mach/pci.h>
static int __init espresso_pci_init(void)
{
if (machine_is_espresso())
ixp23xx_pci_slave_init();
return 0;
};
subsys_initcall(espresso_pci_init);
static void __init espresso_init(void)
{
physmap_configure(0x90000000, 0x02000000, 2, NULL);
......
......@@ -201,7 +201,7 @@ int clear_master_aborts(void)
return 0;
}
void __init ixp23xx_pci_preinit(void)
static void __init ixp23xx_pci_common_init(void)
{
#ifdef __ARMEB__
*IXP23XX_PCI_CONTROL |= 0x20000; /* set I/O swapping */
......@@ -219,7 +219,18 @@ void __init ixp23xx_pci_preinit(void)
*IXP23XX_PCI_CPP_ADDR_BITS &= ~(1 << 1);
} else {
*IXP23XX_PCI_CPP_ADDR_BITS |= (1 << 1);
/*
* Enable coherency on A2 silicon.
*/
if (arch_is_coherent())
*IXP23XX_CPP2XSI_CURR_XFER_REG3 &= ~IXP23XX_CPP2XSI_COH_OFF;
}
}
void __init ixp23xx_pci_preinit(void)
{
ixp23xx_pci_common_init();
hook_fault_code(16+6, ixp23xx_pci_abort_handler, SIGBUS,
"PCI config cycle to non-existent device");
......@@ -273,3 +284,8 @@ int ixp23xx_pci_setup(int nr, struct pci_sys_data *sys)
return 1;
}
void ixp23xx_pci_slave_init(void)
{
ixp23xx_pci_common_init();
}
......@@ -69,12 +69,6 @@ config MACH_VOICEBLUE
Support for Voiceblue GSM/VoIP gateway. Say Y here if you have
such a board.
config MACH_NETSTAR
bool "NetStar"
depends on ARCH_OMAP1 && ARCH_OMAP15XX
help
Support for NetStar PBX. Say Y here if you have such a board.
config MACH_OMAP_PALMTE
bool "Palm Tungsten E"
depends on ARCH_OMAP1 && ARCH_OMAP15XX
......@@ -85,6 +79,20 @@ config MACH_OMAP_PALMTE
informations.
Say Y here if you have such a PDA, say NO otherwise.
config MACH_NOKIA770
bool "Nokia 770"
depends on ARCH_OMAP1 && ARCH_OMAP16XX
help
Support for the Nokia 770 Internet Tablet. Say Y here if you
have such a device.
config MACH_AMS_DELTA
bool "Amstrad E3 (Delta)"
depends on ARCH_OMAP1 && ARCH_OMAP15XX
help
Support for the Amstrad E3 (codename Delta) videophone. Say Y here
if you have such a device.
config MACH_OMAP_GENERIC
bool "Generic OMAP board"
depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX)
......
......@@ -3,7 +3,13 @@
#
# Common support
obj-y := io.o id.o clock.o irq.o time.o mux.o serial.o devices.o
obj-y := io.o id.o clock.o irq.o mux.o serial.o devices.o
obj-$(CONFIG_OMAP_MPU_TIMER) += time.o
# Power Management
obj-$(CONFIG_PM) += pm.o sleep.o
led-y := leds.o
# Specific board support
......@@ -14,8 +20,9 @@ obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o
obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o
obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o
obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o
obj-$(CONFIG_MACH_NETSTAR) += board-netstar.o
obj-$(CONFIG_MACH_OMAP_PALMTE) += board-palmte.o
obj-$(CONFIG_MACH_NOKIA770) += board-nokia770.o
obj-$(CONFIG_MACH_AMS_DELTA) += board-ams-delta.o
ifeq ($(CONFIG_ARCH_OMAP15XX),y)
# Innovator-1510 FPGA
......
/*
* linux/arch/arm/mach-omap1/board-ams-delta.c
*
* Modified from board-generic.c
*
* Board specific inits for the Amstrad E3 (codename Delta) videophone
*
* Copyright (C) 2006 Jonathan McDowell <noodles@earth.li>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/arch/board-ams-delta.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mux.h>
#include <asm/arch/usb.h>
#include <asm/arch/board.h>
#include <asm/arch/common.h>
static u8 ams_delta_latch1_reg;
static u16 ams_delta_latch2_reg;
void ams_delta_latch1_write(u8 mask, u8 value)
{
ams_delta_latch1_reg &= ~mask;
ams_delta_latch1_reg |= value;
*(volatile __u8 *) AMS_DELTA_LATCH1_VIRT = ams_delta_latch1_reg;
}
void ams_delta_latch2_write(u16 mask, u16 value)
{
ams_delta_latch2_reg &= ~mask;
ams_delta_latch2_reg |= value;
*(volatile __u16 *) AMS_DELTA_LATCH2_VIRT = ams_delta_latch2_reg;
}
static void __init ams_delta_init_irq(void)
{
omap1_init_common_hw();
omap_init_irq();
omap_gpio_init();
}
static struct map_desc ams_delta_io_desc[] __initdata = {
// AMS_DELTA_LATCH1
{
.virtual = AMS_DELTA_LATCH1_VIRT,
.pfn = __phys_to_pfn(AMS_DELTA_LATCH1_PHYS),
.length = 0x01000000,
.type = MT_DEVICE
},
// AMS_DELTA_LATCH2
{
.virtual = AMS_DELTA_LATCH2_VIRT,
.pfn = __phys_to_pfn(AMS_DELTA_LATCH2_PHYS),
.length = 0x01000000,
.type = MT_DEVICE
},
// AMS_DELTA_MODEM
{
.virtual = AMS_DELTA_MODEM_VIRT,
.pfn = __phys_to_pfn(AMS_DELTA_MODEM_PHYS),
.length = 0x01000000,
.type = MT_DEVICE
}
};
static struct omap_uart_config ams_delta_uart_config __initdata = {
.enabled_uarts = 1,
};
static struct omap_board_config_kernel ams_delta_config[] = {
{ OMAP_TAG_UART, &ams_delta_uart_config },
};
static void __init ams_delta_init(void)
{
iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
omap_board_config = ams_delta_config;
omap_board_config_size = ARRAY_SIZE(ams_delta_config);
omap_serial_init();
/* Clear latch2 (NAND, LCD, modem enable) */
ams_delta_latch2_write(~0, 0);
}
static void __init ams_delta_map_io(void)
{
omap1_map_common_io();
}
MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
/* Maintainer: Jonathan McDowell <noodles@earth.li> */
.phys_io = 0xfff00000,
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
.map_io = ams_delta_map_io,
.init_irq = ams_delta_init_irq,
.init_machine = ams_delta_init,
.timer = &omap_timer,
MACHINE_END
EXPORT_SYMBOL(ams_delta_latch1_write);
EXPORT_SYMBOL(ams_delta_latch2_write);
......@@ -88,7 +88,7 @@ static struct omap_board_config_kernel generic_config[] = {
static void __init omap_generic_init(void)
{
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap1510()) {
if (cpu_is_omap15xx()) {
generic_config[0].data = &generic1510_usb_config;
}
#endif
......
......@@ -24,7 +24,9 @@
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
......@@ -35,12 +37,55 @@
#include <asm/arch/gpio.h>
#include <asm/arch/mux.h>
#include <asm/arch/tc.h>
#include <asm/arch/irda.h>
#include <asm/arch/usb.h>
#include <asm/arch/keypad.h>
#include <asm/arch/common.h>
#include <asm/arch/mcbsp.h>
#include <asm/arch/omap-alsa.h>
extern int omap_gpio_init(void);
static struct mtd_partition h2_partitions[] = {
static int h2_keymap[] = {
KEY(0, 0, KEY_LEFT),
KEY(0, 1, KEY_RIGHT),
KEY(0, 2, KEY_3),
KEY(0, 3, KEY_F10),
KEY(0, 4, KEY_F5),
KEY(0, 5, KEY_9),
KEY(1, 0, KEY_DOWN),
KEY(1, 1, KEY_UP),
KEY(1, 2, KEY_2),
KEY(1, 3, KEY_F9),
KEY(1, 4, KEY_F7),
KEY(1, 5, KEY_0),
KEY(2, 0, KEY_ENTER),
KEY(2, 1, KEY_6),
KEY(2, 2, KEY_1),
KEY(2, 3, KEY_F2),
KEY(2, 4, KEY_F6),
KEY(2, 5, KEY_HOME),
KEY(3, 0, KEY_8),
KEY(3, 1, KEY_5),
KEY(3, 2, KEY_F12),
KEY(3, 3, KEY_F3),
KEY(3, 4, KEY_F8),
KEY(3, 5, KEY_END),
KEY(4, 0, KEY_7),
KEY(4, 1, KEY_4),
KEY(4, 2, KEY_F11),
KEY(4, 3, KEY_F1),
KEY(4, 4, KEY_F4),
KEY(4, 5, KEY_ESC),
KEY(5, 0, KEY_F13),
KEY(5, 1, KEY_F14),
KEY(5, 2, KEY_F15),
KEY(5, 3, KEY_F16),
KEY(5, 4, KEY_SLEEP),
0
};
static struct mtd_partition h2_nor_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */
{
.name = "bootloader",
......@@ -71,26 +116,26 @@ static struct mtd_partition h2_partitions[] = {
}
};
static struct flash_platform_data h2_flash_data = {
static struct flash_platform_data h2_nor_data = {
.map_name = "cfi_probe",
.width = 2,
.parts = h2_partitions,
.nr_parts = ARRAY_SIZE(h2_partitions),
.parts = h2_nor_partitions,
.nr_parts = ARRAY_SIZE(h2_nor_partitions),
};
static struct resource h2_flash_resource = {
static struct resource h2_nor_resource = {
/* This is on CS3, wherever it's mapped */
.flags = IORESOURCE_MEM,
};
static struct platform_device h2_flash_device = {
static struct platform_device h2_nor_device = {
.name = "omapflash",
.id = 0,
.dev = {
.platform_data = &h2_flash_data,
.platform_data = &h2_nor_data,
},
.num_resources = 1,
.resource = &h2_flash_resource,
.resource = &h2_nor_resource,
};
static struct resource h2_smc91x_resources[] = {
......@@ -113,9 +158,119 @@ static struct platform_device h2_smc91x_device = {
.resource = h2_smc91x_resources,
};
static struct resource h2_kp_resources[] = {
[0] = {
.start = INT_KEYBOARD,
.end = INT_KEYBOARD,
.flags = IORESOURCE_IRQ,
},
};
static struct omap_kp_platform_data h2_kp_data = {
.rows = 8,
.cols = 8,
.keymap = h2_keymap,
.rep = 1,
};
static struct platform_device h2_kp_device = {
.name = "omap-keypad",
.id = -1,
.dev = {
.platform_data = &h2_kp_data,
},
.num_resources = ARRAY_SIZE(h2_kp_resources),
.resource = h2_kp_resources,
};
#define H2_IRDA_FIRSEL_GPIO_PIN 17
#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
static int h2_transceiver_mode(struct device *dev, int state)
{
if (state & IR_SIRMODE)
omap_set_gpio_dataout(H2_IRDA_FIRSEL_GPIO_PIN, 0);
else /* MIR/FIR */
omap_set_gpio_dataout(H2_IRDA_FIRSEL_GPIO_PIN, 1);
return 0;
}
#endif
static struct omap_irda_config h2_irda_data = {
.transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
.rx_channel = OMAP_DMA_UART3_RX,
.tx_channel = OMAP_DMA_UART3_TX,
.dest_start = UART3_THR,
.src_start = UART3_RHR,
.tx_trigger = 0,
.rx_trigger = 0,
};
static struct resource h2_irda_resources[] = {
[0] = {
.start = INT_UART3,
.end = INT_UART3,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device h2_irda_device = {
.name = "omapirda",
.id = 0,
.dev = {
.platform_data = &h2_irda_data,
},
.num_resources = ARRAY_SIZE(h2_irda_resources),
.resource = h2_irda_resources,
};
static struct platform_device h2_lcd_device = {
.name = "lcd_h2",
.id = -1,
};
static struct omap_mcbsp_reg_cfg mcbsp_regs = {
.spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
.spcr1 = RINTM(3) | RRST,
.rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
.rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
.xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
.xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
.srgr1 = FWID(15),
.srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
.pcr0 = CLKXM | CLKRM | FSXP | FSRP | CLKXP | CLKRP,
//.pcr0 = CLKXP | CLKRP, /* mcbsp: slave */
};
static struct omap_alsa_codec_config alsa_config = {
.name = "H2 TSC2101",
.mcbsp_regs_alsa = &mcbsp_regs,
.codec_configure_dev = NULL, // tsc2101_configure,
.codec_set_samplerate = NULL, // tsc2101_set_samplerate,
.codec_clock_setup = NULL, // tsc2101_clock_setup,
.codec_clock_on = NULL, // tsc2101_clock_on,
.codec_clock_off = NULL, // tsc2101_clock_off,
.get_default_samplerate = NULL, // tsc2101_get_default_samplerate,
};
static struct platform_device h2_mcbsp1_device = {
.name = "omap_alsa_mcbsp",
.id = 1,
.dev = {
.platform_data = &alsa_config,
},
};
static struct platform_device *h2_devices[] __initdata = {
&h2_flash_device,
&h2_nor_device,
&h2_smc91x_device,
&h2_irda_device,
&h2_kp_device,
&h2_lcd_device,
&h2_mcbsp1_device,
};
static void __init h2_init_smc91x(void)
......@@ -164,7 +319,6 @@ static struct omap_uart_config h2_uart_config __initdata = {
};
static struct omap_lcd_config h2_lcd_config __initdata = {
.panel_name = "h2",
.ctrl_name = "internal",
};
......@@ -177,16 +331,34 @@ static struct omap_board_config_kernel h2_config[] = {
static void __init h2_init(void)
{
/* NOTE: revC boards support NAND-boot, which can put NOR on CS2B
* and NAND (either 16bit or 8bit) on CS3.
/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
* to address 0 by a dip switch), NAND on CS2B. The NAND driver will
* notice whether a NAND chip is enabled at probe time.
*
* FIXME revC boards (and H3) support NAND-boot, with a dip switch to
* put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try
* detecting that in code here, to avoid probing every possible flash
* configuration...
*/
h2_flash_resource.end = h2_flash_resource.start = omap_cs3_phys();
h2_flash_resource.end += SZ_32M - 1;
h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
h2_nor_resource.end += SZ_32M - 1;
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
/* MMC: card detect and WP */
// omap_cfg_reg(U19_ARMIO1); /* CD */
omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */
/* Irda */
#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A);
if (!(omap_request_gpio(H2_IRDA_FIRSEL_GPIO_PIN))) {
omap_set_gpio_direction(H2_IRDA_FIRSEL_GPIO_PIN, 0);
h2_irda_data.transceiver_mode = h2_transceiver_mode;
}
#endif
platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
omap_board_config = h2_config;
omap_board_config_size = ARRAY_SIZE(h2_config);
......
......@@ -21,8 +21,11 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/workqueue.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <asm/setup.h>
#include <asm/page.h>
......@@ -33,15 +36,59 @@
#include <asm/mach/map.h>
#include <asm/arch/gpio.h>
#include <asm/arch/gpioexpander.h>
#include <asm/arch/irqs.h>
#include <asm/arch/mux.h>
#include <asm/arch/tc.h>
#include <asm/arch/irda.h>
#include <asm/arch/usb.h>
#include <asm/arch/keypad.h>
#include <asm/arch/dma.h>
#include <asm/arch/common.h>
extern int omap_gpio_init(void);
static struct mtd_partition h3_partitions[] = {
static int h3_keymap[] = {
KEY(0, 0, KEY_LEFT),
KEY(0, 1, KEY_RIGHT),
KEY(0, 2, KEY_3),
KEY(0, 3, KEY_F10),
KEY(0, 4, KEY_F5),
KEY(0, 5, KEY_9),
KEY(1, 0, KEY_DOWN),
KEY(1, 1, KEY_UP),
KEY(1, 2, KEY_2),
KEY(1, 3, KEY_F9),
KEY(1, 4, KEY_F7),
KEY(1, 5, KEY_0),
KEY(2, 0, KEY_ENTER),
KEY(2, 1, KEY_6),
KEY(2, 2, KEY_1),
KEY(2, 3, KEY_F2),
KEY(2, 4, KEY_F6),
KEY(2, 5, KEY_HOME),
KEY(3, 0, KEY_8),
KEY(3, 1, KEY_5),
KEY(3, 2, KEY_F12),
KEY(3, 3, KEY_F3),
KEY(3, 4, KEY_F8),
KEY(3, 5, KEY_END),
KEY(4, 0, KEY_7),
KEY(4, 1, KEY_4),
KEY(4, 2, KEY_F11),
KEY(4, 3, KEY_F1),
KEY(4, 4, KEY_F4),
KEY(4, 5, KEY_ESC),
KEY(5, 0, KEY_F13),
KEY(5, 1, KEY_F14),
KEY(5, 2, KEY_F15),
KEY(5, 3, KEY_F16),
KEY(5, 4, KEY_SLEEP),
0
};
static struct mtd_partition nor_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */
{
.name = "bootloader",
......@@ -72,26 +119,80 @@ static struct mtd_partition h3_partitions[] = {
}
};
static struct flash_platform_data h3_flash_data = {
static struct flash_platform_data nor_data = {
.map_name = "cfi_probe",
.width = 2,
.parts = h3_partitions,
.nr_parts = ARRAY_SIZE(h3_partitions),
.parts = nor_partitions,
.nr_parts = ARRAY_SIZE(nor_partitions),
};
static struct resource h3_flash_resource = {
static struct resource nor_resource = {
/* This is on CS3, wherever it's mapped */
.flags = IORESOURCE_MEM,
};
static struct platform_device flash_device = {
static struct platform_device nor_device = {
.name = "omapflash",
.id = 0,
.dev = {
.platform_data = &h3_flash_data,
.platform_data = &nor_data,
},
.num_resources = 1,
.resource = &nor_resource,
};
static struct mtd_partition nand_partitions[] = {
#if 0
/* REVISIT: enable these partitions if you make NAND BOOT work */
{
.name = "xloader",
.offset = 0,
.size = 64 * 1024,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
{
.name = "bootloader",
.offset = MTDPART_OFS_APPEND,
.size = 256 * 1024,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
{
.name = "params",
.offset = MTDPART_OFS_APPEND,
.size = 192 * 1024,
},
{
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = 2 * SZ_1M,
},
#endif
{
.name = "filesystem",
.size = MTDPART_SIZ_FULL,
.offset = MTDPART_OFS_APPEND,
},
};
/* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
static struct nand_platform_data nand_data = {
.options = NAND_SAMSUNG_LP_OPTIONS,
.parts = nand_partitions,
.nr_parts = ARRAY_SIZE(nand_partitions),
};
static struct resource nand_resource = {
.flags = IORESOURCE_MEM,
};
static struct platform_device nand_device = {
.name = "omapnand",
.id = 0,
.dev = {
.platform_data = &nand_data,
},
.num_resources = 1,
.resource = &h3_flash_resource,
.resource = &nand_resource,
};
static struct resource smc91x_resources[] = {
......@@ -138,10 +239,136 @@ static struct platform_device intlat_device = {
.resource = intlat_resources,
};
static struct resource h3_kp_resources[] = {
[0] = {
.start = INT_KEYBOARD,
.end = INT_KEYBOARD,
.flags = IORESOURCE_IRQ,
},
};
static struct omap_kp_platform_data h3_kp_data = {
.rows = 8,
.cols = 8,
.keymap = h3_keymap,
.rep = 1,
};
static struct platform_device h3_kp_device = {
.name = "omap-keypad",
.id = -1,
.dev = {
.platform_data = &h3_kp_data,
},
.num_resources = ARRAY_SIZE(h3_kp_resources),
.resource = h3_kp_resources,
};
/* Select between the IrDA and aGPS module
*/
static int h3_select_irda(struct device *dev, int state)
{
unsigned char expa;
int err = 0;
if ((err = read_gpio_expa(&expa, 0x26))) {
printk(KERN_ERR "Error reading from I/O EXPANDER \n");
return err;
}
/* 'P6' enable/disable IRDA_TX and IRDA_RX */
if (state & IR_SEL) { /* IrDA */
if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
printk(KERN_ERR "Error writing to I/O EXPANDER \n");
return err;
}
} else {
if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
printk(KERN_ERR "Error writing to I/O EXPANDER \n");
return err;
}
}
return err;
}
static void set_trans_mode(void *data)
{
int *mode = data;
unsigned char expa;
int err = 0;
if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
printk(KERN_ERR "Error reading from I/O expander\n");
}
expa &= ~0x03;
if (*mode & IR_SIRMODE) {
expa |= 0x01;
} else { /* MIR/FIR */
expa |= 0x03;
}
if ((err = write_gpio_expa(expa, 0x27)) != 0) {
printk(KERN_ERR "Error writing to I/O expander\n");
}
}
static int h3_transceiver_mode(struct device *dev, int mode)
{
struct omap_irda_config *irda_config = dev->platform_data;
cancel_delayed_work(&irda_config->gpio_expa);
PREPARE_WORK(&irda_config->gpio_expa, set_trans_mode, &mode);
schedule_work(&irda_config->gpio_expa);
return 0;
}
static struct omap_irda_config h3_irda_data = {
.transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
.transceiver_mode = h3_transceiver_mode,
.select_irda = h3_select_irda,
.rx_channel = OMAP_DMA_UART3_RX,
.tx_channel = OMAP_DMA_UART3_TX,
.dest_start = UART3_THR,
.src_start = UART3_RHR,
.tx_trigger = 0,
.rx_trigger = 0,
};
static struct resource h3_irda_resources[] = {
[0] = {
.start = INT_UART3,
.end = INT_UART3,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device h3_irda_device = {
.name = "omapirda",
.id = 0,
.dev = {
.platform_data = &h3_irda_data,
},
.num_resources = ARRAY_SIZE(h3_irda_resources),
.resource = h3_irda_resources,
};
static struct platform_device h3_lcd_device = {
.name = "lcd_h3",
.id = -1,
};
static struct platform_device *devices[] __initdata = {
&flash_device,
&nor_device,
&nand_device,
&smc91x_device,
&intlat_device,
&h3_irda_device,
&h3_kp_device,
&h3_lcd_device,
};
static struct omap_usb_config h3_usb_config __initdata = {
......@@ -171,7 +398,6 @@ static struct omap_uart_config h3_uart_config __initdata = {
};
static struct omap_lcd_config h3_lcd_config __initdata = {
.panel_name = "h3",
.ctrl_name = "internal",
};
......@@ -182,11 +408,36 @@ static struct omap_board_config_kernel h3_config[] = {
{ OMAP_TAG_LCD, &h3_lcd_config },
};
#define H3_NAND_RB_GPIO_PIN 10
static int nand_dev_ready(struct nand_platform_data *data)
{
return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
}
static void __init h3_init(void)
{
h3_flash_resource.end = h3_flash_resource.start = omap_cs3_phys();
h3_flash_resource.end += OMAP_CS3_SIZE - 1;
(void) platform_add_devices(devices, ARRAY_SIZE(devices));
/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
* to address 0 by a dip switch), NAND on CS2B. The NAND driver will
* notice whether a NAND chip is enabled at probe time.
*
* H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
* (which on H2 may be 16bit) on CS3. Try detecting that in code here,
* to avoid probing every possible flash configuration...
*/
nor_resource.end = nor_resource.start = omap_cs3_phys();
nor_resource.end += SZ_32M - 1;
nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
nand_resource.end += SZ_4K - 1;
if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
nand_data.dev_ready = nand_dev_ready;
/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
omap_cfg_reg(V2_1710_GPIO10);
platform_add_devices(devices, ARRAY_SIZE(devices));
omap_board_config = h3_config;
omap_board_config_size = ARRAY_SIZE(h3_config);
omap_serial_init();
......
......@@ -22,6 +22,7 @@
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
......@@ -34,8 +35,22 @@
#include <asm/arch/gpio.h>
#include <asm/arch/tc.h>
#include <asm/arch/usb.h>
#include <asm/arch/keypad.h>
#include <asm/arch/common.h>
static int innovator_keymap[] = {
KEY(0, 0, KEY_F1),
KEY(0, 3, KEY_DOWN),
KEY(1, 1, KEY_F2),
KEY(1, 2, KEY_RIGHT),
KEY(2, 0, KEY_F3),
KEY(2, 1, KEY_F4),
KEY(2, 2, KEY_UP),
KEY(3, 2, KEY_ENTER),
KEY(3, 3, KEY_LEFT),
0
};
static struct mtd_partition innovator_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */
{
......@@ -97,6 +112,31 @@ static struct platform_device innovator_flash_device = {
.resource = &innovator_flash_resource,
};
static struct resource innovator_kp_resources[] = {
[0] = {
.start = INT_KEYBOARD,
.end = INT_KEYBOARD,
.flags = IORESOURCE_IRQ,
},
};
static struct omap_kp_platform_data innovator_kp_data = {
.rows = 8,
.cols = 8,
.keymap = innovator_keymap,
};
static struct platform_device innovator_kp_device = {
.name = "omap-keypad",
.id = -1,
.dev = {
.platform_data = &innovator_kp_data,
},
.num_resources = ARRAY_SIZE(innovator_kp_resources),
.resource = innovator_kp_resources,
};
#ifdef CONFIG_ARCH_OMAP15XX
/* Only FPGA needs to be mapped here. All others are done with ioremap */
......@@ -129,9 +169,16 @@ static struct platform_device innovator1510_smc91x_device = {
.resource = innovator1510_smc91x_resources,
};
static struct platform_device innovator1510_lcd_device = {
.name = "lcd_inn1510",
.id = -1,
};
static struct platform_device *innovator1510_devices[] __initdata = {
&innovator_flash_device,
&innovator1510_smc91x_device,
&innovator_kp_device,
&innovator1510_lcd_device,
};
#endif /* CONFIG_ARCH_OMAP15XX */
......@@ -158,9 +205,16 @@ static struct platform_device innovator1610_smc91x_device = {
.resource = innovator1610_smc91x_resources,
};
static struct platform_device innovator1610_lcd_device = {
.name = "inn1610_lcd",
.id = -1,
};
static struct platform_device *innovator1610_devices[] __initdata = {
&innovator_flash_device,
&innovator1610_smc91x_device,
&innovator_kp_device,
&innovator1610_lcd_device,
};
#endif /* CONFIG_ARCH_OMAP16XX */
......@@ -206,7 +260,6 @@ static struct omap_usb_config innovator1510_usb_config __initdata = {
};
static struct omap_lcd_config innovator1510_lcd_config __initdata = {
.panel_name = "inn1510",
.ctrl_name = "internal",
};
#endif
......@@ -228,7 +281,6 @@ static struct omap_usb_config h2_usb_config __initdata = {
};
static struct omap_lcd_config innovator1610_lcd_config __initdata = {
.panel_name = "inn1610",
.ctrl_name = "internal",
};
#endif
......
/*
* Modified from board-generic.c
*
* Copyright (C) 2004 2N Telekomunikace, Ladislav Michl <michl@2n.cz>
*
* Code for Netstar OMAP board.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/notifier.h>
#include <linux/reboot.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mux.h>
#include <asm/arch/usb.h>
#include <asm/arch/common.h>
extern void __init omap_init_time(void);
extern int omap_gpio_init(void);
static struct resource netstar_smc91x_resources[] = {
[0] = {
.start = OMAP_CS1_PHYS + 0x300,
.end = OMAP_CS1_PHYS + 0x300 + 16,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = OMAP_GPIO_IRQ(8),
.end = OMAP_GPIO_IRQ(8),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device netstar_smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(netstar_smc91x_resources),
.resource = netstar_smc91x_resources,
};
static struct platform_device *netstar_devices[] __initdata = {
&netstar_smc91x_device,
};
static struct omap_uart_config netstar_uart_config __initdata = {
.enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
};
static struct omap_board_config_kernel netstar_config[] = {
{ OMAP_TAG_UART, &netstar_uart_config },
};
static void __init netstar_init_irq(void)
{
omap1_init_common_hw();
omap_init_irq();
omap_gpio_init();
}
static void __init netstar_init(void)
{
/* green LED */
omap_request_gpio(4);
omap_set_gpio_direction(4, 0);
/* smc91x reset */
omap_request_gpio(7);
omap_set_gpio_direction(7, 0);
omap_set_gpio_dataout(7, 1);
udelay(2); /* wait at least 100ns */
omap_set_gpio_dataout(7, 0);
mdelay(50); /* 50ms until PHY ready */
/* smc91x interrupt pin */
omap_request_gpio(8);
omap_request_gpio(12);
omap_request_gpio(13);
omap_request_gpio(14);
omap_request_gpio(15);
set_irq_type(OMAP_GPIO_IRQ(12), IRQT_FALLING);
set_irq_type(OMAP_GPIO_IRQ(13), IRQT_FALLING);
set_irq_type(OMAP_GPIO_IRQ(14), IRQT_FALLING);
set_irq_type(OMAP_GPIO_IRQ(15), IRQT_FALLING);
platform_add_devices(netstar_devices, ARRAY_SIZE(netstar_devices));
/* Switch on green LED */
omap_set_gpio_dataout(4, 0);
/* Switch off red LED */
omap_writeb(0x00, OMAP_LPG1_PMR); /* Disable clock */
omap_writeb(0x80, OMAP_LPG1_LCR);
omap_board_config = netstar_config;
omap_board_config_size = ARRAY_SIZE(netstar_config);
omap_serial_init();
}
static void __init netstar_map_io(void)
{
omap1_map_common_io();
}
#define MACHINE_PANICED 1
#define MACHINE_REBOOTING 2
#define MACHINE_REBOOT 4
static unsigned long machine_state;
static int panic_event(struct notifier_block *this, unsigned long event,
void *ptr)
{
if (test_and_set_bit(MACHINE_PANICED, &machine_state))
return NOTIFY_DONE;
/* Switch off green LED */
omap_set_gpio_dataout(4, 1);
/* Flash red LED */
omap_writeb(0x78, OMAP_LPG1_LCR);
omap_writeb(0x01, OMAP_LPG1_PMR); /* Enable clock */
return NOTIFY_DONE;
}
static struct notifier_block panic_block = {
.notifier_call = panic_event,
};
static int __init netstar_late_init(void)
{
/* TODO: Setup front panel switch here */
/* Setup panic notifier */
atomic_notifier_chain_register(&panic_notifier_list, &panic_block);
return 0;
}
postcore_initcall(netstar_late_init);
MACHINE_START(NETSTAR, "NetStar OMAP5910")
/* Maintainer: Ladislav Michl <michl@2n.cz> */
.phys_io = 0xfff00000,
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
.map_io = netstar_map_io,
.init_irq = netstar_init_irq,
.init_machine = netstar_init,
.timer = &omap_timer,
MACHINE_END
/*
* linux/arch/arm/mach-omap1/board-nokia770.c
*
* Modified from board-generic.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/input.h>
#include <linux/clk.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mux.h>
#include <asm/arch/usb.h>
#include <asm/arch/board.h>
#include <asm/arch/keypad.h>
#include <asm/arch/common.h>
#include <asm/arch/dsp_common.h>
#include <asm/arch/aic23.h>
#include <asm/arch/gpio.h>
static void __init omap_nokia770_init_irq(void)
{
/* On Nokia 770, the SleepX signal is masked with an
* MPUIO line by default. It has to be unmasked for it
* to become functional */
/* SleepX mask direction */
omap_writew((omap_readw(0xfffb5008) & ~2), 0xfffb5008);
/* Unmask SleepX signal */
omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004);
omap1_init_common_hw();
omap_init_irq();
}
static int nokia770_keymap[] = {
KEY(0, 1, GROUP_0 | KEY_UP),
KEY(0, 2, GROUP_1 | KEY_F5),
KEY(1, 0, GROUP_0 | KEY_LEFT),
KEY(1, 1, GROUP_0 | KEY_ENTER),
KEY(1, 2, GROUP_0 | KEY_RIGHT),
KEY(2, 0, GROUP_1 | KEY_ESC),
KEY(2, 1, GROUP_0 | KEY_DOWN),
KEY(2, 2, GROUP_1 | KEY_F4),
KEY(3, 0, GROUP_2 | KEY_F7),
KEY(3, 1, GROUP_2 | KEY_F8),
KEY(3, 2, GROUP_2 | KEY_F6),
0
};
static struct resource nokia770_kp_resources[] = {
[0] = {
.start = INT_KEYBOARD,
.end = INT_KEYBOARD,
.flags = IORESOURCE_IRQ,
},
};
static struct omap_kp_platform_data nokia770_kp_data = {
.rows = 8,
.cols = 8,
.keymap = nokia770_keymap
};
static struct platform_device nokia770_kp_device = {
.name = "omap-keypad",
.id = -1,
.dev = {
.platform_data = &nokia770_kp_data,
},
.num_resources = ARRAY_SIZE(nokia770_kp_resources),
.resource = nokia770_kp_resources,
};
static struct platform_device *nokia770_devices[] __initdata = {
&nokia770_kp_device,
};
static struct ads7846_platform_data nokia770_ads7846_platform_data __initdata = {
.x_max = 0x0fff,
.y_max = 0x0fff,
.x_plate_ohms = 180,
.pressure_max = 255,
.debounce_max = 10,
.debounce_tol = 3,
};
static struct spi_board_info nokia770_spi_board_info[] __initdata = {
[0] = {
.modalias = "lcd_lph8923",
.bus_num = 2,
.chip_select = 3,
.max_speed_hz = 12000000,
},
[1] = {
.modalias = "ads7846",
.bus_num = 2,
.chip_select = 0,
.max_speed_hz = 2500000,
.irq = OMAP_GPIO_IRQ(15),
.platform_data = &nokia770_ads7846_platform_data,
},
};
/* assume no Mini-AB port */
static struct omap_usb_config nokia770_usb_config __initdata = {
.otg = 1,
.register_host = 1,
.register_dev = 1,
.hmc_mode = 16,
.pins[0] = 6,
};
static struct omap_mmc_config nokia770_mmc_config __initdata = {
.mmc[0] = {
.enabled = 0,
.wire4 = 0,
.wp_pin = -1,
.power_pin = -1,
.switch_pin = -1,
},
.mmc[1] = {
.enabled = 0,
.wire4 = 0,
.wp_pin = -1,
.power_pin = -1,
.switch_pin = -1,
},
};
static struct omap_board_config_kernel nokia770_config[] = {
{ OMAP_TAG_USB, NULL },
{ OMAP_TAG_MMC, &nokia770_mmc_config },
};
/*
* audio power control
*/
#define HEADPHONE_GPIO 14
#define AMPLIFIER_CTRL_GPIO 58
static struct clk *dspxor_ck;
static DECLARE_MUTEX(audio_pwr_sem);
/*
* audio_pwr_state
* +--+-------------------------+---------------------------------------+
* |-1|down |power-up request -> 0 |
* +--+-------------------------+---------------------------------------+
* | 0|up |power-down(1) request -> 1 |
* | | |power-down(2) request -> (ignore) |
* +--+-------------------------+---------------------------------------+
* | 1|up, |power-up request -> 0 |
* | |received down(1) request |power-down(2) request -> -1 |
* +--+-------------------------+---------------------------------------+
*/
static int audio_pwr_state = -1;
/*
* audio_pwr_up / down should be called under audio_pwr_sem
*/
static void nokia770_audio_pwr_up(void)
{
clk_enable(dspxor_ck);
/* Turn on codec */
tlv320aic23_power_up();
if (omap_get_gpio_datain(HEADPHONE_GPIO))
/* HP not connected, turn on amplifier */
omap_set_gpio_dataout(AMPLIFIER_CTRL_GPIO, 1);
else
/* HP connected, do not turn on amplifier */
printk("HP connected\n");
}
static void codec_delayed_power_down(void *arg)
{
down(&audio_pwr_sem);
if (audio_pwr_state == -1)
tlv320aic23_power_down();
clk_disable(dspxor_ck);
up(&audio_pwr_sem);
}
static DECLARE_WORK(codec_power_down_work, codec_delayed_power_down, NULL);
static void nokia770_audio_pwr_down(void)
{
/* Turn off amplifier */
omap_set_gpio_dataout(AMPLIFIER_CTRL_GPIO, 0);
/* Turn off codec: schedule delayed work */
schedule_delayed_work(&codec_power_down_work, HZ / 20); /* 50ms */
}
void nokia770_audio_pwr_up_request(int stage)
{
down(&audio_pwr_sem);
if (audio_pwr_state == -1)
nokia770_audio_pwr_up();
/* force audio_pwr_state = 0, even if it was 1. */
audio_pwr_state = 0;
up(&audio_pwr_sem);
}
void nokia770_audio_pwr_down_request(int stage)
{
down(&audio_pwr_sem);
switch (stage) {
case 1:
if (audio_pwr_state == 0)
audio_pwr_state = 1;
break;
case 2:
if (audio_pwr_state == 1) {
nokia770_audio_pwr_down();
audio_pwr_state = -1;
}
break;
}
up(&audio_pwr_sem);
}
static void __init omap_nokia770_init(void)
{
nokia770_config[0].data = &nokia770_usb_config;
platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices));
spi_register_board_info(nokia770_spi_board_info,
ARRAY_SIZE(nokia770_spi_board_info));
omap_board_config = nokia770_config;
omap_board_config_size = ARRAY_SIZE(nokia770_config);
omap_serial_init();
omap_dsp_audio_pwr_up_request = nokia770_audio_pwr_up_request;
omap_dsp_audio_pwr_down_request = nokia770_audio_pwr_down_request;
dspxor_ck = clk_get(0, "dspxor_ck");
}
static void __init omap_nokia770_map_io(void)
{
omap1_map_common_io();
}
MACHINE_START(NOKIA770, "Nokia 770")
.phys_io = 0xfff00000,
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
.map_io = omap_nokia770_map_io,
.init_irq = omap_nokia770_init_irq,
.init_machine = omap_nokia770_init,
.timer = &omap_timer,
MACHINE_END
......@@ -33,6 +33,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
......@@ -44,7 +45,24 @@
#include <asm/arch/usb.h>
#include <asm/arch/mux.h>
#include <asm/arch/tc.h>
#include <asm/arch/keypad.h>
#include <asm/arch/common.h>
#include <asm/arch/mcbsp.h>
#include <asm/arch/omap-alsa.h>
static int osk_keymap[] = {
KEY(0, 0, KEY_F1),
KEY(0, 3, KEY_UP),
KEY(1, 1, KEY_LEFTCTRL),
KEY(1, 2, KEY_LEFT),
KEY(2, 0, KEY_SPACE),
KEY(2, 1, KEY_ESC),
KEY(2, 2, KEY_DOWN),
KEY(3, 2, KEY_ENTER),
KEY(3, 3, KEY_RIGHT),
0
};
static struct mtd_partition osk_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */
......@@ -133,9 +151,69 @@ static struct platform_device osk5912_cf_device = {
.resource = osk5912_cf_resources,
};
#define DEFAULT_BITPERSAMPLE 16
static struct omap_mcbsp_reg_cfg mcbsp_regs = {
.spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
.spcr1 = RINTM(3) | RRST,
.rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0),
.rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
.xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG,
.xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
.srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1),
.srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1),
/*.pcr0 = FSXM | FSRM | CLKXM | CLKRM | CLKXP | CLKRP,*/ /* mcbsp: master */
.pcr0 = CLKXP | CLKRP, /* mcbsp: slave */
};
static struct omap_alsa_codec_config alsa_config = {
.name = "OSK AIC23",
.mcbsp_regs_alsa = &mcbsp_regs,
.codec_configure_dev = NULL, // aic23_configure,
.codec_set_samplerate = NULL, // aic23_set_samplerate,
.codec_clock_setup = NULL, // aic23_clock_setup,
.codec_clock_on = NULL, // aic23_clock_on,
.codec_clock_off = NULL, // aic23_clock_off,
.get_default_samplerate = NULL, // aic23_get_default_samplerate,
};
static struct platform_device osk5912_mcbsp1_device = {
.name = "omap_mcbsp",
.id = 1,
.name = "omap_alsa_mcbsp",
.id = 1,
.dev = {
.platform_data = &alsa_config,
},
};
static struct resource osk5912_kp_resources[] = {
[0] = {
.start = INT_KEYBOARD,
.end = INT_KEYBOARD,
.flags = IORESOURCE_IRQ,
},
};
static struct omap_kp_platform_data osk_kp_data = {
.rows = 8,
.cols = 8,
.keymap = osk_keymap,
};
static struct platform_device osk5912_kp_device = {
.name = "omap-keypad",
.id = -1,
.dev = {
.platform_data = &osk_kp_data,
},
.num_resources = ARRAY_SIZE(osk5912_kp_resources),
.resource = osk5912_kp_resources,
};
static struct platform_device osk5912_lcd_device = {
.name = "lcd_osk",
.id = -1,
};
static struct platform_device *osk5912_devices[] __initdata = {
......@@ -143,6 +221,8 @@ static struct platform_device *osk5912_devices[] __initdata = {
&osk5912_smc91x_device,
&osk5912_cf_device,
&osk5912_mcbsp1_device,
&osk5912_kp_device,
&osk5912_lcd_device,
};
static void __init osk_init_smc91x(void)
......@@ -197,7 +277,6 @@ static struct omap_uart_config osk_uart_config __initdata = {
};
static struct omap_lcd_config osk_lcd_config __initdata = {
.panel_name = "osk",
.ctrl_name = "internal",
};
......@@ -255,8 +334,18 @@ static void __init osk_mistral_init(void)
static void __init osk_mistral_init(void) { }
#endif
#define EMIFS_CS3_VAL (0x88013141)
static void __init osk_init(void)
{
/* Workaround for wrong CS3 (NOR flash) timing
* There are some U-Boot versions out there which configure
* wrong CS3 memory timings. This mainly leads to CRC
* or similiar errors if you use NOR flash (e.g. with JFFS2)
*/
if (EMIFS_CCS(3) != EMIFS_CS3_VAL)
EMIFS_CCS(3) = EMIFS_CS3_VAL;
osk_flash_resource.end = osk_flash_resource.start = omap_cs3_phys();
osk_flash_resource.end += SZ_32M - 1;
platform_add_devices(osk5912_devices, ARRAY_SIZE(osk5912_devices));
......
......@@ -38,6 +38,15 @@ static void __init omap_generic_init_irq(void)
omap_init_irq();
}
static struct platform_device palmte_lcd_device = {
.name = "lcd_palmte",
.id = -1,
};
static struct platform_device *devices[] __initdata = {
&palmte_lcd_device,
};
static struct omap_usb_config palmte_usb_config __initdata = {
.register_dev = 1,
.hmc_mode = 0,
......@@ -55,7 +64,6 @@ static struct omap_mmc_config palmte_mmc_config __initdata = {
};
static struct omap_lcd_config palmte_lcd_config __initdata = {
.panel_name = "palmte",
.ctrl_name = "internal",
};
......@@ -69,6 +77,8 @@ static void __init omap_generic_init(void)
{
omap_board_config = palmte_config;
omap_board_config_size = ARRAY_SIZE(palmte_config);
platform_add_devices(devices, ARRAY_SIZE(devices));
}
static void __init omap_generic_map_io(void)
......
......@@ -16,7 +16,9 @@
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
......@@ -28,9 +30,44 @@
#include <asm/arch/gpio.h>
#include <asm/arch/mux.h>
#include <asm/arch/fpga.h>
#include <asm/arch/keypad.h>
#include <asm/arch/common.h>
#include <asm/arch/board.h>
static int p2_keymap[] = {
KEY(0,0,KEY_UP),
KEY(0,1,KEY_RIGHT),
KEY(0,2,KEY_LEFT),
KEY(0,3,KEY_DOWN),
KEY(0,4,KEY_CENTER),
KEY(0,5,KEY_0_5),
KEY(1,0,KEY_SOFT2),
KEY(1,1,KEY_SEND),
KEY(1,2,KEY_END),
KEY(1,3,KEY_VOLUMEDOWN),
KEY(1,4,KEY_VOLUMEUP),
KEY(1,5,KEY_RECORD),
KEY(2,0,KEY_SOFT1),
KEY(2,1,KEY_3),
KEY(2,2,KEY_6),
KEY(2,3,KEY_9),
KEY(2,4,KEY_SHARP),
KEY(2,5,KEY_2_5),
KEY(3,0,KEY_BACK),
KEY(3,1,KEY_2),
KEY(3,2,KEY_5),
KEY(3,3,KEY_8),
KEY(3,4,KEY_0),
KEY(3,5,KEY_HEADSETHOOK),
KEY(4,0,KEY_HOME),
KEY(4,1,KEY_1),
KEY(4,2,KEY_4),
KEY(4,3,KEY_7),
KEY(4,4,KEY_STAR),
KEY(4,5,KEY_POWER),
0
};
static struct resource smc91x_resources[] = {
[0] = {
.start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
......@@ -44,7 +81,7 @@ static struct resource smc91x_resources[] = {
},
};
static struct mtd_partition p2_partitions[] = {
static struct mtd_partition nor_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */
{
.name = "bootloader",
......@@ -75,27 +112,47 @@ static struct mtd_partition p2_partitions[] = {
},
};
static struct flash_platform_data p2_flash_data = {
static struct flash_platform_data nor_data = {
.map_name = "cfi_probe",
.width = 2,
.parts = p2_partitions,
.nr_parts = ARRAY_SIZE(p2_partitions),
.parts = nor_partitions,
.nr_parts = ARRAY_SIZE(nor_partitions),
};
static struct resource p2_flash_resource = {
static struct resource nor_resource = {
.start = OMAP_CS0_PHYS,
.end = OMAP_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device p2_flash_device = {
static struct platform_device nor_device = {
.name = "omapflash",
.id = 0,
.dev = {
.platform_data = &p2_flash_data,
.platform_data = &nor_data,
},
.num_resources = 1,
.resource = &nor_resource,
};
static struct nand_platform_data nand_data = {
.options = NAND_SAMSUNG_LP_OPTIONS,
};
static struct resource nand_resource = {
.start = OMAP_CS3_PHYS,
.end = OMAP_CS3_PHYS + SZ_4K - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device nand_device = {
.name = "omapnand",
.id = 0,
.dev = {
.platform_data = &nand_data,
},
.num_resources = 1,
.resource = &p2_flash_resource,
.resource = &nand_resource,
};
static struct platform_device smc91x_device = {
......@@ -105,17 +162,55 @@ static struct platform_device smc91x_device = {
.resource = smc91x_resources,
};
static struct resource kp_resources[] = {
[0] = {
.start = INT_730_MPUIO_KEYPAD,
.end = INT_730_MPUIO_KEYPAD,
.flags = IORESOURCE_IRQ,
},
};
static struct omap_kp_platform_data kp_data = {
.rows = 8,
.cols = 8,
.keymap = p2_keymap,
};
static struct platform_device kp_device = {
.name = "omap-keypad",
.id = -1,
.dev = {
.platform_data = &kp_data,
},
.num_resources = ARRAY_SIZE(kp_resources),
.resource = kp_resources,
};
static struct platform_device lcd_device = {
.name = "lcd_p2",
.id = -1,
};
static struct platform_device *devices[] __initdata = {
&p2_flash_device,
&nor_device,
&nand_device,
&smc91x_device,
&kp_device,
&lcd_device,
};
#define P2_NAND_RB_GPIO_PIN 62
static int nand_dev_ready(struct nand_platform_data *data)
{
return omap_get_gpio_datain(P2_NAND_RB_GPIO_PIN);
}
static struct omap_uart_config perseus2_uart_config __initdata = {
.enabled_uarts = ((1 << 0) | (1 << 1)),
};
static struct omap_lcd_config perseus2_lcd_config __initdata = {
.panel_name = "p2",
.ctrl_name = "internal",
};
......@@ -126,7 +221,13 @@ static struct omap_board_config_kernel perseus2_config[] = {
static void __init omap_perseus2_init(void)
{
(void) platform_add_devices(devices, ARRAY_SIZE(devices));
if (!(omap_request_gpio(P2_NAND_RB_GPIO_PIN)))
nand_data.dev_ready = nand_dev_ready;
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
platform_add_devices(devices, ARRAY_SIZE(devices));
omap_board_config = perseus2_config;
omap_board_config_size = ARRAY_SIZE(perseus2_config);
......
......@@ -155,9 +155,9 @@ static struct omap_uart_config voiceblue_uart_config __initdata = {
};
static struct omap_board_config_kernel voiceblue_config[] = {
{ OMAP_TAG_USB, &voiceblue_usb_config },
{ OMAP_TAG_MMC, &voiceblue_mmc_config },
{ OMAP_TAG_UART, &voiceblue_uart_config },
{ OMAP_TAG_USB, &voiceblue_usb_config },
{ OMAP_TAG_MMC, &voiceblue_mmc_config },
{ OMAP_TAG_UART, &voiceblue_uart_config },
};
static void __init voiceblue_init_irq(void)
......@@ -235,7 +235,7 @@ static struct notifier_block panic_block = {
static int __init voiceblue_setup(void)
{
/* Setup panic notifier */
atomic_notifier_chain_register(&panic_notifier_list, &panic_block);
notifier_chain_register(&panic_notifier_list, &panic_block);
return 0;
}
......
......@@ -345,7 +345,7 @@ static unsigned calc_ext_dsor(unsigned long rate)
*/
for (dsor = 2; dsor < 96; ++dsor) {
if ((dsor & 1) && dsor > 8)
continue;
continue;
if (rate >= 96000000 / dsor)
break;
}
......@@ -687,6 +687,11 @@ int __init omap1_clk_init(void)
clk_register(*clkp);
continue;
}
if (((*clkp)->flags &CLOCK_IN_OMAP310) && cpu_is_omap310()) {
clk_register(*clkp);
continue;
}
}
info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
......@@ -784,7 +789,7 @@ int __init omap1_clk_init(void)
clk_enable(&armxor_ck.clk);
clk_enable(&armtim_ck.clk); /* This should be done by timer code */
if (cpu_is_omap1510())
if (cpu_is_omap15xx())
clk_enable(&arm_gpio_ck);
return 0;
......
......@@ -151,7 +151,7 @@ static struct clk ck_ref = {
.name = "ck_ref",
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
ALWAYS_ENABLED,
CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
.enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic,
};
......@@ -160,7 +160,7 @@ static struct clk ck_dpll1 = {
.name = "ck_dpll1",
.parent = &ck_ref,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_PROPAGATES | ALWAYS_ENABLED,
CLOCK_IN_OMAP310 | RATE_PROPAGATES | ALWAYS_ENABLED,
.enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic,
};
......@@ -183,7 +183,8 @@ static struct clk arm_ck = {
.name = "arm_ck",
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_CKCTL | RATE_PROPAGATES | ALWAYS_ENABLED,
CLOCK_IN_OMAP310 | RATE_CKCTL | RATE_PROPAGATES |
ALWAYS_ENABLED,
.rate_offset = CKCTL_ARMDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
.enable = &omap1_clk_enable_generic,
......@@ -195,7 +196,8 @@ static struct arm_idlect1_clk armper_ck = {
.name = "armper_ck",
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_CKCTL | CLOCK_IDLE_CONTROL,
CLOCK_IN_OMAP310 | RATE_CKCTL |
CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_PERCK,
.rate_offset = CKCTL_PERDIV_OFFSET,
......@@ -209,7 +211,7 @@ static struct arm_idlect1_clk armper_ck = {
static struct clk arm_gpio_ck = {
.name = "arm_gpio_ck",
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_GPIOCK,
.recalc = &followparent_recalc,
......@@ -222,7 +224,7 @@ static struct arm_idlect1_clk armxor_ck = {
.name = "armxor_ck",
.parent = &ck_ref,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IDLE_CONTROL,
CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_XORPCK,
.recalc = &followparent_recalc,
......@@ -237,7 +239,7 @@ static struct arm_idlect1_clk armtim_ck = {
.name = "armtim_ck",
.parent = &ck_ref,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IDLE_CONTROL,
CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_TIMCK,
.recalc = &followparent_recalc,
......@@ -252,7 +254,7 @@ static struct arm_idlect1_clk armwdt_ck = {
.name = "armwdt_ck",
.parent = &ck_ref,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IDLE_CONTROL,
CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_WDTCK,
.recalc = &omap1_watchdog_recalc,
......@@ -344,9 +346,9 @@ static struct arm_idlect1_clk tc_ck = {
.name = "tc_ck",
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IN_OMAP730 | RATE_CKCTL |
RATE_PROPAGATES | ALWAYS_ENABLED |
CLOCK_IDLE_CONTROL,
CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 |
RATE_CKCTL | RATE_PROPAGATES |
ALWAYS_ENABLED | CLOCK_IDLE_CONTROL,
.rate_offset = CKCTL_TCDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
.enable = &omap1_clk_enable_generic,
......@@ -358,7 +360,8 @@ static struct arm_idlect1_clk tc_ck = {
static struct clk arminth_ck1510 = {
.name = "arminth_ck",
.parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
ALWAYS_ENABLED,
.recalc = &followparent_recalc,
/* Note: On 1510 the frequency follows TC_CK
*
......@@ -372,7 +375,8 @@ static struct clk tipb_ck = {
/* No-idle controlled by "tc_ck" */
.name = "tibp_ck",
.parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
ALWAYS_ENABLED,
.recalc = &followparent_recalc,
.enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic,
......@@ -417,7 +421,7 @@ static struct clk dma_ck = {
.name = "dma_ck",
.parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
ALWAYS_ENABLED,
CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
.recalc = &followparent_recalc,
.enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic,
......@@ -437,7 +441,7 @@ static struct arm_idlect1_clk api_ck = {
.name = "api_ck",
.parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IDLE_CONTROL,
CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_APICK,
.recalc = &followparent_recalc,
......@@ -451,7 +455,8 @@ static struct arm_idlect1_clk lb_ck = {
.clk = {
.name = "lb_ck",
.parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IDLE_CONTROL,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_LBCK,
.recalc = &followparent_recalc,
......@@ -495,8 +500,8 @@ static struct arm_idlect1_clk lcd_ck_1510 = {
.clk = {
.name = "lcd_ck",
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | RATE_CKCTL |
CLOCK_IDLE_CONTROL,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
RATE_CKCTL | CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_LCDCK,
.rate_offset = CKCTL_LCDDIV_OFFSET,
......@@ -512,8 +517,9 @@ static struct clk uart1_1510 = {
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT |
ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
ENABLE_REG_32BIT | ALWAYS_ENABLED |
CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 29, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
......@@ -544,8 +550,8 @@ static struct clk uart2_ck = {
.parent = &armper_ck.clk,
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
ENABLE_REG_32BIT | ALWAYS_ENABLED |
CLOCK_NO_IDLE_PARENT,
CLOCK_IN_OMAP310 | ENABLE_REG_32BIT |
ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 30, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
......@@ -559,8 +565,9 @@ static struct clk uart3_1510 = {
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT |
ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
ENABLE_REG_32BIT | ALWAYS_ENABLED |
CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 31, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
......@@ -590,7 +597,7 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
/* Direct from ULPD, no parent */
.rate = 6000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_FIXED | ENABLE_REG_32BIT,
CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT,
.enable_reg = (void __iomem *)ULPD_CLOCK_CTRL,
.enable_bit = USB_MCLK_EN_BIT,
.enable = &omap1_clk_enable_generic,
......@@ -601,7 +608,7 @@ static struct clk usb_hhc_ck1510 = {
.name = "usb_hhc_ck",
/* Direct from ULPD, no parent */
.rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
.flags = CLOCK_IN_OMAP1510 |
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
RATE_FIXED | ENABLE_REG_32BIT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = USB_HOST_HHC_UHOST_EN,
......@@ -637,7 +644,9 @@ static struct clk mclk_1510 = {
.name = "mclk",
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | RATE_FIXED,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED,
.enable_reg = (void __iomem *)SOFT_REQ_REG,
.enable_bit = 6,
.enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic,
};
......@@ -659,7 +668,7 @@ static struct clk bclk_1510 = {
.name = "bclk",
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | RATE_FIXED,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED,
.enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic,
};
......@@ -678,12 +687,14 @@ static struct clk bclk_16xx = {
};
static struct clk mmc1_ck = {
.name = "mmc1_ck",
.name = "mmc_ck",
.id = 1,
/* Functional clock is direct from ULPD, interface clock is ARMPER */
.parent = &armper_ck.clk,
.rate = 48000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT |
CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 23,
.enable = &omap1_clk_enable_generic,
......@@ -691,7 +702,8 @@ static struct clk mmc1_ck = {
};
static struct clk mmc2_ck = {
.name = "mmc2_ck",
.name = "mmc_ck",
.id = 2,
/* Functional clock is direct from ULPD, interface clock is ARMPER */
.parent = &armper_ck.clk,
.rate = 48000000,
......@@ -706,7 +718,7 @@ static struct clk mmc2_ck = {
static struct clk virtual_ck_mpu = {
.name = "mpu",
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
VIRTUAL_CLOCK | ALWAYS_ENABLED,
CLOCK_IN_OMAP310 | VIRTUAL_CLOCK | ALWAYS_ENABLED,
.parent = &arm_ck, /* Is smarter alias for */
.recalc = &followparent_recalc,
.set_rate = &omap1_select_table_rate,
......@@ -715,6 +727,20 @@ static struct clk virtual_ck_mpu = {
.disable = &omap1_clk_disable_generic,
};
/* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK
remains active during MPU idle whenever this is enabled */
static struct clk i2c_fck = {
.name = "i2c_fck",
.id = 1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT |
ALWAYS_ENABLED,
.parent = &armxor_ck.clk,
.recalc = &followparent_recalc,
.enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic,
};
static struct clk * onchip_clks[] = {
/* non-ULPD clocks */
&ck_ref,
......@@ -763,6 +789,7 @@ static struct clk * onchip_clks[] = {
&mmc2_ck,
/* Virtual clocks */
&virtual_ck_mpu,
&i2c_fck,
};
#endif
......@@ -99,6 +99,45 @@ static void omap_init_rtc(void)
static inline void omap_init_rtc(void) {}
#endif
#if defined(CONFIG_OMAP_STI)
#define OMAP1_STI_BASE IO_ADDRESS(0xfffea000)
#define OMAP1_STI_CHANNEL_BASE (OMAP1_STI_BASE + 0x400)
static struct resource sti_resources[] = {
{
.start = OMAP1_STI_BASE,
.end = OMAP1_STI_BASE + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
.start = OMAP1_STI_CHANNEL_BASE,
.end = OMAP1_STI_CHANNEL_BASE + SZ_1K - 1,
.flags = IORESOURCE_MEM,
},
{
.start = INT_1610_STI,
.flags = IORESOURCE_IRQ,
}
};
static struct platform_device sti_device = {
.name = "sti",
.id = -1,
.dev = {
.release = omap_nop_release,
},
.num_resources = ARRAY_SIZE(sti_resources),
.resource = sti_resources,
};
static inline void omap_init_sti(void)
{
platform_device_register(&sti_device);
}
#else
static inline void omap_init_sti(void) {}
#endif
/*-------------------------------------------------------------------------*/
......@@ -129,6 +168,7 @@ static int __init omap1_init_devices(void)
*/
omap_init_irda();
omap_init_rtc();
omap_init_sti();
return 0;
}
......
......@@ -18,6 +18,7 @@
#include <asm/io.h>
#include <asm/arch/mux.h>
#include <asm/arch/tc.h>
#include <asm/arch/omapfb.h>
extern int omap1_clk_init(void);
extern void omap_check_revision(void);
......@@ -110,7 +111,7 @@ void __init omap1_map_common_io(void)
}
#endif
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap1510()) {
if (cpu_is_omap15xx()) {
iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
}
#endif
......@@ -121,6 +122,7 @@ void __init omap1_map_common_io(void)
#endif
omap_sram_init();
omapfb_reserve_mem();
}
/*
......
......@@ -60,7 +60,7 @@ struct omap_irq_bank {
unsigned long wake_enable;
};
static unsigned int irq_bank_count = 0;
static unsigned int irq_bank_count;
static struct omap_irq_bank *irq_banks;
static inline unsigned int irq_bank_readl(int bank, int offset)
......@@ -142,28 +142,28 @@ static void omap_irq_set_cfg(int irq, int fiq, int priority, int trigger)
#ifdef CONFIG_ARCH_OMAP730
static struct omap_irq_bank omap730_irq_banks[] = {
{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f },
{ .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 },
{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f },
{ .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 },
{ .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 },
};
#endif
#ifdef CONFIG_ARCH_OMAP15XX
static struct omap_irq_bank omap1510_irq_banks[] = {
{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff },
{ .base_reg = OMAP_IH2_BASE, .trigger_map = 0xffbfffed },
{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff },
{ .base_reg = OMAP_IH2_BASE, .trigger_map = 0xffbfffed },
};
static struct omap_irq_bank omap310_irq_banks[] = {
{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3faefc3 },
{ .base_reg = OMAP_IH2_BASE, .trigger_map = 0x65b3c061 },
{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3faefc3 },
{ .base_reg = OMAP_IH2_BASE, .trigger_map = 0x65b3c061 },
};
#endif
#if defined(CONFIG_ARCH_OMAP16XX)
static struct omap_irq_bank omap1610_irq_banks[] = {
{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f },
{ .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd },
{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f },
{ .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd },
{ .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xffffb7ff },
{ .base_reg = OMAP_IH2_BASE + 0x200, .trigger_map = 0xffffffff },
};
......
......@@ -35,16 +35,20 @@
#ifdef CONFIG_ARCH_OMAP730
struct pin_config __initdata_or_module omap730_pins[] = {
MUX_CFG_730("E2_730_KBR0", 12, 21, 0, 0, 20, 1, NA, 0, 0)
MUX_CFG_730("J7_730_KBR1", 12, 25, 0, 0, 24, 1, NA, 0, 0)
MUX_CFG_730("E1_730_KBR2", 12, 29, 0, 0, 28, 1, NA, 0, 0)
MUX_CFG_730("F3_730_KBR3", 13, 1, 0, 0, 0, 1, NA, 0, 0)
MUX_CFG_730("D2_730_KBR4", 13, 5, 0, 0, 4, 1, NA, 0, 0)
MUX_CFG_730("C2_730_KBC0", 13, 9, 0, 0, 8, 1, NA, 0, 0)
MUX_CFG_730("D3_730_KBC1", 13, 13, 0, 0, 12, 1, NA, 0, 0)
MUX_CFG_730("E4_730_KBC2", 13, 17, 0, 0, 16, 1, NA, 0, 0)
MUX_CFG_730("F4_730_KBC3", 13, 21, 0, 0, 20, 1, NA, 0, 0)
MUX_CFG_730("E3_730_KBC4", 13, 25, 0, 0, 24, 1, NA, 0, 0)
MUX_CFG_730("E2_730_KBR0", 12, 21, 0, 20, 1, 0)
MUX_CFG_730("J7_730_KBR1", 12, 25, 0, 24, 1, 0)
MUX_CFG_730("E1_730_KBR2", 12, 29, 0, 28, 1, 0)
MUX_CFG_730("F3_730_KBR3", 13, 1, 0, 0, 1, 0)
MUX_CFG_730("D2_730_KBR4", 13, 5, 0, 4, 1, 0)
MUX_CFG_730("C2_730_KBC0", 13, 9, 0, 8, 1, 0)
MUX_CFG_730("D3_730_KBC1", 13, 13, 0, 12, 1, 0)
MUX_CFG_730("E4_730_KBC2", 13, 17, 0, 16, 1, 0)
MUX_CFG_730("F4_730_KBC3", 13, 21, 0, 20, 1, 0)
MUX_CFG_730("E3_730_KBC4", 13, 25, 0, 24, 1, 0)
MUX_CFG_730("AA17_730_USB_DM", 2, 21, 0, 20, 0, 0)
MUX_CFG_730("W16_730_USB_PU_EN", 2, 25, 0, 24, 0, 0)
MUX_CFG_730("W17_730_USB_VBUSI", 2, 29, 0, 28, 0, 0)
};
#endif
......@@ -73,8 +77,8 @@ MUX_CFG("UART3_BCLK", A, 0, 0, 2, 6, 0, NA, 0, 0)
MUX_CFG("Y15_1610_UART3_RTS", A, 0, 1, 2, 6, 0, NA, 0, 0)
/* PWT & PWL, conflicts with UART3 */
MUX_CFG("PWT", 6, 0, 2, 0, 30, 0, NA, 0, 0)
MUX_CFG("PWL", 6, 3, 1, 0, 31, 1, NA, 0, 0)
MUX_CFG("PWT", 6, 0, 2, 0, 30, 0, NA, 0, 0)
MUX_CFG("PWL", 6, 3, 1, 0, 31, 1, NA, 0, 0)
/* USB internal master generic */
MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1)
......@@ -151,7 +155,7 @@ MUX_CFG("MCBSP3_CLKX", 9, 3, 1, 1, 29, 0, NA, 0, 1)
/* Misc ballouts */
MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1)
MUX_CFG("N20_HDQ", 6, 18, 1, 1, 4, 0, 1, 4, 0)
MUX_CFG("N20_HDQ", 6, 18, 1, 1, 4, 0, 1, 4, 0)
/* OMAP-1610 MMC2 */
MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1)
......
此差异已折叠。
......@@ -30,9 +30,9 @@
#include <asm/arch/pm.h>
#endif
static struct clk * uart1_ck = NULL;
static struct clk * uart2_ck = NULL;
static struct clk * uart3_ck = NULL;
static struct clk * uart1_ck;
static struct clk * uart2_ck;
static struct clk * uart3_ck;
static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
int offset)
......
/*
* linux/arch/arm/plat-omap/sleep.S
* linux/arch/arm/mach-omap1/sleep.S
*
* Low-level OMAP730/1510/1610 sleep/wakeUp support
*
......@@ -383,60 +383,133 @@ ENTRY(omap1610_cpu_suspend)
mcr p15, 0, r0, c7, c10, 4
nop
@ load base address of Traffic Controller
@ Load base address of Traffic Controller
mov r6, #TCMIF_ASM_BASE & 0xff000000
orr r6, r6, #TCMIF_ASM_BASE & 0x00ff0000
orr r6, r6, #TCMIF_ASM_BASE & 0x0000ff00
@ prepare to put SDRAM into self-refresh manually
@ Prepare to put SDRAM into self-refresh manually
ldr r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff]
orr r9, r7, #SELF_REFRESH_MODE & 0xff000000
orr r9, r9, #SELF_REFRESH_MODE & 0x000000ff
str r9, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff]
@ prepare to put EMIFS to Sleep
@ Prepare to put EMIFS to Sleep
ldr r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff]
orr r9, r8, #IDLE_EMIFS_REQUEST & 0xff
str r9, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff]
@ load base address of ARM_IDLECT1 and ARM_IDLECT2
@ Load base address of ARM_IDLECT1 and ARM_IDLECT2
mov r4, #CLKGEN_REG_ASM_BASE & 0xff000000
orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000
orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00
@ turn off clock domains
@ do not disable PERCK (0x04)
@ Turn off clock domains
@ Do not disable PERCK (0x04)
mov r5, #OMAP1610_IDLECT2_SLEEP_VAL & 0xff
orr r5, r5, #OMAP1610_IDLECT2_SLEEP_VAL & 0xff00
strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
@ request ARM idle
@ Request ARM idle
mov r3, #OMAP1610_IDLECT1_SLEEP_VAL & 0xff
orr r3, r3, #OMAP1610_IDLECT1_SLEEP_VAL & 0xff00
strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
@ disable instruction cache
mrc p15, 0, r9, c1, c0, 0
bic r2, r9, #0x1000
mcr p15, 0, r2, c1, c0, 0
nop
/*
* Let's wait for the next wake up event to wake us up. r0 can't be
* used here because r0 holds ARM_IDLECT1
*/
mov r2, #0
mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt
@ Errata (HEL3SU467, section 1.4.4) specifies nop-instructions
@ according to this formula:
@ 2 + (4*DPLL_MULT)/DPLL_DIV/ARMDIV
@ Max DPLL_MULT = 18
@ DPLL_DIV = 1
@ ARMDIV = 1
@ => 74 nop-instructions
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop @10
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop @20
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop @30
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop @40
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop @50
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop @60
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop @70
nop
nop
nop
nop @74
/*
* omap1610_cpu_suspend()'s resume point.
*
* It will just start executing here, so we'll restore stuff from the
* stack.
*/
@ re-enable Icache
mcr p15, 0, r9, c1, c0, 0
@ reset the ARM_IDLECT1 and ARM_IDLECT2.
@ Restore the ARM_IDLECT1 and ARM_IDLECT2.
strh r1, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
strh r0, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
......@@ -444,7 +517,7 @@ ENTRY(omap1610_cpu_suspend)
str r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff]
str r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff]
@ restore regs and return
@ Restore regs and return
ldmfd sp!, {r0 - r12, pc}
ENTRY(omap1610_cpu_suspend_sz)
......
......@@ -51,8 +51,6 @@
struct sys_timer omap_timer;
#ifdef CONFIG_OMAP_MPU_TIMER
/*
* ---------------------------------------------------------------------------
* MPU timer
......@@ -222,195 +220,6 @@ unsigned long long sched_clock(void)
return cycles_2_ns(ticks64);
}
#endif /* CONFIG_OMAP_MPU_TIMER */
#ifdef CONFIG_OMAP_32K_TIMER
#ifdef CONFIG_ARCH_OMAP15XX
#error OMAP 32KHz timer does not currently work on 15XX!
#endif
/*
* ---------------------------------------------------------------------------
* 32KHz OS timer
*
* This currently works only on 16xx, as 1510 does not have the continuous
* 32KHz synchronous timer. The 32KHz synchronous timer is used to keep track
* of time in addition to the 32KHz OS timer. Using only the 32KHz OS timer
* on 1510 would be possible, but the timer would not be as accurate as
* with the 32KHz synchronized timer.
* ---------------------------------------------------------------------------
*/
#define OMAP_32K_TIMER_BASE 0xfffb9000
#define OMAP_32K_TIMER_CR 0x08
#define OMAP_32K_TIMER_TVR 0x00
#define OMAP_32K_TIMER_TCR 0x04
#define OMAP_32K_TICKS_PER_HZ (32768 / HZ)
/*
* TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1
* so with HZ = 100, TVR = 327.68.
*/
#define OMAP_32K_TIMER_TICK_PERIOD ((32768 / HZ) - 1)
#define TIMER_32K_SYNCHRONIZED 0xfffbc410
#define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate) \
(((nr_jiffies) * (clock_rate)) / HZ)
static inline void omap_32k_timer_write(int val, int reg)
{
omap_writew(val, reg + OMAP_32K_TIMER_BASE);
}
static inline unsigned long omap_32k_timer_read(int reg)
{
return omap_readl(reg + OMAP_32K_TIMER_BASE) & 0xffffff;
}
/*
* The 32KHz synchronized timer is an additional timer on 16xx.
* It is always running.
*/
static inline unsigned long omap_32k_sync_timer_read(void)
{
return omap_readl(TIMER_32K_SYNCHRONIZED);
}
static inline void omap_32k_timer_start(unsigned long load_val)
{
omap_32k_timer_write(load_val, OMAP_32K_TIMER_TVR);
omap_32k_timer_write(0x0f, OMAP_32K_TIMER_CR);
}
static inline void omap_32k_timer_stop(void)
{
omap_32k_timer_write(0x0, OMAP_32K_TIMER_CR);
}
/*
* Rounds down to nearest usec. Note that this will overflow for larger values.
*/
static inline unsigned long omap_32k_ticks_to_usecs(unsigned long ticks_32k)
{
return (ticks_32k * 5*5*5*5*5*5) >> 9;
}
/*
* Rounds down to nearest nsec.
*/
static inline unsigned long long
omap_32k_ticks_to_nsecs(unsigned long ticks_32k)
{
return (unsigned long long) ticks_32k * 1000 * 5*5*5*5*5*5 >> 9;
}
static unsigned long omap_32k_last_tick = 0;
/*
* Returns elapsed usecs since last 32k timer interrupt
*/
static unsigned long omap_32k_timer_gettimeoffset(void)
{
unsigned long now = omap_32k_sync_timer_read();
return omap_32k_ticks_to_usecs(now - omap_32k_last_tick);
}
/*
* Returns current time from boot in nsecs. It's OK for this to wrap
* around for now, as it's just a relative time stamp.
*/
unsigned long long sched_clock(void)
{
return omap_32k_ticks_to_nsecs(omap_32k_sync_timer_read());
}
/*
* Timer interrupt for 32KHz timer. When dynamic tick is enabled, this
* function is also called from other interrupts to remove latency
* issues with dynamic tick. In the dynamic tick case, we need to lock
* with irqsave.
*/
static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id,
struct pt_regs *regs)
{
unsigned long flags;
unsigned long now;
write_seqlock_irqsave(&xtime_lock, flags);
now = omap_32k_sync_timer_read();
while (now - omap_32k_last_tick >= OMAP_32K_TICKS_PER_HZ) {
omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ;
timer_tick(regs);
}
/* Restart timer so we don't drift off due to modulo or dynamic tick.
* By default we program the next timer to be continuous to avoid
* latencies during high system load. During dynamic tick operation the
* continuous timer can be overridden from pm_idle to be longer.
*/
omap_32k_timer_start(omap_32k_last_tick + OMAP_32K_TICKS_PER_HZ - now);
write_sequnlock_irqrestore(&xtime_lock, flags);
return IRQ_HANDLED;
}
#ifdef CONFIG_NO_IDLE_HZ
/*
* Programs the next timer interrupt needed. Called when dynamic tick is
* enabled, and to reprogram the ticks to skip from pm_idle. Note that
* we can keep the timer continuous, and don't need to set it to run in
* one-shot mode. This is because the timer will get reprogrammed again
* after next interrupt.
*/
void omap_32k_timer_reprogram(unsigned long next_tick)
{
omap_32k_timer_start(JIFFIES_TO_HW_TICKS(next_tick, 32768) + 1);
}
static struct irqaction omap_32k_timer_irq;
extern struct timer_update_handler timer_update;
static int omap_32k_timer_enable_dyn_tick(void)
{
/* No need to reprogram timer, just use the next interrupt */
return 0;
}
static int omap_32k_timer_disable_dyn_tick(void)
{
omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
return 0;
}
static struct dyn_tick_timer omap_dyn_tick_timer = {
.enable = omap_32k_timer_enable_dyn_tick,
.disable = omap_32k_timer_disable_dyn_tick,
.reprogram = omap_32k_timer_reprogram,
.handler = omap_32k_timer_interrupt,
};
#endif /* CONFIG_NO_IDLE_HZ */
static struct irqaction omap_32k_timer_irq = {
.name = "32KHz timer",
.flags = SA_INTERRUPT | SA_TIMER,
.handler = omap_32k_timer_interrupt,
};
static __init void omap_init_32k_timer(void)
{
#ifdef CONFIG_NO_IDLE_HZ
omap_timer.dyn_tick = &omap_dyn_tick_timer;
#endif
setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
omap_timer.offset = omap_32k_timer_gettimeoffset;
omap_32k_last_tick = omap_32k_sync_timer_read();
omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
}
#endif /* CONFIG_OMAP_32K_TIMER */
/*
* ---------------------------------------------------------------------------
......@@ -419,13 +228,7 @@ static __init void omap_init_32k_timer(void)
*/
static void __init omap_timer_init(void)
{
#if defined(CONFIG_OMAP_MPU_TIMER)
omap_init_mpu_timer();
#elif defined(CONFIG_OMAP_32K_TIMER)
omap_init_32k_timer();
#else
#error No system timer selected in Kconfig!
#endif
}
struct sys_timer omap_timer = {
......
......@@ -20,3 +20,6 @@ config MACH_OMAP_H4
bool "OMAP 2420 H4 board"
depends on ARCH_OMAP2 && ARCH_OMAP24XX
config MACH_OMAP_APOLLON
bool "OMAP 2420 Apollon board"
depends on ARCH_OMAP2 && ARCH_OMAP24XX
......@@ -3,11 +3,15 @@
#
# Common support
obj-y := irq.o id.o io.o sram-fn.o clock.o mux.o devices.o serial.o
obj-y := irq.o id.o io.o sram-fn.o memory.o prcm.o clock.o mux.o devices.o serial.o
obj-$(CONFIG_OMAP_MPU_TIMER) += timer-gp.o
# Power Management
obj-$(CONFIG_PM) += pm.o sleep.o
# Specific board support
obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o
obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o
/*
* linux/arch/arm/mach-omap/omap2/board-apollon.c
*
* Copyright (C) 2005,2006 Samsung Electronics
* Author: Kyungmin Park <kyungmin.park@samsung.com>
*
* Modified from mach-omap/omap2/board-h4.c
*
* Code for apollon OMAP2 board. Should work on many OMAP2 systems where
* the bootloader passes the board-specific data to the kernel.
* Do not put any board specific code to this file; create a new machine
* type if you need custom low-level initializations.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/onenand.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mux.h>
#include <asm/arch/usb.h>
#include <asm/arch/board.h>
#include <asm/arch/common.h>
#include "prcm-regs.h"
/* LED & Switch macros */
#define LED0_GPIO13 13
#define LED1_GPIO14 14
#define LED2_GPIO15 15
#define SW_ENTER_GPIO16 16
#define SW_UP_GPIO17 17
#define SW_DOWN_GPIO58 58
static struct mtd_partition apollon_partitions[] = {
{
.name = "X-Loader + U-Boot",
.offset = 0,
.size = SZ_128K,
.mask_flags = MTD_WRITEABLE,
},
{
.name = "params",
.offset = MTDPART_OFS_APPEND,
.size = SZ_128K,
},
{
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = SZ_2M,
},
{
.name = "rootfs",
.offset = MTDPART_OFS_APPEND,
.size = SZ_16M,
},
{
.name = "filesystem00",
.offset = MTDPART_OFS_APPEND,
.size = SZ_32M,
},
{
.name = "filesystem01",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static struct flash_platform_data apollon_flash_data = {
.parts = apollon_partitions,
.nr_parts = ARRAY_SIZE(apollon_partitions),
};
static struct resource apollon_flash_resource = {
.start = APOLLON_CS0_BASE,
.end = APOLLON_CS0_BASE + SZ_128K,
.flags = IORESOURCE_MEM,
};
static struct platform_device apollon_onenand_device = {
.name = "onenand",
.id = -1,
.dev = {
.platform_data = &apollon_flash_data,
},
.num_resources = ARRAY_SIZE(&apollon_flash_resource),
.resource = &apollon_flash_resource,
};
static struct resource apollon_smc91x_resources[] = {
[0] = {
.start = APOLLON_ETHR_START, /* Physical */
.end = APOLLON_ETHR_START + 0xf,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = OMAP_GPIO_IRQ(APOLLON_ETHR_GPIO_IRQ),
.end = OMAP_GPIO_IRQ(APOLLON_ETHR_GPIO_IRQ),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device apollon_smc91x_device = {
.name = "smc91x",
.id = -1,
.num_resources = ARRAY_SIZE(apollon_smc91x_resources),
.resource = apollon_smc91x_resources,
};
static struct platform_device apollon_lcd_device = {
.name = "apollon_lcd",
.id = -1,
};
static struct platform_device *apollon_devices[] __initdata = {
&apollon_onenand_device,
&apollon_smc91x_device,
&apollon_lcd_device,
};
static inline void __init apollon_init_smc91x(void)
{
/* Make sure CS1 timings are correct */
GPMC_CONFIG1_1 = 0x00011203;
GPMC_CONFIG2_1 = 0x001f1f01;
GPMC_CONFIG3_1 = 0x00080803;
GPMC_CONFIG4_1 = 0x1c091c09;
GPMC_CONFIG5_1 = 0x041f1f1f;
GPMC_CONFIG6_1 = 0x000004c4;
GPMC_CONFIG7_1 = 0x00000f40 | (APOLLON_CS1_BASE >> 24);
udelay(100);
omap_cfg_reg(W4__24XX_GPIO74);
if (omap_request_gpio(APOLLON_ETHR_GPIO_IRQ) < 0) {
printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
APOLLON_ETHR_GPIO_IRQ);
return;
}
omap_set_gpio_direction(APOLLON_ETHR_GPIO_IRQ, 1);
}
static void __init omap_apollon_init_irq(void)
{
omap2_init_common_hw();
omap_init_irq();
omap_gpio_init();
apollon_init_smc91x();
}
static struct omap_uart_config apollon_uart_config __initdata = {
.enabled_uarts = (1 << 0) | (0 << 1) | (0 << 2),
};
static struct omap_mmc_config apollon_mmc_config __initdata = {
.mmc [0] = {
.enabled = 0,
.wire4 = 0,
.wp_pin = -1,
.power_pin = -1,
.switch_pin = -1,
},
};
static struct omap_lcd_config apollon_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel apollon_config[] = {
{ OMAP_TAG_UART, &apollon_uart_config },
{ OMAP_TAG_MMC, &apollon_mmc_config },
{ OMAP_TAG_LCD, &apollon_lcd_config },
};
static void __init apollon_led_init(void)
{
/* LED0 - AA10 */
omap_cfg_reg(AA10_242X_GPIO13);
omap_request_gpio(LED0_GPIO13);
omap_set_gpio_direction(LED0_GPIO13, 0);
omap_set_gpio_dataout(LED0_GPIO13, 0);
/* LED1 - AA6 */
omap_cfg_reg(AA6_242X_GPIO14);
omap_request_gpio(LED1_GPIO14);
omap_set_gpio_direction(LED1_GPIO14, 0);
omap_set_gpio_dataout(LED1_GPIO14, 0);
/* LED2 - AA4 */
omap_cfg_reg(AA4_242X_GPIO15);
omap_request_gpio(LED2_GPIO15);
omap_set_gpio_direction(LED2_GPIO15, 0);
omap_set_gpio_dataout(LED2_GPIO15, 0);
}
static irqreturn_t apollon_sw_interrupt(int irq, void *ignored, struct pt_regs *regs)
{
static unsigned int led0, led1, led2;
if (irq == OMAP_GPIO_IRQ(SW_ENTER_GPIO16))
omap_set_gpio_dataout(LED0_GPIO13, led0 ^= 1);
else if (irq == OMAP_GPIO_IRQ(SW_UP_GPIO17))
omap_set_gpio_dataout(LED1_GPIO14, led1 ^= 1);
else if (irq == OMAP_GPIO_IRQ(SW_DOWN_GPIO58))
omap_set_gpio_dataout(LED2_GPIO15, led2 ^= 1);
return IRQ_HANDLED;
}
static void __init apollon_sw_init(void)
{
/* Enter SW - Y11 */
omap_cfg_reg(Y11_242X_GPIO16);
omap_request_gpio(SW_ENTER_GPIO16);
omap_set_gpio_direction(SW_ENTER_GPIO16, 1);
/* Up SW - AA12 */
omap_cfg_reg(AA12_242X_GPIO17);
omap_request_gpio(SW_UP_GPIO17);
omap_set_gpio_direction(SW_UP_GPIO17, 1);
/* Down SW - AA8 */
omap_cfg_reg(AA8_242X_GPIO58);
omap_request_gpio(SW_DOWN_GPIO58);
omap_set_gpio_direction(SW_DOWN_GPIO58, 1);
set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQT_RISING);
if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt,
SA_SHIRQ, "enter sw",
&apollon_sw_interrupt))
return;
set_irq_type(OMAP_GPIO_IRQ(SW_UP_GPIO17), IRQT_RISING);
if (request_irq(OMAP_GPIO_IRQ(SW_UP_GPIO17), &apollon_sw_interrupt,
SA_SHIRQ, "up sw",
&apollon_sw_interrupt))
return;
set_irq_type(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), IRQT_RISING);
if (request_irq(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), &apollon_sw_interrupt,
SA_SHIRQ, "down sw",
&apollon_sw_interrupt))
return;
}
static void __init omap_apollon_init(void)
{
apollon_led_init();
apollon_sw_init();
/* REVISIT: where's the correct place */
omap_cfg_reg(W19_24XX_SYS_NIRQ);
/*
* Make sure the serial ports are muxed on at this point.
* You have to mux them off in device drivers later on
* if not needed.
*/
platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices));
omap_board_config = apollon_config;
omap_board_config_size = ARRAY_SIZE(apollon_config);
omap_serial_init();
}
static void __init omap_apollon_map_io(void)
{
omap2_map_common_io();
}
MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
/* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
.phys_io = 0x48000000,
.io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
.boot_params = 0x80000100,
.map_io = omap_apollon_map_io,
.init_irq = omap_apollon_init_irq,
.init_machine = omap_apollon_init,
.timer = &omap_timer,
MACHINE_END
此差异已折叠。
......@@ -28,14 +28,14 @@
#include <asm/arch/clock.h>
#include <asm/arch/sram.h>
#include <asm/arch/prcm.h>
#include "prcm-regs.h"
#include "memory.h"
#include "clock.h"
//#define DOWN_VARIABLE_DPLL 1 /* Experimental */
static struct prcm_config *curr_prcm_set;
static struct memory_timings mem_timings;
static u32 curr_perf_level = PRCM_FULL_SPEED;
/*-------------------------------------------------------------------------
......@@ -54,11 +54,13 @@ static void omap2_sys_clk_recalc(struct clk * clk)
static u32 omap2_get_dpll_rate(struct clk * tclk)
{
int dpll_clk, dpll_mult, dpll_div, amult;
long long dpll_clk;
int dpll_mult, dpll_div, amult;
dpll_mult = (CM_CLKSEL1_PLL >> 12) & 0x03ff; /* 10 bits */
dpll_div = (CM_CLKSEL1_PLL >> 8) & 0x0f; /* 4 bits */
dpll_clk = (tclk->parent->rate * dpll_mult) / (dpll_div + 1);
dpll_clk = (long long)tclk->parent->rate * dpll_mult;
do_div(dpll_clk, dpll_div + 1);
amult = CM_CLKSEL2_PLL & 0x3;
dpll_clk *= amult;
......@@ -385,75 +387,23 @@ static u32 omap2_dll_force_needed(void)
return 0;
}
static void omap2_init_memory_params(u32 force_lock_to_unlock_mode)
{
unsigned long dll_cnt;
u32 fast_dll = 0;
mem_timings.m_type = !((SDRC_MR_0 & 0x3) == 0x1); /* DDR = 1, SDR = 0 */
/* 2422 es2.05 and beyond has a single SIP DDR instead of 2 like others.
* In the case of 2422, its ok to use CS1 instead of CS0.
*/
#if 0 /* FIXME: Enable after 24xx cpu detection works */
ctype = get_cpu_type();
if (cpu_is_omap2422())
mem_timings.base_cs = 1;
else
#endif
mem_timings.base_cs = 0;
if (mem_timings.m_type != M_DDR)
return;
/* With DDR we need to determine the low frequency DLL value */
if (((mem_timings.fast_dll_ctrl & (1 << 2)) == M_LOCK_CTRL))
mem_timings.dll_mode = M_UNLOCK;
else
mem_timings.dll_mode = M_LOCK;
if (mem_timings.base_cs == 0) {
fast_dll = SDRC_DLLA_CTRL;
dll_cnt = SDRC_DLLA_STATUS & 0xff00;
} else {
fast_dll = SDRC_DLLB_CTRL;
dll_cnt = SDRC_DLLB_STATUS & 0xff00;
}
if (force_lock_to_unlock_mode) {
fast_dll &= ~0xff00;
fast_dll |= dll_cnt; /* Current lock mode */
}
mem_timings.fast_dll_ctrl = fast_dll;
/* No disruptions, DDR will be offline & C-ABI not followed */
omap2_sram_ddr_init(&mem_timings.slow_dll_ctrl,
mem_timings.fast_dll_ctrl,
mem_timings.base_cs,
force_lock_to_unlock_mode);
mem_timings.slow_dll_ctrl &= 0xff00; /* Keep lock value */
/* Turn status into unlock ctrl */
mem_timings.slow_dll_ctrl |=
((mem_timings.fast_dll_ctrl & 0xF) | (1 << 2));
/* 90 degree phase for anything below 133Mhz */
mem_timings.slow_dll_ctrl |= (1 << 1);
}
static u32 omap2_reprogram_sdrc(u32 level, u32 force)
{
u32 slow_dll_ctrl, fast_dll_ctrl, m_type;
u32 prev = curr_perf_level, flags;
if ((curr_perf_level == level) && !force)
return prev;
m_type = omap2_memory_get_type();
slow_dll_ctrl = omap2_memory_get_slow_dll_ctrl();
fast_dll_ctrl = omap2_memory_get_fast_dll_ctrl();
if (level == PRCM_HALF_SPEED) {
local_irq_save(flags);
PRCM_VOLTSETUP = 0xffff;
omap2_sram_reprogram_sdrc(PRCM_HALF_SPEED,
mem_timings.slow_dll_ctrl,
mem_timings.m_type);
slow_dll_ctrl, m_type);
curr_perf_level = PRCM_HALF_SPEED;
local_irq_restore(flags);
}
......@@ -461,8 +411,7 @@ static u32 omap2_reprogram_sdrc(u32 level, u32 force)
local_irq_save(flags);
PRCM_VOLTSETUP = 0xffff;
omap2_sram_reprogram_sdrc(PRCM_FULL_SPEED,
mem_timings.fast_dll_ctrl,
mem_timings.m_type);
fast_dll_ctrl, m_type);
curr_perf_level = PRCM_FULL_SPEED;
local_irq_restore(flags);
}
......@@ -650,7 +599,7 @@ static u32 omap2_get_clksel(u32 *div_sel, u32 *field_mask,
case 13: /* dss2 */
mask = 0x1; break;
case 25: /* usb */
mask = 0xf; break;
mask = 0x7; break;
}
}
......
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......@@ -74,6 +74,47 @@ static void omap_init_i2c(void) {}
#endif
#if defined(CONFIG_OMAP_STI)
#define OMAP2_STI_BASE IO_ADDRESS(0x48068000)
#define OMAP2_STI_CHANNEL_BASE 0x54000000
#define OMAP2_STI_IRQ 4
static struct resource sti_resources[] = {
{
.start = OMAP2_STI_BASE,
.end = OMAP2_STI_BASE + 0x7ff,
.flags = IORESOURCE_MEM,
},
{
.start = OMAP2_STI_CHANNEL_BASE,
.end = OMAP2_STI_CHANNEL_BASE + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
{
.start = OMAP2_STI_IRQ,
.flags = IORESOURCE_IRQ,
}
};
static struct platform_device sti_device = {
.name = "sti",
.id = -1,
.dev = {
.release = omap_nop_release,
},
.num_resources = ARRAY_SIZE(sti_resources),
.resource = sti_resources,
};
static inline void omap_init_sti(void)
{
platform_device_register(&sti_device);
}
#else
static inline void omap_init_sti(void) {}
#endif
/*-------------------------------------------------------------------------*/
static int __init omap2_init_devices(void)
......@@ -82,6 +123,7 @@ static int __init omap2_init_devices(void)
* in alphabetical order so they're easier to sort through.
*/
omap_init_i2c();
omap_init_sti();
return 0;
}
......
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......@@ -307,6 +307,10 @@ static void __init fixup_poodle(struct machine_desc *desc,
struct tag *tags, char **cmdline, struct meminfo *mi)
{
sharpsl_save_param();
mi->nr_banks=1;
mi->bank[0].start = 0xa0000000;
mi->bank[0].node = 0;
mi->bank[0].size = (32*1024*1024);
}
MACHINE_START(POODLE, "SHARP Poodle")
......
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