提交 ff489fb4 编写于 作者: M Matt Caswell

Integrate Curve448 into the build system

Reviewed-by: NBernd Edlinger <bernd.edlinger@hotmail.de>
(Merged from https://github.com/openssl/openssl/pull/5105)
上级 094c071c
...@@ -6,6 +6,9 @@ SOURCE[../../libcrypto]=\ ...@@ -6,6 +6,9 @@ SOURCE[../../libcrypto]=\
ecp_nistp224.c ecp_nistp256.c ecp_nistp521.c ecp_nistputil.c \ ecp_nistp224.c ecp_nistp256.c ecp_nistp521.c ecp_nistputil.c \
ecp_oct.c ec2_oct.c ec_oct.c ec_kmeth.c ecdh_ossl.c ecdh_kdf.c \ ecp_oct.c ec2_oct.c ec_oct.c ec_kmeth.c ecdh_ossl.c ecdh_kdf.c \
ecdsa_ossl.c ecdsa_sign.c ecdsa_vrf.c curve25519.c ecx_meth.c \ ecdsa_ossl.c ecdsa_sign.c ecdsa_vrf.c curve25519.c ecx_meth.c \
curve448/arch_32/f_impl.c curve448/f_arithmetic.c curve448/f_generic.c \
curve448/scalar.c curve448/curve448_tables.c curve448/eddsa.c \
curve448/curve448.c \
{- $target{ec_asm_src} -} {- $target{ec_asm_src} -}
GENERATE[ecp_nistz256-x86.s]=asm/ecp_nistz256-x86.pl \ GENERATE[ecp_nistz256-x86.s]=asm/ecp_nistz256-x86.pl \
...@@ -28,3 +31,11 @@ BEGINRAW[Makefile] ...@@ -28,3 +31,11 @@ BEGINRAW[Makefile]
{- $builddir -}/ecp_nistz256-%.S: {- $sourcedir -}/asm/ecp_nistz256-%.pl {- $builddir -}/ecp_nistz256-%.S: {- $sourcedir -}/asm/ecp_nistz256-%.pl
CC="$(CC)" $(PERL) $< $(PERLASM_SCHEME) $@ CC="$(CC)" $(PERL) $< $(PERLASM_SCHEME) $@
ENDRAW[Makefile] ENDRAW[Makefile]
INCLUDE[curve448/arch_32/f_impl.o]=curve448/arch_32 curve448
INCLUDE[curve448/f_arithmetic.o]=curve448/arch_32 curve448
INCLUDE[curve448/f_generic.o]=curve448/arch_32 curve448
INCLUDE[curve448/scalar.o]=curve448/arch_32 curve448
INCLUDE[curve448/curve448_tables.o]=curve448/arch_32 curve448
INCLUDE[curve448/eddsa.o]=curve448/arch_32 curve448
INCLUDE[curve448/curve448.o]=curve448/arch_32 curve448
...@@ -26,7 +26,7 @@ ...@@ -26,7 +26,7 @@
#if defined(__ARM_NEON__) #if defined(__ARM_NEON__)
#include <arm_neon.h> #include <arm_neon.h>
#elif defined(__SSE2__) #elif defined(__SSE2__)
#if !defined(__GNUC__) || __clang__ || __GNUC__ >= 5 || (__GNUC__==4 && __GNUC_MINOR__ >= 4) #if !defined(__GNUC__) || defined(__clang__) || __GNUC__ >= 5 || (__GNUC__==4 && __GNUC_MINOR__ >= 4)
#include <immintrin.h> #include <immintrin.h>
#else #else
#include <emmintrin.h> #include <emmintrin.h>
...@@ -60,7 +60,7 @@ ...@@ -60,7 +60,7 @@
#ifdef __ARM_NEON__ #ifdef __ARM_NEON__
typedef uint32x4_t vecmask_t; typedef uint32x4_t vecmask_t;
#elif __clang__ #elif defined(__clang__)
typedef uint64_t uint64x2_t __attribute__((ext_vector_type(2))); typedef uint64_t uint64x2_t __attribute__((ext_vector_type(2)));
typedef int64_t int64x2_t __attribute__((ext_vector_type(2))); typedef int64_t int64x2_t __attribute__((ext_vector_type(2)));
typedef uint64_t uint64x4_t __attribute__((ext_vector_type(4))); typedef uint64_t uint64x4_t __attribute__((ext_vector_type(4)));
...@@ -86,7 +86,7 @@ ...@@ -86,7 +86,7 @@
typedef word_t vecmask_t __attribute__((vector_size(32))); typedef word_t vecmask_t __attribute__((vector_size(32)));
#endif #endif
#if __AVX2__ #if defined(__AVX2__)
#define VECTOR_ALIGNED __attribute__((aligned(32))) #define VECTOR_ALIGNED __attribute__((aligned(32)))
typedef uint32x8_t big_register_t; typedef uint32x8_t big_register_t;
typedef uint64x4_t uint64xn_t; typedef uint64x4_t uint64xn_t;
...@@ -98,7 +98,7 @@ ...@@ -98,7 +98,7 @@
big_register_t ret = {y,y,y,y,y,y,y,y}; big_register_t ret = {y,y,y,y,y,y,y,y};
return ret; return ret;
} }
#elif __SSE2__ #elif defined(__SSE2__)
#define VECTOR_ALIGNED __attribute__((aligned(16))) #define VECTOR_ALIGNED __attribute__((aligned(16)))
typedef uint32x4_t big_register_t; typedef uint32x4_t big_register_t;
typedef uint64x2_t uint64xn_t; typedef uint64x2_t uint64xn_t;
...@@ -110,7 +110,7 @@ ...@@ -110,7 +110,7 @@
big_register_t ret = {y,y,y,y}; big_register_t ret = {y,y,y,y};
return ret; return ret;
} }
#elif __ARM_NEON__ #elif defined(__ARM_NEON__)
#define VECTOR_ALIGNED __attribute__((aligned(16))) #define VECTOR_ALIGNED __attribute__((aligned(16)))
typedef uint32x4_t big_register_t; typedef uint32x4_t big_register_t;
typedef uint64x2_t uint64xn_t; typedef uint64x2_t uint64xn_t;
...@@ -120,7 +120,8 @@ ...@@ -120,7 +120,8 @@
br_set_to_mask(mask_t x) { br_set_to_mask(mask_t x) {
return vdupq_n_u32(x); return vdupq_n_u32(x);
} }
#elif _WIN64 || __amd64__ || __X86_64__ || __aarch64__ #elif defined(_WIN64) || defined(__amd64__) || defined(__X86_64__) \
|| defined(__aarch64__)
#define VECTOR_ALIGNED __attribute__((aligned(8))) #define VECTOR_ALIGNED __attribute__((aligned(8)))
typedef uint64_t big_register_t, uint64xn_t; typedef uint64_t big_register_t, uint64xn_t;
...@@ -141,18 +142,18 @@ ...@@ -141,18 +142,18 @@
} }
#endif #endif
#if __AVX2__ #if defined(__AVX2__)
static ossl_inline big_register_t static ossl_inline big_register_t
br_is_zero(big_register_t x) { br_is_zero(big_register_t x) {
return (big_register_t)(x == br_set_to_mask(0)); return (big_register_t)(x == br_set_to_mask(0));
} }
#elif __SSE2__ #elif defined(__SSE2__)
static ossl_inline big_register_t static ossl_inline big_register_t
br_is_zero(big_register_t x) { br_is_zero(big_register_t x) {
return (big_register_t)_mm_cmpeq_epi32((__m128i)x, _mm_setzero_si128()); return (big_register_t)_mm_cmpeq_epi32((__m128i)x, _mm_setzero_si128());
//return (big_register_t)(x == br_set_to_mask(0)); //return (big_register_t)(x == br_set_to_mask(0));
} }
#elif __ARM_NEON__ #elif defined(__ARM_NEON__)
static ossl_inline big_register_t static ossl_inline big_register_t
br_is_zero(big_register_t x) { br_is_zero(big_register_t x) {
return vceqq_u32(x,x^x); return vceqq_u32(x,x^x);
......
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