OcCpuLib: Added identifiers for Rocket Lake and Tiger Lake CPUs

Changelog.md

@@ -48,7 +48,8 @@ OpenCore Changelog
 - Fixed incorrect handling of multiple processors and processor cache in SMBIOS
 - Matched default Apple boot picker cursor start position
 - Updated OpenShell `devices` command to support misaligned device names returned by some Apple firmware
-- Add '(dmg)' suffix to DMG boot options in OpenCanopy
+- Added `(dmg)` suffix to DMG boot options in OpenCanopy
+- Added identifiers for Rocket Lake and Tiger Lake CPUs
 
 #### v0.6.7
 - Fixed ocvalidate return code to be non-zero when issues are found

Include/Acidanthera/Library/OcCpuLib.h

@@ -47,8 +47,10 @@ typedef enum {
   OcCpuGenerationKabyLake,
   OcCpuGenerationCoffeeLake,
   OcCpuGenerationCometLake,
+  OcCpuGenerationRocketLake,
   OcCpuGenerationCannonLake,
   OcCpuGenerationIceLake,
+  OcCpuGenerationTigerLake,
   OcCpuGenerationMaxGeneration
 } OC_CPU_GENERATION;
 

Include/Intel/IndustryStandard/ProcessorInfo.h

@@ -202,13 +202,8 @@ enum {
 #define CPU_MODEL_COMETLAKE_S    0xA5 /* desktop CometLake */
 #define CPU_MODEL_COMETLAKE_Y    0xA5 /* aka 10th generation Amber Lake Y */
 #define CPU_MODEL_COMETLAKE_U    0xA6
-
-#define CPU_SOCKET_UNKNOWN  0x02
-#define CPU_SOCKET_PGA478   0x0F
-#define CPU_SOCKET_LGA771   0x14
-#define CPU_SOCKET_LGA775   0x15
-#define CPU_SOCKET_LGA1156  0x1D
-#define CPU_SOCKET_LGA1366  0x19
+#define CPU_MODEL_ROCKETLAKE_S   0xA7 /* desktop RocketLake */
+#define CPU_MODEL_TIGERLAKE_U    0x8C
 
 #define AMD_CPU_FAMILY          0xF
 #define AMD_CPU_EXT_FAMILY_15H  0x6

Library/OcCpuLib/AppleCpuSupport.c

@@ -544,9 +544,11 @@ InternalDetectAppleProcessorType (
     case CPU_MODEL_COFFEELAKE:     // 0x9E
     case CPU_MODEL_COMETLAKE_S:    // 0xA5 FIXME - unknown, for now
     case CPU_MODEL_COMETLAKE_U:    // 0xA6 FIXME - unknown, for now
+    case CPU_MODEL_ROCKETLAKE_S:   // 0xA7 FIXME - unknown, for now
     case CPU_MODEL_ICELAKE_Y:      // 0x7D FIXME - unknown, for now
     case CPU_MODEL_ICELAKE_U:      // 0x7E FIXME - unknown, for now
     case CPU_MODEL_ICELAKE_SP:     // 0x9F FIXME - unknown, for now
+    case CPU_MODEL_TIGERLAKE_U:    // 0x8C FIXME - unknown, for now
       if (AppleMajorType == AppleProcessorMajorM3) {
         // MB101 (m3 7Y32)
         return AppleProcessorTypeCoreM3Type7; // 0x0C07

Library/OcCpuLib/OcCpuLib.c

@@ -1163,17 +1163,23 @@ InternalDetectIntelProcessorGeneration (
       case CPU_MODEL_COMETLAKE_S:
       case CPU_MODEL_COMETLAKE_U:
         CpuGeneration = OcCpuGenerationCometLake;
-        break;     
+        break;
+      case CPU_MODEL_ROCKETLAKE_S:
+        CpuGeneration = OcCpuGenerationRocketLake;
+        break;
       case CPU_MODEL_ICELAKE_Y:
       case CPU_MODEL_ICELAKE_U:
       case CPU_MODEL_ICELAKE_SP:
         CpuGeneration = OcCpuGenerationIceLake;
         break;
+      case CPU_MODEL_TIGERLAKE_U:
+        CpuGeneration = OcCpuGenerationTigerLake;
+        break;
       default:
         if (CpuInfo->Model < CPU_MODEL_PENRYN) {
           CpuGeneration = OcCpuGenerationPrePenryn;
         } else if (CpuInfo->Model >= CPU_MODEL_SANDYBRIDGE) {
-          CpuGeneration = OcCpuGenerationPostSandyBridge;         
+          CpuGeneration = OcCpuGenerationPostSandyBridge;
         }
     }
   } else {