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提交 4ecd22d4 编写于 作者: G Goldfish64
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OcSmbiosLib: Fix incorrect handling of multiple CPUs and CPU cache size

上级 ccfb6742
隐藏空白更改
内联 并排
Showing with 138 addition and 114 deletion
Library/OcSmbiosLib/SmbiosInternal.c
浏览文件 @ 4ecd22d4
......@@ -141,27 +141,14 @@ SmbiosAssignStructHandle (
//
// Support select tables to have more than 1 entry.
//
if (Type == SMBIOS_TYPE_CACHE_INFORMATION) {
switch (Index) {
case 1:
Table->CurrentPtr.Standard.Hdr->Handle = OcSmbiosL1CacheHandle;
return EFI_SUCCESS;
case 2:
Table->CurrentPtr.Standard.Hdr->Handle = OcSmbiosL2CacheHandle;
return EFI_SUCCESS;
case 3:
Table->CurrentPtr.Standard.Hdr->Handle = OcSmbiosL3CacheHandle;
return EFI_SUCCESS;
default:
ASSERT (FALSE);
return EFI_INVALID_PARAMETER;
}
} else if (Type == SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION
|| Type == SMBIOS_TYPE_SYSTEM_SLOTS
|| Type == SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY
|| Type == SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS
|| Type == SMBIOS_TYPE_MEMORY_DEVICE
|| Type == SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS) {
if (Type == SMBIOS_TYPE_PROCESSOR_INFORMATION
|| Type == SMBIOS_TYPE_CACHE_INFORMATION
|| Type == SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION
|| Type == SMBIOS_TYPE_SYSTEM_SLOTS
|| Type == SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY
|| Type == SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS
|| Type == SMBIOS_TYPE_MEMORY_DEVICE
|| Type == SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS) {
Table->CurrentPtr.Standard.Hdr->Handle = Table->Handle++;
return EFI_SUCCESS;
} else if (Index != 1) {
......@@ -182,9 +169,6 @@ SmbiosAssignStructHandle (
case SMBIOS_TYPE_SYSTEM_ENCLOSURE:
Table->CurrentPtr.Standard.Hdr->Handle = OcSmbiosSystemEnclosureHandle;
break;
case SMBIOS_TYPE_PROCESSOR_INFORMATION:
Table->CurrentPtr.Standard.Hdr->Handle = OcSmbiosProcessorInformationHandle;
break;
case SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION:
Table->CurrentPtr.Standard.Hdr->Handle = OcSmbiosMemoryControllerInformationHandle;
break;
......
Library/OcSmbiosLib/SmbiosInternal.h
浏览文件 @ 4ecd22d4
......@@ -42,13 +42,13 @@ enum {
OcSmbiosSystemInformationHandle,
OcSmbiosBaseboardInformationHandle,
OcSmbiosSystemEnclosureHandle,
OcSmbiosProcessorInformationHandle,
/* OcSmbiosProcessorInformationHandle, */
OcSmbiosMemoryControllerInformationHandle,
OcSmbiosMemoryModuleInformatonHandle,
/* OcSmbiosCacheInformationHandle, */
OcSmbiosL1CacheHandle,
OcSmbiosL2CacheHandle,
OcSmbiosL3CacheHandle,
/* OcSmbiosL1CacheHandle, */
/* OcSmbiosL2CacheHandle, */
/* OcSmbiosL3CacheHandle, */
/* OcSmbiosPortConnectorInformationHandle, */
/* OcSmbiosSystemSlotsHandle, */
OcSmbiosOnboardDeviceInformationHandle,
......
Library/OcSmbiosLib/SmbiosPatch.c
浏览文件 @ 4ecd22d4
......@@ -369,88 +369,103 @@ PatchSystemEnclosure (
SmbiosFinaliseStruct (Table);
}
/** Type 4
/** Type 7
@param[in] Table Pointer to location containing the current address within the buffer.
@param[in] Data Pointer to tocation containing SMBIOS data.
@param[in] CpuInfo Pointer to a valid pico cpu info structure.
@param[in] Data Pointer to location containing SMBIOS data.
@param[in] Index Pointer to cache table index.
@param[in] OriginalHandle Original cache table handle.
@param[in] NewHandle Pointer to new cache table handle.
**/
STATIC
VOID
PatchProcessorInformation (
IN OUT OC_SMBIOS_TABLE *Table,
IN OC_SMBIOS_DATA *Data,
IN OC_CPU_INFO *CpuInfo
PatchCacheInformation (
IN OUT OC_SMBIOS_TABLE *Table,
IN OC_SMBIOS_DATA *Data,
IN OUT UINT16 *Index,
IN SMBIOS_HANDLE OriginalHandle,
OUT SMBIOS_HANDLE *NewHandle
)
{
APPLE_SMBIOS_STRUCTURE_POINTER Original;
UINT16 NumberEntries;
UINT16 EntryNo;
UINT8 MinLength;
UINT8 StringIndex;
UINT8 TmpCount;
UINT16 MhzSpeed;
Original = SmbiosGetOriginalStructure (SMBIOS_TYPE_PROCESSOR_INFORMATION, 1);
MinLength = sizeof (*Original.Standard.Type4);
StringIndex = 0;
if (EFI_ERROR (SmbiosInitialiseStruct (Table, SMBIOS_TYPE_PROCESSOR_INFORMATION, MinLength, 1))) {
//
// A handle of 0xFFFF indicates no cache data present.
//
*NewHandle = 0xFFFF;
if (OriginalHandle == 0xFFFF) {
return;
}
SMBIOS_OVERRIDE_S (Table, Standard.Type4->Socket, Original, NULL, &StringIndex, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ProcessorType, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ProcessorFamily, Original, NULL, NULL);
SMBIOS_OVERRIDE_S (Table, Standard.Type4->ProcessorManufacture, Original, NULL, &StringIndex, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ProcessorId, Original, NULL, NULL);
SMBIOS_OVERRIDE_S (Table, Standard.Type4->ProcessorVersion, Original, NULL, &StringIndex, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->Voltage, Original, NULL, NULL);
Table->CurrentPtr.Standard.Type4->ExternalClock = CpuInfo->ExternalClock;
MhzSpeed = OcCpuFrequencyToDisplayFrequency (CpuInfo->CPUFrequency);
NumberEntries = SmbiosGetOriginalStructureCount (SMBIOS_TYPE_CACHE_INFORMATION);
DEBUG ((DEBUG_INFO, "OCSMB: CPU display frequency is %uMHz\n", MhzSpeed));
DEBUG ((DEBUG_INFO, "OCSMB: Number of CPU cache entries is %u\n", (UINT32) NumberEntries));
Table->CurrentPtr.Standard.Type4->MaxSpeed = MhzSpeed;
Table->CurrentPtr.Standard.Type4->CurrentSpeed = Table->CurrentPtr.Standard.Type4->MaxSpeed;
//
// Locate original cache data specified by the handle.
//
for (EntryNo = 1; EntryNo <= NumberEntries; ++EntryNo) {
Original = SmbiosGetOriginalStructure (SMBIOS_TYPE_CACHE_INFORMATION, EntryNo);
if (Original.Raw == NULL
|| !SMBIOS_ACCESSIBLE (Original, Standard.Type7->CacheConfiguration)
|| Original.Standard.Type7->Hdr.Handle != OriginalHandle) {
continue;
}
SMBIOS_OVERRIDE_V (Table, Standard.Type4->Status, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ProcessorUpgrade, Original, NULL, NULL);
MinLength = sizeof (*Original.Standard.Type7);
StringIndex = 0;
Table->CurrentPtr.Standard.Type4->L1CacheHandle = OcSmbiosL1CacheHandle;
Table->CurrentPtr.Standard.Type4->L2CacheHandle = OcSmbiosL2CacheHandle;
Table->CurrentPtr.Standard.Type4->L3CacheHandle = OcSmbiosL3CacheHandle;
if (EFI_ERROR (SmbiosInitialiseStruct (Table, SMBIOS_TYPE_CACHE_INFORMATION, MinLength, *Index))) {
return;
}
SMBIOS_OVERRIDE_S (Table, Standard.Type4->SerialNumber, Original, NULL, &StringIndex, NULL);
//
// Most bootloaders set this to ProcessorVersion, yet Apple does not care and has UNKNOWN.
//
SMBIOS_OVERRIDE_S (Table, Standard.Type4->AssetTag, Original, NULL, &StringIndex, NULL);
SMBIOS_OVERRIDE_S (Table, Standard.Type4->PartNumber, Original, NULL, &StringIndex, NULL);
SMBIOS_OVERRIDE_S (Table, Standard.Type7->SocketDesignation, Original, NULL, &StringIndex, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->CacheConfiguration, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->MaximumCacheSize, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->InstalledSize, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->SupportedSRAMType, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->CurrentSRAMType, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->CacheSpeed, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->ErrorCorrectionType, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->SystemCacheType, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->Associativity, Original, NULL, NULL);
TmpCount = (UINT8) (CpuInfo->CoreCount < 256 ? CpuInfo->CoreCount : 0xFF);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->CoreCount, Original, NULL, &TmpCount);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->EnabledCoreCount, Original, NULL, &TmpCount);
TmpCount = (UINT8) (CpuInfo->ThreadCount < 256 ? CpuInfo->ThreadCount : 0xFF);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ThreadCount, Original, NULL, &TmpCount);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ProcessorCharacteristics, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ProcessorFamily2, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->CoreCount2, Original, NULL, &CpuInfo->CoreCount);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->EnabledCoreCount2, Original, NULL, &CpuInfo->CoreCount);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ThreadCount2, Original, NULL, &CpuInfo->ThreadCount);
//
// MaximumCacheSize2 and InstalledSize2 are to be set to the same values
// as MaximumCacheSize and InstalledSize if the cache size is under 2047MB.
//
if (!SMBIOS_ACCESSIBLE (Original, Standard.Type7->MaximumCacheSize2)) {
Table->CurrentPtr.Standard.Type7->MaximumCacheSize2 = Table->CurrentPtr.Standard.Type7->MaximumCacheSize & 0x7FFF;
Table->CurrentPtr.Standard.Type7->MaximumCacheSize2 |= Table->CurrentPtr.Standard.Type7->MaximumCacheSize & BIT15 ? BIT31 : 0;
Table->CurrentPtr.Standard.Type7->InstalledSize2 = Table->CurrentPtr.Standard.Type7->InstalledSize & 0x7FFF;
Table->CurrentPtr.Standard.Type7->InstalledSize2 |= Table->CurrentPtr.Standard.Type7->InstalledSize & BIT15 ? BIT31 : 0;
} else {
SMBIOS_OVERRIDE_V (Table, Standard.Type7->MaximumCacheSize2, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->InstalledSize2, Original, NULL, NULL);
}
SmbiosFinaliseStruct (Table);
*NewHandle = Table->CurrentPtr.Standard.Hdr->Handle;
(*Index)++;
SmbiosFinaliseStruct (Table);
}
}
/** Type 7
/** Type 4
@param[in] Table Pointer to location containing the current address within the buffer.
@param[in] Data Pointer to tocation containing SMBIOS data.
@param[in] Data Pointer to location containing SMBIOS data.
@param[in] CpuInfo Pointer to a valid pico cpu info structure.
**/
STATIC
VOID
PatchCacheInformation (
IN OUT OC_SMBIOS_TABLE *Table,
IN OC_SMBIOS_DATA *Data
PatchProcessorInformation (
IN OUT OC_SMBIOS_TABLE *Table,
IN OC_SMBIOS_DATA *Data,
IN OC_CPU_INFO *CpuInfo
)
{
APPLE_SMBIOS_STRUCTURE_POINTER Original;
......@@ -458,51 +473,77 @@ PatchCacheInformation (
UINT16 EntryNo;
UINT8 MinLength;
UINT8 StringIndex;
UINT16 CacheLevel;
BOOLEAN CacheLevels[3];
UINT8 TmpCount;
UINT16 MhzSpeed;
ZeroMem (CacheLevels, sizeof (CacheLevels));
SMBIOS_HANDLE HandleL1Cache;
SMBIOS_HANDLE HandleL2Cache;
SMBIOS_HANDLE HandleL3Cache;
UINT16 CacheIndex;
NumberEntries = SmbiosGetOriginalStructureCount (SMBIOS_TYPE_CACHE_INFORMATION);
NumberEntries = SmbiosGetOriginalStructureCount (SMBIOS_TYPE_PROCESSOR_INFORMATION);
CacheIndex = 0;
DEBUG ((DEBUG_INFO, "OCSMB: Number of CPU cache entries is %u\n", (UINT32) NumberEntries));
for (EntryNo = 1; EntryNo <= NumberEntries; ++EntryNo) {
Original = SmbiosGetOriginalStructure (SMBIOS_TYPE_CACHE_INFORMATION, EntryNo);
if (Original.Raw == NULL || !SMBIOS_ACCESSIBLE (Original, Standard.Type7->CacheConfiguration)) {
for (EntryNo = 1; EntryNo <= NumberEntries; EntryNo++) {
Original = SmbiosGetOriginalStructure (SMBIOS_TYPE_PROCESSOR_INFORMATION, EntryNo);
if (Original.Raw == NULL) {
continue;
}
//
// Check if already done with this cache type.
// Only support L1 to L3 caches.
// Create cache tables.
//
CacheLevel = Original.Standard.Type7->CacheConfiguration & 7U;
if (CacheLevel <= 2 && !CacheLevels[CacheLevel]) {
CacheLevels[CacheLevel] = TRUE;
} else {
continue;
}
PatchCacheInformation (Table, Data, &CacheIndex, Original.Standard.Type4->L1CacheHandle, &HandleL1Cache);
PatchCacheInformation (Table, Data, &CacheIndex, Original.Standard.Type4->L2CacheHandle, &HandleL2Cache);
PatchCacheInformation (Table, Data, &CacheIndex, Original.Standard.Type4->L3CacheHandle, &HandleL3Cache);
MinLength = sizeof (*Original.Standard.Type7);
MinLength = sizeof (*Original.Standard.Type4);
StringIndex = 0;
if (EFI_ERROR (SmbiosInitialiseStruct (Table, SMBIOS_TYPE_CACHE_INFORMATION, MinLength, CacheLevel+1))) {
if (EFI_ERROR (SmbiosInitialiseStruct (Table, SMBIOS_TYPE_PROCESSOR_INFORMATION, MinLength, EntryNo))) {
continue;
}
SMBIOS_OVERRIDE_S (Table, Standard.Type7->SocketDesignation, Original, NULL, &StringIndex, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->CacheConfiguration, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->MaximumCacheSize, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->InstalledSize, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->SupportedSRAMType, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->CurrentSRAMType, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->CacheSpeed, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->ErrorCorrectionType, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->SystemCacheType, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->Associativity, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->MaximumCacheSize2, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type7->InstalledSize2, Original, NULL, NULL);
SMBIOS_OVERRIDE_S (Table, Standard.Type4->Socket, Original, NULL, &StringIndex, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ProcessorType, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ProcessorFamily, Original, NULL, NULL);
SMBIOS_OVERRIDE_S (Table, Standard.Type4->ProcessorManufacture, Original, NULL, &StringIndex, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ProcessorId, Original, NULL, NULL);
SMBIOS_OVERRIDE_S (Table, Standard.Type4->ProcessorVersion, Original, NULL, &StringIndex, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->Voltage, Original, NULL, NULL);
Table->CurrentPtr.Standard.Type4->ExternalClock = CpuInfo->ExternalClock;
MhzSpeed = OcCpuFrequencyToDisplayFrequency (CpuInfo->CPUFrequency);
DEBUG ((DEBUG_INFO, "OCSMB: CPU%u display frequency is %uMHz\n", EntryNo, MhzSpeed));
Table->CurrentPtr.Standard.Type4->MaxSpeed = MhzSpeed;
Table->CurrentPtr.Standard.Type4->CurrentSpeed = Table->CurrentPtr.Standard.Type4->MaxSpeed;
SMBIOS_OVERRIDE_V (Table, Standard.Type4->Status, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ProcessorUpgrade, Original, NULL, NULL);
Table->CurrentPtr.Standard.Type4->L1CacheHandle = HandleL1Cache;
Table->CurrentPtr.Standard.Type4->L2CacheHandle = HandleL2Cache;
Table->CurrentPtr.Standard.Type4->L3CacheHandle = HandleL3Cache;
SMBIOS_OVERRIDE_S (Table, Standard.Type4->SerialNumber, Original, NULL, &StringIndex, NULL);
//
// Most bootloaders set this to ProcessorVersion, yet Apple does not care and has UNKNOWN.
//
SMBIOS_OVERRIDE_S (Table, Standard.Type4->AssetTag, Original, NULL, &StringIndex, NULL);
SMBIOS_OVERRIDE_S (Table, Standard.Type4->PartNumber, Original, NULL, &StringIndex, NULL);
TmpCount = (UINT8) (CpuInfo->CoreCount < 256 ? CpuInfo->CoreCount : 0xFF);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->CoreCount, Original, NULL, &TmpCount);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->EnabledCoreCount, Original, NULL, &TmpCount);
TmpCount = (UINT8) (CpuInfo->ThreadCount < 256 ? CpuInfo->ThreadCount : 0xFF);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ThreadCount, Original, NULL, &TmpCount);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ProcessorCharacteristics, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ProcessorFamily2, Original, NULL, NULL);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->CoreCount2, Original, NULL, &CpuInfo->CoreCount);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->EnabledCoreCount2, Original, NULL, &CpuInfo->CoreCount);
SMBIOS_OVERRIDE_V (Table, Standard.Type4->ThreadCount2, Original, NULL, &CpuInfo->ThreadCount);
SmbiosFinaliseStruct (Table);
}
......@@ -1966,7 +2007,6 @@ OcSmbiosCreate (
PatchBaseboardInformation (SmbiosTable, Data);
PatchSystemEnclosure (SmbiosTable, Data);
PatchProcessorInformation (SmbiosTable, Data, CpuInfo);
PatchCacheInformation (SmbiosTable, Data);
PatchSystemPorts (SmbiosTable, Data);
PatchSystemSlots (SmbiosTable, Data);
......
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