提交 8cbbd115 编写于 作者: J Jiadong Zhu 提交者: Alex Deucher

drm/amdgpu: set completion status as preempted for the resubmission

The driver's CSA buffer is shared by all the ibs. When the high priority ib
is submitted after the preempted ib, CP overrides the ib_completion_status
as completed in the csa buffer. After that the preempted ib is resubmitted,
CP would clear some locals stored for ib resume when reading the completed
status, which causes gpu hang in some cases.

Always set status as preempted for those resubmitted ib instead of reading
everything from the CSA buffer.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2535
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2717Signed-off-by: NJiadong Zhu <Jiadong.Zhu@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
上级 db996e64
......@@ -56,6 +56,15 @@ enum amdgpu_ring_mux_offset_type {
AMDGPU_MUX_OFFSET_TYPE_CE,
};
enum ib_complete_status {
/* IB not started/reset value, default value. */
IB_COMPLETION_STATUS_DEFAULT = 0,
/* IB preempted, started but not completed. */
IB_COMPLETION_STATUS_PREEMPTED = 1,
/* IB completed. */
IB_COMPLETION_STATUS_COMPLETED = 2,
};
struct amdgpu_ring_mux {
struct amdgpu_ring *real_ring;
......
......@@ -5226,6 +5226,9 @@ static void gfx_v9_0_ring_patch_de_meta(struct amdgpu_ring *ring,
de_payload_cpu_addr = adev->virt.csa_cpu_addr + payload_offset;
}
((struct v9_de_ib_state *)de_payload_cpu_addr)->ib_completion_status =
IB_COMPLETION_STATUS_PREEMPTED;
if (offset + (payload_size >> 2) <= ring->buf_mask + 1) {
memcpy((void *)&ring->ring[offset], de_payload_cpu_addr, payload_size);
} else {
......
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